The Experts below are selected from a list of 669 Experts worldwide ranked by ideXlab platform

Yi-bin Hsieh - One of the best experts on this subject based on the ideXlab platform.

  • A Low-Power and High-Precision Spread Spectrum Clock Generator for Serial advanced technology attachment Applications Using Two-Point Modulation
    2016
    Co-Authors: Yao-huang Kao, Yi-bin Hsieh
    Abstract:

    Abstract—A new technique utilizing two-point (TP) modulation for a spread spectrum clock generator (SSCG) for serial advanced technology attachment is presented in which the divider ratio is varied by a digital Σ ∆ modulator, and the voltage-controlled os-cillator is modulated analogically. With this technique, the modu-lation bandwidth is enhanced in order that the modulation profile accuracy and jitter performance caused by the Σ ∆ modulator can be improved at the same time. The order of the Σ ∆ modulator and the loop filter can be reduced to save power and area, while the electromagnetic interference (EMI) suppression still satisfies spec-ifications. The dual-path loop filter (DL) reduces the size of the loop capacitor and enables full integration. The proposed TPDL-SSCG has been fabricated in a 0.18-µm CMOS process. The size of the chip area is 0.44 × 0.48 mm2. The circuit produces a clock of 1.5 GHz with a down-modulation ratio of 0.5%, 10.14 dB EMI of reduction, 5.485 ps rms jitter, and 35 ps peak-to-peak jitter. The power consumption, excluding an output buffer, is only 15.3 mW. Index Terms—Frequency modulation, phase-locked loops (PLLs), sigma–delta modulation, spread spectrum clock genera-tor (SSCG). I

  • A Low-Power and High-Precision Spread Spectrum Clock Generator for Serial advanced technology attachment Applications Using Two-Point Modulation
    IEEE Transactions on Electromagnetic Compatibility, 2009
    Co-Authors: Yi-bin Hsieh
    Abstract:

    A new technique utilizing two-point (TP) modulation for a spread spectrum clock generator (SSCG) for serial advanced technology attachment is presented in which the divider ratio is varied by a digital SigmaDelta modulator, and the voltage-controlled oscillator is modulated analogically. With this technique, the modulation bandwidth is enhanced in order that the modulation profile accuracy and jitter performance caused by the SigmaDelta modulator can be improved at the same time. The order of the SigmaDelta modulator and the loop filter can be reduced to save power and area, while the electromagnetic interference (EMI) suppression still satisfies specifications. The dual-path loop filter (DL) reduces the size of the loop capacitor and enables full integration. The proposed TPDL-SSCG has been fabricated in a 0.18 mum CMOS process. The size of the chip area is 0.44 times 0.48 mm2. The circuit produces a clock of 1.5 GHz with a down-modulation ratio of 0.5%, 10.14 dB EMI of reduction, 5.485 ps rms jitter, and 35 ps peak-to-peak jitter. The power consumption, excluding an output buffer, is only 15.3 mW.

Yao-huang Kao - One of the best experts on this subject based on the ideXlab platform.

  • A Low-Power and High-Precision Spread Spectrum Clock Generator for Serial advanced technology attachment Applications Using Two-Point Modulation
    2016
    Co-Authors: Yao-huang Kao, Yi-bin Hsieh
    Abstract:

    Abstract—A new technique utilizing two-point (TP) modulation for a spread spectrum clock generator (SSCG) for serial advanced technology attachment is presented in which the divider ratio is varied by a digital Σ ∆ modulator, and the voltage-controlled os-cillator is modulated analogically. With this technique, the modu-lation bandwidth is enhanced in order that the modulation profile accuracy and jitter performance caused by the Σ ∆ modulator can be improved at the same time. The order of the Σ ∆ modulator and the loop filter can be reduced to save power and area, while the electromagnetic interference (EMI) suppression still satisfies spec-ifications. The dual-path loop filter (DL) reduces the size of the loop capacitor and enables full integration. The proposed TPDL-SSCG has been fabricated in a 0.18-µm CMOS process. The size of the chip area is 0.44 × 0.48 mm2. The circuit produces a clock of 1.5 GHz with a down-modulation ratio of 0.5%, 10.14 dB EMI of reduction, 5.485 ps rms jitter, and 35 ps peak-to-peak jitter. The power consumption, excluding an output buffer, is only 15.3 mW. Index Terms—Frequency modulation, phase-locked loops (PLLs), sigma–delta modulation, spread spectrum clock genera-tor (SSCG). I

Dutta Trinoy - One of the best experts on this subject based on the ideXlab platform.

  • Performance of hard disk drives in high noise environments
    'Institute of Noise Control Engineering (INCE)', 2017
    Co-Authors: Dutta Trinoy, Barnard, Andrew R.
    Abstract:

    © 2017 Institute of Noise Control Engineering. Digital information stored in rotational media, such as hard disk drives (HDD) needs to be reliable and readily accessible. Although various studies have been performed on themodal analysis of HDDs and the noise emitted during operation, few researchers have addressed the effects noise can have on the performance of HDDs. Analysis performed by Siemens Corporation, IBM and Tyco Fire Protection Products shows that HDDs are sensitive to external disturbances such as tones, broadband noisewith tones, and broadband signals. This paper focuses on identifying the critical frequency ranges and the levels of noise where the performance of the drives reduces. A series of tests has been performed using filtered noise in one-third octave frequency bands at sound pressure levels ranging from 80 dB to 130 dB (re 20 mPa) in an anechoic chamber. A detailed description on the test set-up along with the methodology of testing has been provided. Read/write speeds have been used to measureHDD performance. A completely randomread/writeworkloadwith varied data packet size has been incorporated through a custom LabVIEW program. Serial advanced technology attachment (SATA) drives have been used for the analysis. General trends in performance curves of enterprise HDD, laptop drives, helium filled HDD and non-helium filled HDDs are shown. HDD performance is shown to be sensitive to sound pressure levels as lowas 85 dB (re 20mPa) at some frequencies and the frequency range from 4 kHz to 10 kHz has been found to be most sensitive to HDDs performance

  • PERFORMANCE OF HARD DISK DRIVES IN HIGH NOISE ENVIRONMENTS
    Digital Commons @ Michigan Tech, 2017
    Co-Authors: Dutta Trinoy
    Abstract:

    Digital information stored in rotational media, such as Hard Disk Drives (HDD) needs to be reliable and readily accessible. Various studies have been performed on the modal analysis of HDDs and the noise emitted during operation. Analysis performed by Siemens Corporation, IBM and Tyco Fire Protection Products show that HDDs are sensitive to noise. This report initially focusses on identifying the critical frequency ranges and the levels of noise where the performance of the drives reduces. A series of tests have been performed using pink noise at one-third octave frequency bands at sound pressure levels ranging from 80 dB to 130 dB (re 20 µPa) in an anechoic chamber. A detailed description on the test set-up along with the methodology of testing has been provided. Read/write speeds have been used to measure HDD performance. A completely random read/write workload with varied data packet size has been incorporated through a custom LabVIEW program. Serial advanced technology attachment (SATA) drives have been used for the analysis. General trends in performance curves of Enterprise HDD, Laptop drives, Helium filled HDD and Non-Helium filled HDDs are shown. HDD performance is shown to be sensitive to sound pressure levels as low as 85 dB (re 20 µPa) at some frequencies. Depending on the type of the HDD, noise at a frequency range of 2 kHz – 8 kHz beyond certain SPL affect the HDD’s performance up to the point of temporary and even permanent failure. Speculating the observed frequency content to be the resonant frequencies of the internal parts such as the platter and head gimbal assembly, the modal analysis has been performed. The report later focusses on impact test and measurement of the response using non-contact methods on the HDDs platter and head gimbal assembly. A detailed analysis on the test set-up and measurement parameters has been laid out. The modal parameters obtained, provide an insight to the causal for the HDD’s performance reduction and help establish a relation with the results obtained from acoustic experiments. The modal parameters and the response obtained has been validated using Finite Element Analysis. A comprehensive analysis on the failure of HDDs due to modal parameters has been presented

Takayuki Noto - One of the best experts on this subject based on the ideXlab platform.

  • A 3.9 μs Settling-Time Fractional Spread-Spectrum Clock Generator Using a Dual-Charge-Pump Control Technique for Serial-ATA Applications
    Hindawi Limited, 2015
    Co-Authors: Takashi Kawamoto, Masato Suzuki, Takayuki Noto
    Abstract:

    A low-jitter fractional spread-spectrum clock generator (SSCG) utilizing a fast-settling dual-charge-pump (CP) technique is developed for serial-advanced technology attachment (SATA) applications. The dual-CP architecture reduces a design area to 60% by shrinking an effective capacitance of a loop filter. Moreover, the settling-time is reduced by 4 μs to charge a current to the capacitor by only main-CP in initial period in settling-time. The SSCG is fabricated in a 0.13 μm CMOS and achieves settling time of 3.91 μs faster than 8.11 μs of a conventional SSCG. The random jitter and total jitter at 250 cycles at 1.5 GHz are less than 3.2 and 10.7 psrms, respectively. The triangular modulation signal frequency is 31.5 kHz and the modulation deviation is from −5000 ppm to 0 ppm at 1.5 GHz. The EMI reduction is 10.0 dB. The design area and power consumption are 300 × 700 μm and 18 mW, respectively

Barnard, Andrew R. - One of the best experts on this subject based on the ideXlab platform.

  • Performance of hard disk drives in high noise environments
    'Institute of Noise Control Engineering (INCE)', 2017
    Co-Authors: Dutta Trinoy, Barnard, Andrew R.
    Abstract:

    © 2017 Institute of Noise Control Engineering. Digital information stored in rotational media, such as hard disk drives (HDD) needs to be reliable and readily accessible. Although various studies have been performed on themodal analysis of HDDs and the noise emitted during operation, few researchers have addressed the effects noise can have on the performance of HDDs. Analysis performed by Siemens Corporation, IBM and Tyco Fire Protection Products shows that HDDs are sensitive to external disturbances such as tones, broadband noisewith tones, and broadband signals. This paper focuses on identifying the critical frequency ranges and the levels of noise where the performance of the drives reduces. A series of tests has been performed using filtered noise in one-third octave frequency bands at sound pressure levels ranging from 80 dB to 130 dB (re 20 mPa) in an anechoic chamber. A detailed description on the test set-up along with the methodology of testing has been provided. Read/write speeds have been used to measureHDD performance. A completely randomread/writeworkloadwith varied data packet size has been incorporated through a custom LabVIEW program. Serial advanced technology attachment (SATA) drives have been used for the analysis. General trends in performance curves of enterprise HDD, laptop drives, helium filled HDD and non-helium filled HDDs are shown. HDD performance is shown to be sensitive to sound pressure levels as lowas 85 dB (re 20mPa) at some frequencies and the frequency range from 4 kHz to 10 kHz has been found to be most sensitive to HDDs performance