Analog Computer

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Yannis Tsividis - One of the best experts on this subject based on the ideXlab platform.

  • a vlsi Analog Computer digital Computer accelerator
    International Solid-State Circuits Conference, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-μm CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10×. The IC occupies 1 cm 2 and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • A VLSI Analog Computer/digital Computer accelerator
    IEEE Journal of Solid-State Circuits, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-/spl mu/m CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10/spl times/. The IC occupies 1 cm/sup 2/ and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • a vlsi Analog Computer digital Computer accelerator
    IEEE Journal of Solid-state Circuits, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-/spl mu/m CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10/spl times/. The IC occupies 1 cm/sup 2/ and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • a vlsi Analog Computer math co processor for a digital Computer
    International Solid-State Circuits Conference, 2005
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    A single-chip VLSI Analog Computer having 80 integrators and 336 other programmable linear and nonlinear circuits is fabricated in a 0.25 /spl mu/m CMOS process. The chip can be used to accelerate a digital Computer's numerical routines. The IC is 1 cm/sup 2/ and consumes 300 mW.

Glenn E R Cowan - One of the best experts on this subject based on the ideXlab platform.

  • a vlsi Analog Computer digital Computer accelerator
    International Solid-State Circuits Conference, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-μm CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10×. The IC occupies 1 cm 2 and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • A VLSI Analog Computer/digital Computer accelerator
    IEEE Journal of Solid-State Circuits, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-/spl mu/m CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10/spl times/. The IC occupies 1 cm/sup 2/ and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • a vlsi Analog Computer digital Computer accelerator
    IEEE Journal of Solid-state Circuits, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-/spl mu/m CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10/spl times/. The IC occupies 1 cm/sup 2/ and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • a vlsi Analog Computer math co processor for a digital Computer
    International Solid-State Circuits Conference, 2005
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    A single-chip VLSI Analog Computer having 80 integrators and 336 other programmable linear and nonlinear circuits is fabricated in a 0.25 /spl mu/m CMOS process. The chip can be used to accelerate a digital Computer's numerical routines. The IC is 1 cm/sup 2/ and consumes 300 mW.

Robert C Melville - One of the best experts on this subject based on the ideXlab platform.

  • a vlsi Analog Computer digital Computer accelerator
    International Solid-State Circuits Conference, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-μm CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10×. The IC occupies 1 cm 2 and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • A VLSI Analog Computer/digital Computer accelerator
    IEEE Journal of Solid-State Circuits, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-/spl mu/m CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10/spl times/. The IC occupies 1 cm/sup 2/ and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • a vlsi Analog Computer digital Computer accelerator
    IEEE Journal of Solid-state Circuits, 2006
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    The design of a single-chip VLSI Analog Computer fabricated in a 0.25-/spl mu/m CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear Analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital Computer to refine the solution from the Analog Computer are presented. Solutions from the Analog Computer have been used to accelerate a digital Computer's solution of the periodic steady state of an ODE by more than 10/spl times/. The IC occupies 1 cm/sup 2/ and consumes 300 mW. An analysis has been done showing that the Analog Computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

  • a vlsi Analog Computer math co processor for a digital Computer
    International Solid-State Circuits Conference, 2005
    Co-Authors: Glenn E R Cowan, Robert C Melville, Yannis Tsividis
    Abstract:

    A single-chip VLSI Analog Computer having 80 integrators and 336 other programmable linear and nonlinear circuits is fabricated in a 0.25 /spl mu/m CMOS process. The chip can be used to accelerate a digital Computer's numerical routines. The IC is 1 cm/sup 2/ and consumes 300 mW.

Olivier Bournez - One of the best experts on this subject based on the ideXlab platform.

  • on the functions generated by the general purpose Analog Computer
    Information & Computation, 2017
    Co-Authors: Olivier Bournez, Daniel S Graca, Amaury Pouly
    Abstract:

    Abstract We consider the General Purpose Analog Computer (GPAC), introduced by Claude Shannon in 1941 as a mathematical model of Differential Analysers, that is to say as a model of continuous-time Analog machines. The GPAC generates as output univariate functions (i.e. functions f : R → R ). In this paper we extend this model by: (i) allowing multivariate functions (i.e. functions f : R n → R m ); (ii) introducing a notion of amount of resources (space) needed to generate a function, which allows the stratification of GPAC generable functions into proper subclasses. We also prove that a wide class of (continuous and discontinuous) functions can be uniformly approximated over their full domain. We prove a few stability properties of this model taking into account the amount of resources needed to perform each operation. We establish that generable functions are always analytic but that they can nonetheless (uniformly) approximate a wide range of nonanalytic functions.

  • the general purpose Analog Computer and computable analysis are two equivalent paradigms of Analog computation
    Theory and Applications of Models of Computation, 2006
    Co-Authors: Olivier Bournez, Daniel S Graca, Manuel L Campagnolo, Emmanuel Hainry
    Abstract:

    In this paper we revisit one of the first models of Analog computation, Shannon’s General Purpose Analog Computer (GPAC). The GPAC has often been argued to be weaker than computable analysis. As main contribution, we show that if we change the notion of GPAC-computability in a natural way, we compute exactly all real computable functions (in the sense of computable analysis). Moreover, since GPACs are equivalent to systems of polynomial differential equations then we show that all real computable functions can be defined by such models.

Daniel S Graca - One of the best experts on this subject based on the ideXlab platform.

  • on the functions generated by the general purpose Analog Computer
    Information & Computation, 2017
    Co-Authors: Olivier Bournez, Daniel S Graca, Amaury Pouly
    Abstract:

    Abstract We consider the General Purpose Analog Computer (GPAC), introduced by Claude Shannon in 1941 as a mathematical model of Differential Analysers, that is to say as a model of continuous-time Analog machines. The GPAC generates as output univariate functions (i.e. functions f : R → R ). In this paper we extend this model by: (i) allowing multivariate functions (i.e. functions f : R n → R m ); (ii) introducing a notion of amount of resources (space) needed to generate a function, which allows the stratification of GPAC generable functions into proper subclasses. We also prove that a wide class of (continuous and discontinuous) functions can be uniformly approximated over their full domain. We prove a few stability properties of this model taking into account the amount of resources needed to perform each operation. We establish that generable functions are always analytic but that they can nonetheless (uniformly) approximate a wide range of nonanalytic functions.

  • the general purpose Analog Computer and computable analysis are two equivalent paradigms of Analog computation
    Theory and Applications of Models of Computation, 2006
    Co-Authors: Olivier Bournez, Daniel S Graca, Manuel L Campagnolo, Emmanuel Hainry
    Abstract:

    In this paper we revisit one of the first models of Analog computation, Shannon’s General Purpose Analog Computer (GPAC). The GPAC has often been argued to be weaker than computable analysis. As main contribution, we show that if we change the notion of GPAC-computability in a natural way, we compute exactly all real computable functions (in the sense of computable analysis). Moreover, since GPACs are equivalent to systems of polynomial differential equations then we show that all real computable functions can be defined by such models.

  • some recent developments on shannon s general purpose Analog Computer
    Mathematical Logic Quarterly, 2004
    Co-Authors: Daniel S Graca
    Abstract:

    This paper revisits one of the first models of Analog computation, the General Purpose Analog Computer (GPAC). In particular, we restrict our attention to the improved model presented in [11] and we show that it can be further refined. With this we prove the following: (i) the previous model can be simplified; (ii) it admits extensions having close connections with the class of smooth continuous time dynamical systems. As a consequence, we conclude that some of these extensions achieve Turing universality. Finally, it is shown that if we introduce a new notion of computability for the GPAC, based on ideas from computable analysis, then one can compute transcendentally transcendental functions such as the Gamma function or Riemann's Zeta function. (© 2004 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)