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Zhihua Wang – One of the best experts on this subject based on the ideXlab platform.

  • low power transceiver Analog Front end circuits for bidirectional high data rate wireless telemetry in medical endoscopy applications
    IEEE Transactions on Biomedical Engineering, 2007
    Co-Authors: Guolin Li, Zhihua Wang
    Abstract:

    State-of-the-art endoscopy systems require electronics allowing for real-time, bidirectional data transfer. Proposed are 2.4-GHz low-power transceiver Analog Front-end circuits for bidirectional high data rate wireless telemetry in medical endoscopy applications. The prototype integrates a low-IF receiver Analog Front-end [low noise amplifier (LNA), double balanced down-converter, bandpass-filtered automatic gain controlled (AGC) loop and amplitude-shift keying (ASK) demodulator], and a direct up-conversion transmitter Analog Front-end [20-MHz IF phase-locked loop (PLL) with well-defined amplitude control circuit, ASK modulator, up-converter, and power amplifier] on a single chip together with an internal radio frequency oscillator and local oscillating (LO) buffers. Design tradeoffs have been made over the boundaries of the different building blocks to optimize the overall system performance. All building blocks feature circuit topologies that enable comfortable operation at low powepower consumption. The circuits have been implemented in a 0.25-mum CMOS process. The measured sensitivity of the receiver Analog Front-end is -70 dBm with a data rate of 256 kbps, and the measured output power of the transmitter Analog Front-end could achieve -23 dBm with a data rate of 1 Mbps. The integrated circuit consumes a current of 6 mA in receiver mode and 5.6 mA in transmitter mode with a power supply of 2.5 V. This paper shows the feasibility of achieving the Analog performance required by the wireless endoscopy capsule system in 0.25 mum CMOS.

  • A 2.4 GHz low power wireless transceiver Analog Front-end for endoscopy capsule system
    Analog Integrated Circuits and Signal Processing, 2007
    Co-Authors: Baoyong Chi, Jinke Yao, Shuguang Han, Xiang Xie, Zhihua Wang
    Abstract:

    This work presents the design and implementation of a 2.4 GHz low power wireless transceiver Analog Front-end for the endoscopy capsule system in 0.25 μm CMOS. The prototype integrates a low-IF receiver Analog Front-end (low noise amplifier, double-balanced down-converter, band-pass-filtered AGC loop, and ASK demodulator) and a direct-conversion transmitter Analog Front-end (20 MHz IF PLL with well-defined amplitude control circuit, ASK modulator, up-converter, and output buffer) on a single chip together with one integrated RF oscillator and two LO buffers. Trade-off has been made over the design boundaries of the different building blocks to optimize the overall system performance. All building blocks feature the circuit topologies that enable comfortable operation at low powepower consumption. As a result, the IC works at a 2.5 V power supply, while only consuming 15 mW in receiver (RX) mode and 14 mW in transmitter (TX) mode. To build a complete transceiver for the endoscopy capsule system, only an antenna, a duplexer, and a digital controller are needed besides the presented Analog Front-end chip.

  • A 2.4GHzLowPowerWireless Transceiver Analog Front-End forEndoscopy Capsule System
    , 2006
    Co-Authors: Jinke Yao, Shuguang Han, Zhihua Wang
    Abstract:

    Thisworkpresents thedesign andimplementation canbestored intherecording device, whichismounted onthe ofa2.4GHzlowpowerwireless transceiver Analog Front-end waist ofthepatients, andbeusedbythedoctor afterwards, or fortheendoscopy capsule system in0.25umCMOS process. thecapsule canbecontrolled bythecomputer andtheimage Theprototype integrates a low-IFreceiver AnalogFront-end (lownoise amplifier, double balanced down-converter, band-pass datacanbedisplayed onthescreen ofthecomputer inreal filtered AGCloopandASKdetector) andadirect up-conversion time. Thesystem usesabi-direction communication mode,the transmitter Analog Front-end (20MHzIFPLLwithwelldefinedbi-direction communication makesitpossible that thebehavior amplitude control circuit, ASK modulator, up-converter and ofthecircuits inside thecapsule couldbecontrolled bythe output buffer) onasingle chiptogether withaninternal RF transceiver outside thepatients body. local oscillator andLO buffers. Design trade-offs havebeen tr e ouetheents’ody. madeovertheboundaries ofthedifferent building blocks to Inthewholewireless endoscopy system, theintegrated optimize theoverall system performance. Allbuilding blockscircuit inthecapsule isthemostcrucial part. Itmustbehighly feature circuit topologies thatenable comfortable operation at integrated since thevolumeinside thecapsule islimited, and lowpowerconsumption. Asaresult, theICoperates froma its powerconsumption mustbelowsince thesmall size battery powersupply of2.5V,while onlyconsuming 15mW inreceiver nslimited e (RX)modeand14mW intransmitter (TX)mode. cotineg.n thcasl hudwr oeta

A. Thanachayanont – One of the best experts on this subject based on the ideXlab platform.

  • Ultra Low Power Analog Front-End for UHF RFID Transponder
    2006 International Symposium on Communications and Information Technologies, 2006
    Co-Authors: K. Rongsawat, A. Thanachayanont
    Abstract:

    This paper describes the design of an ultra low power Analog Front-end circuitry for UHF passive RFID transponder. The overall circuits include voltage multiplier, voltage regulator, power-on-reset, ring oscillator, voltage reference and demodulator. Simulation results using a 0.35 mum CMOS process parameters show that the Analog Front-end can operate with the minimum input power 240 muW, while consuming only 1.2 muW

K. Rongsawat – One of the best experts on this subject based on the ideXlab platform.

  • Ultra Low Power Analog Front-End for UHF RFID Transponder
    2006 International Symposium on Communications and Information Technologies, 2006
    Co-Authors: K. Rongsawat, A. Thanachayanont
    Abstract:

    This paper describes the design of an ultra low power Analog Front-end circuitry for UHF passive RFID transponder. The overall circuits include voltage multiplier, voltage regulator, power-on-reset, ring oscillator, voltage reference and demodulator. Simulation results using a 0.35 mum CMOS process parameters show that the Analog Front-end can operate with the minimum input power 240 muW, while consuming only 1.2 muW

Evangelos Eleftheriou – One of the best experts on this subject based on the ideXlab platform.

  • Modeling, Design, and Verification for the Analog Front-End of a MEMS-Based Parallel Scanning-Probe Storage Device
    IEEE Journal of Solid-State Circuits, 2007
    Co-Authors: Christoph Hagleitner, T. Bonaccio, Hugo E. Rothuizen, Jan Lienemann, Dorothea Wiesmann, Giovanni Cherubini, Jan G. Korvink, Evangelos Eleftheriou
    Abstract:

    We present an integrated Analog Front-end (AFE) for the read-channel of a parallel scanning-probe storage device. The read/write element is based on an array of microfabricated silicon cantilevers equipped with heating elements to form nanometer-sized indentations in a polymer surface using integral atomic-force microscope (AFM) tips. An accurate cantilever model based on the combination of a thermal/electrical lumped-element model and a behavioral model of the electrostatic/mechanical part are introduced. The behavioral model of the electrostatic/mechanical part is automatically generated from a full finite-element model (FEM). The model is completely implemented in Verilog-A and was used to co-develop the integrated Analog Front-end circuitry together with the read/write cantilever. The cantilever model and the Analog Front-end were simulated together and the results were experimentally verified. The approach chosen is well suited for system-level simulation and verification/extraction in a design environment based on standard EDA tools.

  • CICC – Modeling, Design, and Verification for the Analog Front-end of a MEMS-based Parallel Scanning-probe Storage Device
    IEEE Custom Integrated Circuits Conference 2006, 2006
    Co-Authors: Christoph Hagleitner, T. Bonaccio, Hugo E. Rothuizen, Jan Lienemann, Dorothea Wiesmann, Giovanni Cherubini, Jan G. Korvink, Evangelos Eleftheriou
    Abstract:

    The paper presents an integrated Analog Front-end (AFE) for the read-channel of a parallel scanning-probe storage device. The read/write element is based on an array of microfabricated silicon cantilevers equipped with heating elements to form nanometer-sized indentations in a polymer surface using integral atomic-force microscopy (AFM) tips. A detailed model based on a combination of a thermal/electrical lumped-element model and behavioral model of the electrostatic/mechanical part was developed. The behavioral model of the electrostatic/mechanical part is automatically generated from a full finite-element model (FEM). The model is completely implemented in Verilog-A and was used to co-develop the integrated Analog Front-end circuitry together with the read/write cantilever. The model and the Analog Front-end were simulated together and the results were experimentally verified. The approach chosen is well suited for system-level simulation and verification/extraction in a design environment based on standard EDA tools

Baoyong Chi – One of the best experts on this subject based on the ideXlab platform.

  • A 2.4 GHz low power wireless transceiver Analog Front-end for endoscopy capsule system
    Analog Integrated Circuits and Signal Processing, 2007
    Co-Authors: Baoyong Chi, Jinke Yao, Shuguang Han, Xiang Xie, Zhihua Wang
    Abstract:

    This work presents the design and implementation of a 2.4 GHz low power wireless transceiver Analog Front-end for the endoscopy capsule system in 0.25 μm CMOS. The prototype integrates a low-IF receiver Analog Front-end (low noise amplifier, double-balanced down-converter, band-pass-filtered AGC loop, and ASK demodulator) and a direct-conversion transmitter Analog Front-end (20 MHz IF PLL with well-defined amplitude control circuit, ASK modulator, up-converter, and output buffer) on a single chip together with one integrated RF oscillator and two LO buffers. Trade-off has been made over the design boundaries of the different building blocks to optimize the overall system performance. All building blocks feature the circuit topologies that enable comfortable operation at low power consumption. As a result, the IC works at a 2.5 V power supply, while only consuming 15 mW in receiver (RX) mode and 14 mW in transmitter (TX) mode. To build a complete transceiver for the endoscopy capsule system, only an antenna, a duplexer, and a digital controller are needed besides the presented Analog Front-end chip.

  • ISCAS – A 2.4GHz low power wireless transceiver Analog Front-end for endoscopy capsule system
    2006 IEEE International Symposium on Circuits and Systems, 1
    Co-Authors: Baoyong Chi, Jinke Yao, Shuguang Han, Xiang Xie, Zhihua Wang
    Abstract:

    This work presents the design and implementation of a 2.4GHz low power wireless transceiver Analog Front-end for the endoscopy capsule system in 0.25/spl mu/m CMOS process. The prototype integrates a low-IF receiver Analog Front-end (low noise amplifier, double balanced down-converter, band-pass filtered AGC loop and ASK detector) and a direct up-conversion transmitter Analog Front-end (20MHz IF PLL with well defined amplitude control circuit, ASK modulator, up-converter and output buffer) on a single chip together with an internal RF local oscillator and LO buffers. Design trade-offs have been made over the boundaries of the different building blocks to optimize the overall system performance. All building blocks feature circuit topologies that enable comfortable operation at low powepower consumption. As a result, the IC operates from a power supply of 2.5 V, while only consuming 15mW in receiver (RX) mode and 14mW in transmitter (TX) mode.