The Experts below are selected from a list of 28653 Experts worldwide ranked by ideXlab platform
Yiran Chen - One of the best experts on this subject based on the ideXlab platform.
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circuit and microarchitecture Evaluation of 3d stacking magnetic ram mram as a universal memory replacement
Design Automation Conference, 2008Co-Authors: Xiangyu Dong, Xiaoxia Wu, Helen Li, Yiran ChenAbstract:Magnetic random access memory (MRAM) has been considered as a promising memory technology due to many attractive properties. Integrating MRAM with CMOS logic may incur extra manufacture cost, due to its hybrid magnetic-CMOS fabrication process. Stacking MRAM on top of CMOS logics using 3D integration is a way to minimize this cost overhead. In this paper, we discuss the circuit design issues for MRAM, and present the MRAM cache model. Based on the model, we compare MRAM against SRAM and DRAM in terms of area, performance, and energy. Finally we conduct Architectural Evaluation for 3D microprocessor stacking with MRAM. The experimental results show that MRAM stacking offers competitive IPC performance with a large reduction in power consumption compared to SRAM and DRAM counterparts.
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DAC - Circuit and microarchitecture Evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement
Proceedings of the 45th annual conference on Design automation - DAC '08, 2008Co-Authors: Xiangyu Dong, Xiaoxia Wu, Helen Li, Yiran ChenAbstract:Magnetic random access memory (MRAM) has been considered as a promising memory technology due to many attractive properties. Integrating MRAM with CMOS logic may incur extra manufacture cost, due to its hybrid magnetic-CMOS fabrication process. Stacking MRAM on top of CMOS logics using 3D integration is a way to minimize this cost overhead. In this paper, we discuss the circuit design issues for MRAM, and present the MRAM cache model. Based on the model, we compare MRAM against SRAM and DRAM in terms of area, performance, and energy. Finally we conduct Architectural Evaluation for 3D microprocessor stacking with MRAM. The experimental results show that MRAM stacking offers competitive IPC performance with a large reduction in power consumption compared to SRAM and DRAM counterparts.
Jean-michel Bruel - One of the best experts on this subject based on the ideXlab platform.
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Model-Based Real-Time Evaluation of Security Patterns: A SCADA System Case Study
2017Co-Authors: Anas Motii, Brahim Hamid, Agnes Lanusse, Jean-michel BruelAbstract:Securing critical systems such as cyber physical systems (CPS) is an important feature especially when it comes to critical transmitted data. At the same time, the implementation of security counter-measures in such systems may impact other functional or non-functional concerns. In this context, we propose a model-based approach for securing critical systems at early design stage. This approach combines security analysis and mitigation solution proposals with multi-concern Architectural Evaluation. It exploits two views of security counter-measures patterns: abstract and concrete. The abstract view is used to select relevant solutions to security requirements on a logical point of view. Then, the concrete view helps the architect evaluating different possible implementation alternatives against other design constraints. The modeling is based on accepted OMG standards such as UML and MARTE. In this paper, the approach is illustrated on a SCADA (Supervisory Control and Data Acquisition) system case study and a tool chain based on Papyrus UML supports the approach.
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Model-Based Real-Time Evaluation of Security Patterns: A SCADA System Case Study
2017Co-Authors: Anas Motii, Brahim Hamid, Agnes Lanusse, Jean-michel BruelAbstract:Securing critical systems such as cyber physical systems (CPS) is an important feature especially when it comes to critical transmitted data. At the same time, the implementation of security counter-measures in such systems may impact other functional or non-functional concerns. In this context, we propose a model-based approach for securing critical systems at early design stage. This approach combines security analysis and mitigation solution proposals with multi-concern Architectural Evaluation. It exploits two views of security counter-measures patterns: abstract and concrete. The abstract view is used to select relevant solutions to security requirements on a logical point of view. Then, the concrete view helps the architect evaluating different possible implementation alternatives against other design constraints. The modeling is based on accepted OMG standards such as UML and MARTE. In this paper, the approach is illustrated on a SCADA (Supervisory Control and Data Acquisition) system case study and a tool chain based on Papyrus UML supports the approach.
Xiangyu Dong - One of the best experts on this subject based on the ideXlab platform.
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circuit and microarchitecture Evaluation of 3d stacking magnetic ram mram as a universal memory replacement
Design Automation Conference, 2008Co-Authors: Xiangyu Dong, Xiaoxia Wu, Helen Li, Yiran ChenAbstract:Magnetic random access memory (MRAM) has been considered as a promising memory technology due to many attractive properties. Integrating MRAM with CMOS logic may incur extra manufacture cost, due to its hybrid magnetic-CMOS fabrication process. Stacking MRAM on top of CMOS logics using 3D integration is a way to minimize this cost overhead. In this paper, we discuss the circuit design issues for MRAM, and present the MRAM cache model. Based on the model, we compare MRAM against SRAM and DRAM in terms of area, performance, and energy. Finally we conduct Architectural Evaluation for 3D microprocessor stacking with MRAM. The experimental results show that MRAM stacking offers competitive IPC performance with a large reduction in power consumption compared to SRAM and DRAM counterparts.
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DAC - Circuit and microarchitecture Evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement
Proceedings of the 45th annual conference on Design automation - DAC '08, 2008Co-Authors: Xiangyu Dong, Xiaoxia Wu, Helen Li, Yiran ChenAbstract:Magnetic random access memory (MRAM) has been considered as a promising memory technology due to many attractive properties. Integrating MRAM with CMOS logic may incur extra manufacture cost, due to its hybrid magnetic-CMOS fabrication process. Stacking MRAM on top of CMOS logics using 3D integration is a way to minimize this cost overhead. In this paper, we discuss the circuit design issues for MRAM, and present the MRAM cache model. Based on the model, we compare MRAM against SRAM and DRAM in terms of area, performance, and energy. Finally we conduct Architectural Evaluation for 3D microprocessor stacking with MRAM. The experimental results show that MRAM stacking offers competitive IPC performance with a large reduction in power consumption compared to SRAM and DRAM counterparts.
Ross Jeffery - One of the best experts on this subject based on the ideXlab platform.
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APSEC - An exploratory study of groupware support for distributed software architecture Evaluation process
Journal of Systems and Software, 2006Co-Authors: Muhammad Ali Babar, Barbara Kitchenham, Liming Zhu, Ross JefferyAbstract:Software architecture Evaluation is an effective means of addressing quality related issues quite early in the software development lifecycle. Scenario-based approaches to evaluate architecture usually involve a large number of stakeholders, who need to be collocated for Evaluation sessions. Collocating a large number of stakeholders is an expensive and time-consuming exercise, which may prove to be a hurdle in the wide-spread adoption of Architectural Evaluation practices. Drawing upon the successful introduction of groupware applications to support geographically distributed teams in software inspection, and requirements engineering disciplines, we propose the concept of distributed Architectural Evaluation using Internet-based collaborative technologies. This paper illustrates the methodology of a pilot study to assess the viability of a larger experiment intended to investigate the feasibility of groupware support for distributed software architecture Evaluation. In addition, the results of the pilot study provide some interesting findings on the viability of groupware-supported software Architectural Evaluation process.
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WICSA - Mining patterns to support software architecture Evaluation
Proceedings. Fourth Working IEEE IFIP Conference on Software Architecture (WICSA 2004), 1Co-Authors: Liming Zhu, Muhammad Ali Babar, Ross JefferyAbstract:In this paper, we present an approach to improve the software architecture Evaluation process by systematically extracting and appropriately documenting Architecturally significant information from software architecture and design patterns; we are interested in only two pieces of information found in software patterns: general scenarios and Architectural tactics. General scenarios distilled from patterns not only assist stakeholders in developing concrete scenarios during a scenario-based architecture Evaluation, but can also help an architect select and calibrate a quality attribute reasoning framework. Architectural tactics in patterns are used as a means of manipulating independent parameters in the reasoning framework to achieve the desired quality. Moreover, we believe if we use general scenarios and tactics extracted from patterns in an Architectural Evaluation, the results of that Evaluation can be used as an evidence to validate the pattern's claim with respect to the quality attributes. We demonstrate our approach by using EJB architecture usage patterns. We contend that this approach can be used to analyze and validate any architecture pattern.
J.d. Tvedt - One of the best experts on this subject based on the ideXlab platform.
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ICSM - Validating and improving an existing software Architectural Evaluation process
20th IEEE International Conference on Software Maintenance 2004. Proceedings., 1Co-Authors: T. Everitt, R.t. Tvedt, J.d. TvedtAbstract:It is inevitable that most software systems will undergo continuous changes, increasing the risk of Architectural degeneration. Several software Architectural Evaluation processes attempt to address Architectural issues from various perspectives and assist to mitigate the risk of Architectural degeneration. This paper describes enhancements made to an existing software architecture Evaluation process and presents the results of a case study conducted using the improved process. The results suggest that the enhanced software architecture Evaluation process is more broadly applicable than the previous version. It is believed that this process would be effective with systems utilizing various Architectural styles and design patterns.