The Experts below are selected from a list of 249 Experts worldwide ranked by ideXlab platform

D. Mlynek - One of the best experts on this subject based on the ideXlab platform.

  • EUSIPCO - Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • A class of vector-tracing motion estimation Architectures for MPEG2 type coding for TV and HDTV
    Proceedings of the 1998 IEEE International Conference on Acoustics Speech and Signal Processing ICASSP '98 (Cat. No.98CH36181), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • ICASSP - A class of vector-tracing motion estimation Architectures for MPEG2 type coding for TV and HDTV
    Proceedings of the 1998 IEEE International Conference on Acoustics Speech and Signal Processing ICASSP '98 (Cat. No.98CH36181), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    9th European Signal Processing Conference (EUSIPCO 1998), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

M. Gumm - One of the best experts on this subject based on the ideXlab platform.

  • EUSIPCO - Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • A class of vector-tracing motion estimation Architectures for MPEG2 type coding for TV and HDTV
    Proceedings of the 1998 IEEE International Conference on Acoustics Speech and Signal Processing ICASSP '98 (Cat. No.98CH36181), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • ICASSP - A class of vector-tracing motion estimation Architectures for MPEG2 type coding for TV and HDTV
    Proceedings of the 1998 IEEE International Conference on Acoustics Speech and Signal Processing ICASSP '98 (Cat. No.98CH36181), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    9th European Signal Processing Conference (EUSIPCO 1998), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

S. Dogimont - One of the best experts on this subject based on the ideXlab platform.

  • EUSIPCO - Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • A class of vector-tracing motion estimation Architectures for MPEG2 type coding for TV and HDTV
    Proceedings of the 1998 IEEE International Conference on Acoustics Speech and Signal Processing ICASSP '98 (Cat. No.98CH36181), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • ICASSP - A class of vector-tracing motion estimation Architectures for MPEG2 type coding for TV and HDTV
    Proceedings of the 1998 IEEE International Conference on Acoustics Speech and Signal Processing ICASSP '98 (Cat. No.98CH36181), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    9th European Signal Processing Conference (EUSIPCO 1998), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

F. Mombers - One of the best experts on this subject based on the ideXlab platform.

  • EUSIPCO - Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • A class of vector-tracing motion estimation Architectures for MPEG2 type coding for TV and HDTV
    Proceedings of the 1998 IEEE International Conference on Acoustics Speech and Signal Processing ICASSP '98 (Cat. No.98CH36181), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • ICASSP - A class of vector-tracing motion estimation Architectures for MPEG2 type coding for TV and HDTV
    Proceedings of the 1998 IEEE International Conference on Acoustics Speech and Signal Processing ICASSP '98 (Cat. No.98CH36181), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    9th European Signal Processing Conference (EUSIPCO 1998), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

I. Remi - One of the best experts on this subject based on the ideXlab platform.

  • EUSIPCO - Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.

  • Architectures for vector-tracing based motion estimation for MPEG2 type coding for TV and HDTV
    9th European Signal Processing Conference (EUSIPCO 1998), 1998
    Co-Authors: M. Gumm, F. Mombers, S. Dogimont, I. Remi, D. Mlynek
    Abstract:

    A class of motion estimation VLSI Architectures is presented which has been developed for the use in studio quality MPEG2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed Architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/'co-processor approach. A chip tailored to TV resolution requirements is under design. The same Architecture Principle can be used to build HDTV capable motion estimation devices.