The Experts below are selected from a list of 36525 Experts worldwide ranked by ideXlab platform

Guido Araujo - One of the best experts on this subject based on the ideXlab platform.

  • Address register allocation for Arrays in loops of embedded programs
    Microelectronics Journal, 2003
    Co-Authors: Guilherme Ottoni, Guido Araujo
    Abstract:

    Efficient address register allocation has been shown to be a central problem in code generation for processors with restricted addressing modes. This paper extends previous work on Global Array Reference Allocation (GARA), the problem of allocating address registers to Array References in loops. It describes two heuristics to the problem, presenting experimental data to support them. In addition, it proposes an approach to solve GARA optimally which, albeit computationally exponential, is useful to measure the efficiency of other methods. Experimental results, using the MediaBench benchmark and profiling information, reveal that the proposed heuristics can solve the majority of the benchmark loops near optimality in polynomial-time. A substantial execution time speedup is reported for the benchmark programs, after compiled with the original and the optimized versions of GCC.

  • Global Array Reference allocation
    ACM Transactions on Design Automation of Electronic Systems, 2002
    Co-Authors: Guido Araujo, Guilherme Ottoni, Marcelo Silva Cintra
    Abstract:

    Embedded systems executing specialized programs have been increasingly responsible for a large share of the computer systems manufactured every year. This trend has increased the demand for processors that can guarantee high-performance under stringent cost, power, and code size constraints. Indirect addressing is by far the most used addressing mode in programs running on these systems, since it enables the design of small and faster instructions. This paper proposes a solution to the problem of allocating registers to Array References using auto-increment addressing modes. It extends previous work in the area by enabling efficient allocation in the presence of control-flow statements. The solution is based on an algorithm that merges address registers' live ranges pairwise. An optimizing DSP compiler, from Mindspeed Technologies Inc., is used to validate this idea. Experimental results reveal a substantial improvement in code performance, when comparing to a combination of local auto-increment detection and priority-based register coloring.

  • LCTES - Array Reference Allocation Using SSA-Form and Live Range Growth
    Lecture Notes in Computer Science, 2001
    Co-Authors: Marcelo Cintra, Guido Araujo
    Abstract:

    Embedded systems executing specialized programs are playing an increasing role in computing. This trend has increased the demand for processors that can guarantee high-performance under stringent cost, power and code size constraints. Indirect addressing is by far the most used addressing mode in programs running on these systems, since it enables the design of small and faster instructions. This paper proposes a solution to the problem of allocating registers to Array References using auto-increment addressing modes. It extends previous work in the area, by enabling efficient allocation in the presence of control-flow statements. An optimizing DSP compiler, from Conexant Systems Inc., was used to validate this idea. Experimental results reveal a substantial improvement in code performance, when comparing to a priority-based register coloring algorithm.

  • Array Reference allocation using SSA-form and live range growth
    Lecture Notes in Computer Science, 2001
    Co-Authors: Marcelo Cintra, Guido Araujo
    Abstract:

    Embedded systems executing specialized programs are playing an increasing role in computing. This trend has increased the demand for processors that can guarantee high-performance under stringent cost, power and code size constraints. Indirect addressing is by far the most used addressing mode in programs running on these systems, since it enables the design of small and faster instructions. This paper proposes a solution to the problem of allocating registers to Array References using auto-increment addressing modes. It extends previous work in the area, by enabling efficient allocation in the presence of control-flow statements. An optimizing DSP compiler, from Conexant Systems Inc., was used to validate this idea. Experimental results reveal a substantial improvement in code performance, when comparing to a priority-based register coloring algorithm.

Mary Lou Soffa - One of the best experts on this subject based on the ideXlab platform.

  • a practical data flow framework for Array Reference analysis and its use in optimizations
    Programming Language Design and Implementation, 1993
    Co-Authors: Evelyn Duesterwald, Rajiv Gupta, Mary Lou Soffa
    Abstract:

    Data flow analysis techniques have traditionally been restricted to the analysis of scalar variables. This retriction, however, imposes a limitation on the kinds of optimizations that can be performed in loops containing Array References. We present a data flow framework for Array Reference analysis that provides the information needed in various optimizations targeted at sequential or fine-grained parallel architectures. The framework extends the traditional scalar framework by incorporating iteration distance values into the analysis to qualify the computed data flow solution during the fixed point iteration. Analyses phrased in this framework are capable of discovering recurrent access patterns among Array References that evolve during the execution of a loop. Applications of our framework are discussed for register allocation, load/store optimizations, and controlled loop unrolling.

  • PLDI - A practical data flow framework for Array Reference analysis and its use in optimizations
    Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation - PLDI '93, 1993
    Co-Authors: Evelyn Duesterwald, Rajiv Gupta, Mary Lou Soffa
    Abstract:

    Data flow analysis techniques have traditionally been restricted to the analysis of scalar variables. This retriction, however, imposes a limitation on the kinds of optimizations that can be performed in loops containing Array References. We present a data flow framework for Array Reference analysis that provides the information needed in various optimizations targeted at sequential or fine-grained parallel architectures. The framework extends the traditional scalar framework by incorporating iteration distance values into the analysis to qualify the computed data flow solution during the fixed point iteration. Analyses phrased in this framework are capable of discovering recurrent access patterns among Array References that evolve during the execution of a loop. Applications of our framework are discussed for register allocation, load/store optimizations, and controlled loop unrolling.

Marcelo Cintra - One of the best experts on this subject based on the ideXlab platform.

  • LCTES - Array Reference Allocation Using SSA-Form and Live Range Growth
    Lecture Notes in Computer Science, 2001
    Co-Authors: Marcelo Cintra, Guido Araujo
    Abstract:

    Embedded systems executing specialized programs are playing an increasing role in computing. This trend has increased the demand for processors that can guarantee high-performance under stringent cost, power and code size constraints. Indirect addressing is by far the most used addressing mode in programs running on these systems, since it enables the design of small and faster instructions. This paper proposes a solution to the problem of allocating registers to Array References using auto-increment addressing modes. It extends previous work in the area, by enabling efficient allocation in the presence of control-flow statements. An optimizing DSP compiler, from Conexant Systems Inc., was used to validate this idea. Experimental results reveal a substantial improvement in code performance, when comparing to a priority-based register coloring algorithm.

  • Array Reference allocation using SSA-form and live range growth
    Lecture Notes in Computer Science, 2001
    Co-Authors: Marcelo Cintra, Guido Araujo
    Abstract:

    Embedded systems executing specialized programs are playing an increasing role in computing. This trend has increased the demand for processors that can guarantee high-performance under stringent cost, power and code size constraints. Indirect addressing is by far the most used addressing mode in programs running on these systems, since it enables the design of small and faster instructions. This paper proposes a solution to the problem of allocating registers to Array References using auto-increment addressing modes. It extends previous work in the area, by enabling efficient allocation in the presence of control-flow statements. An optimizing DSP compiler, from Conexant Systems Inc., was used to validate this idea. Experimental results reveal a substantial improvement in code performance, when comparing to a priority-based register coloring algorithm.

Evelyn Duesterwald - One of the best experts on this subject based on the ideXlab platform.

  • a practical data flow framework for Array Reference analysis and its use in optimizations
    Programming Language Design and Implementation, 1993
    Co-Authors: Evelyn Duesterwald, Rajiv Gupta, Mary Lou Soffa
    Abstract:

    Data flow analysis techniques have traditionally been restricted to the analysis of scalar variables. This retriction, however, imposes a limitation on the kinds of optimizations that can be performed in loops containing Array References. We present a data flow framework for Array Reference analysis that provides the information needed in various optimizations targeted at sequential or fine-grained parallel architectures. The framework extends the traditional scalar framework by incorporating iteration distance values into the analysis to qualify the computed data flow solution during the fixed point iteration. Analyses phrased in this framework are capable of discovering recurrent access patterns among Array References that evolve during the execution of a loop. Applications of our framework are discussed for register allocation, load/store optimizations, and controlled loop unrolling.

  • PLDI - A practical data flow framework for Array Reference analysis and its use in optimizations
    Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation - PLDI '93, 1993
    Co-Authors: Evelyn Duesterwald, Rajiv Gupta, Mary Lou Soffa
    Abstract:

    Data flow analysis techniques have traditionally been restricted to the analysis of scalar variables. This retriction, however, imposes a limitation on the kinds of optimizations that can be performed in loops containing Array References. We present a data flow framework for Array Reference analysis that provides the information needed in various optimizations targeted at sequential or fine-grained parallel architectures. The framework extends the traditional scalar framework by incorporating iteration distance values into the analysis to qualify the computed data flow solution during the fixed point iteration. Analyses phrased in this framework are capable of discovering recurrent access patterns among Array References that evolve during the execution of a loop. Applications of our framework are discussed for register allocation, load/store optimizations, and controlled loop unrolling.

Rajiv Gupta - One of the best experts on this subject based on the ideXlab platform.

  • a practical data flow framework for Array Reference analysis and its use in optimizations
    Programming Language Design and Implementation, 1993
    Co-Authors: Evelyn Duesterwald, Rajiv Gupta, Mary Lou Soffa
    Abstract:

    Data flow analysis techniques have traditionally been restricted to the analysis of scalar variables. This retriction, however, imposes a limitation on the kinds of optimizations that can be performed in loops containing Array References. We present a data flow framework for Array Reference analysis that provides the information needed in various optimizations targeted at sequential or fine-grained parallel architectures. The framework extends the traditional scalar framework by incorporating iteration distance values into the analysis to qualify the computed data flow solution during the fixed point iteration. Analyses phrased in this framework are capable of discovering recurrent access patterns among Array References that evolve during the execution of a loop. Applications of our framework are discussed for register allocation, load/store optimizations, and controlled loop unrolling.

  • PLDI - A practical data flow framework for Array Reference analysis and its use in optimizations
    Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation - PLDI '93, 1993
    Co-Authors: Evelyn Duesterwald, Rajiv Gupta, Mary Lou Soffa
    Abstract:

    Data flow analysis techniques have traditionally been restricted to the analysis of scalar variables. This retriction, however, imposes a limitation on the kinds of optimizations that can be performed in loops containing Array References. We present a data flow framework for Array Reference analysis that provides the information needed in various optimizations targeted at sequential or fine-grained parallel architectures. The framework extends the traditional scalar framework by incorporating iteration distance values into the analysis to qualify the computed data flow solution during the fixed point iteration. Analyses phrased in this framework are capable of discovering recurrent access patterns among Array References that evolve during the execution of a loop. Applications of our framework are discussed for register allocation, load/store optimizations, and controlled loop unrolling.