The Experts below are selected from a list of 27837 Experts worldwide ranked by ideXlab platform
Keren Bergman - One of the best experts on this subject based on the ideXlab platform.
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on chip mode division multiplexing switch
Optica, 2015Co-Authors: Brian Stern, Keren Bergman, Christine P. Chen, Xiaoliang Zhu, Lawrence D. Tzuang, Jaime Cardenas, Michal LipsonAbstract:Leveraging the spatial modes of multimode waveguides using mode-division multiplexing on an integrated photonic chip allows unprecedented scaling of Bandwidth Density for on-chip communication. Switching channels between waveguides is critical for future scalable optical networks, but its implementation in multimode waveguides must address how to simultaneously control modes with vastly different optical properties. Here we present a platform for switching signals between multimode waveguides based on individually processing the spatial mode channels using single-mode elements. Using this wavelength-division multiplexing-compatible platform, we demonstrate a 1×2 multimode switch for a silicon chip that routes four data channels with low (<−16.8 dB) crosstalk. We show bit-error rates below 10−9 and power penalties below 1.4 dB on all channels while routing 10 Gb/s data when each channel is input and routed separately. The switch exhibits an additional power penalty of less than 2.4 dB when all four channels are simultaneously routed. These results enable individual processing of multimode signals and high-Bandwidth, flexible optical networks.
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Scaling silicon photonic switch fabrics for data center interconnection networks
Optics Express, 2015Co-Authors: Dessislava Nikolova, David Calhoun, Sébastien Rumley, Robert Hendry, Payman Samadi, Keren BergmanAbstract:With the rapidly increasing aggregate Bandwidth requirements of data centers there is a growing interest in the insertion of optically interconnected networks with high-radix transparent optical switch fabrics. Silicon photonics is a particularly promising and applicable technology due to its small footprint, CMOS compatibility, high Bandwidth Density, and the potential for nanosecond scale dynamic connectivity. In this paper we analyze the feasibility of building silicon photonic microring based switch fabrics for data center scale optical interconnection networks. We evaluate the scalability of a microring based switch fabric for WDM signals. Critical parameters including crosstalk, insertion loss and switching speed are analyzed, and their sensitivity with respect to device parameters is examined. We show that optimization of physical layer parameters can reduce crosstalk and increase switch fabric scalability. Our analysis indicates that with current state-of-the-art devices, a high radix 128 × 128 silicon photonic single chip switch fabric with tolerable power penalty is feasible. The applicability of silicon photonic microrings for data center switching is further supported via review of microring operations and control demonstrations. The challenges and opportunities for this technology platform are discussed.
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silicon photonic microring links for high Bandwidth Density low power chip i o
IEEE Micro, 2013Co-Authors: Noam Ophir, C Mineo, D Mountain, Keren BergmanAbstract:Silicon photonic microrings have drawn interest in recent years as potential building blocks for high-Bandwidth off-chip communication links. The authors analyze a terabit-per-second scale unamplified microring link based on current best-of-class devices. The analysis provides quantitative measures for the achievable energy efficiency and Bandwidth Density that could be realized within several years. The results highlight key device attributes that require significant advancement to realize sub-pJ/bit scale optical links.
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photonic interconnection network architectures using wavelength selective spatial routing for chip scale communications
IEEE\ OSA Journal of Optical Communications and Networking, 2012Co-Authors: Jasper Chan, Keren BergmanAbstract:The overall performance of modern computing systems is increasingly determined by the characteristics of the interconnection network used to provide communication links between on-chip cores and off-chip memory. Photonic technology has been proposed as an alternative to traditional electronic interconnects because of its advantages in Bandwidth Density, latency, and power efficiency. Circuit-switched photonic interconnect topologies take advantage of the optical spectrum to create high-Bandwidth transmission links through the transmission of data channels on multiple parallel wavelengths; however, this technique suffers from low path diversity and high setup time overhead, which induces high network resource contention, unfairness, and long latencies. This work improves upon the circuit-switching paradigm by introducing the use of on-chip wavelength-selective spatial routing to produce multiple logical communication layers on a single physical plane. This technique yields higher path diversity in photonic interconnection networks, demonstrating as much as 764% saturation Bandwidth improvement with synthetic traffic and as much as 89% improvement in execution time and energy dissipation for traffic from scientific application traces.
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Physical-layer modeling and system-level design of chip-scale photonic interconnection networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2011Co-Authors: Johnnie Chan, Gilbert Hendry, Keren Bergman, Luca P CarloniAbstract:Photonic technology is becoming an increasingly attractive solution to the problems facing today's electronic chip-scale interconnection networks. Recent progress in silicon photonics research has enabled the demonstration of all the necessary optical building blocks for creating extremely high-Bandwidth Density and energy-efficient links for on-chip and off-chip communications. From the feasibility and architecture perspective however, photonics represents a dramatic paradigm shift from traditional electronic network designs due to fundamental differences in how electronics and photonics function and behave. As a result of these differences, new modeling and analysis methods must be employed in order to properly realize a functional photonic chip-scale interconnect design. In this paper, we present a methodology for characterizing and modeling fundamental photonic building blocks which can subsequently be combined to form full photonic network architectures. We also describe a set of tools which can be utilized to assess the physical-layer and system-level performance properties of a photonic network. The models and tools are integrated in a novel open-source design and simulation environment. We present a case study of two different photonic networks-on-chip to demonstrate how our improved understanding and modeling of the physical-layer details of photonic communications can be used to better understand the system-level performance impact.
Ichiro Takeuchi - One of the best experts on this subject based on the ideXlab platform.
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programmable phase change metasurfaces on waveguides for multimode photonic convolutional neural network
Nature Communications, 2021Co-Authors: Seokhyeong Lee, Ruoming Peng, Ichiro TakeuchiAbstract:Neuromorphic photonics has recently emerged as a promising hardware accelerator, with significant potential speed and energy advantages over digital electronics for machine learning algorithms, such as neural networks of various types. Integrated photonic networks are particularly powerful in performing analog computing of matrix-vector multiplication (MVM) as they afford unparalleled speed and Bandwidth Density for data transmission. Incorporating nonvolatile phase-change materials in integrated photonic devices enables indispensable programming and in-memory computing capabilities for on-chip optical computing. Here, we demonstrate a multimode photonic computing core consisting of an array of programable mode converters based on on-waveguide metasurfaces made of phase-change materials. The programmable converters utilize the refractive index change of the phase-change material Ge2Sb2Te5 during phase transition to control the waveguide spatial modes with a very high precision of up to 64 levels in modal contrast. This contrast is used to represent the matrix elements, with 6-bit resolution and both positive and negative values, to perform MVM computation in neural network algorithms. We demonstrate a prototypical optical convolutional neural network that can perform image processing and recognition tasks with high accuracy. With a broad operation Bandwidth and a compact device footprint, the demonstrated multimode photonic core is promising toward large-scale photonic neural networks with ultrahigh computation throughputs. Integrated optical computing requires programmable photonic and nonlinear elements. The authors demonstrate a phase-change metasurface mode converter, which can be programmed to control the waveguide mode contrast, and build an optical convolutional neural network to perform image processing tasks.
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programmable phase change metasurfaces on waveguides for multimode photonic convolutional neural network
arXiv: Optics, 2020Co-Authors: Seokhyeong Lee, Ruoming Peng, Ichiro TakeuchiAbstract:Neuromorphic photonics has recently emerged as a promising hardware accelerator, with significant potential speed and energy advantages over digital electronics, for machine learning algorithms such as neural networks of various types. Integrated photonic networks are particularly powerful in performing analog computing of matrix-vector multiplication (MVM) as they afford unparalleled speed and Bandwidth Density for data transmission. Incorporating nonvolatile phase-change materials in integrated photonic devices enables indispensable programming and in-memory computing capabilities for on-chip optical computing. Here, we demonstrate a multimode photonic computing core consisting of an array of programable mode converters based on metasurface made of phase-change materials. The programmable converters utilize the refractive index change of the phase-change material Ge-Sb-Te during phase transition to control the waveguide spatial modes with a very high precision of up 64 levels in modal contrast. This contrast is used to represent the matrix elements, with 6-bit resolution and both positive and negative values, to perform MVM computation in neural network algorithms. We demonstrate an optical convolutional neural network that can perform image processing and classification tasks with high accuracy. With a broad operation Bandwidth and a compact device footprint, the demonstrated multimode photonic core is very promising toward a large-scale photonic processor for high-throughput optical neural networks.
Seokhyeong Lee - One of the best experts on this subject based on the ideXlab platform.
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programmable phase change metasurfaces on waveguides for multimode photonic convolutional neural network
Nature Communications, 2021Co-Authors: Seokhyeong Lee, Ruoming Peng, Ichiro TakeuchiAbstract:Neuromorphic photonics has recently emerged as a promising hardware accelerator, with significant potential speed and energy advantages over digital electronics for machine learning algorithms, such as neural networks of various types. Integrated photonic networks are particularly powerful in performing analog computing of matrix-vector multiplication (MVM) as they afford unparalleled speed and Bandwidth Density for data transmission. Incorporating nonvolatile phase-change materials in integrated photonic devices enables indispensable programming and in-memory computing capabilities for on-chip optical computing. Here, we demonstrate a multimode photonic computing core consisting of an array of programable mode converters based on on-waveguide metasurfaces made of phase-change materials. The programmable converters utilize the refractive index change of the phase-change material Ge2Sb2Te5 during phase transition to control the waveguide spatial modes with a very high precision of up to 64 levels in modal contrast. This contrast is used to represent the matrix elements, with 6-bit resolution and both positive and negative values, to perform MVM computation in neural network algorithms. We demonstrate a prototypical optical convolutional neural network that can perform image processing and recognition tasks with high accuracy. With a broad operation Bandwidth and a compact device footprint, the demonstrated multimode photonic core is promising toward large-scale photonic neural networks with ultrahigh computation throughputs. Integrated optical computing requires programmable photonic and nonlinear elements. The authors demonstrate a phase-change metasurface mode converter, which can be programmed to control the waveguide mode contrast, and build an optical convolutional neural network to perform image processing tasks.
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programmable phase change metasurfaces on waveguides for multimode photonic convolutional neural network
arXiv: Optics, 2020Co-Authors: Seokhyeong Lee, Ruoming Peng, Ichiro TakeuchiAbstract:Neuromorphic photonics has recently emerged as a promising hardware accelerator, with significant potential speed and energy advantages over digital electronics, for machine learning algorithms such as neural networks of various types. Integrated photonic networks are particularly powerful in performing analog computing of matrix-vector multiplication (MVM) as they afford unparalleled speed and Bandwidth Density for data transmission. Incorporating nonvolatile phase-change materials in integrated photonic devices enables indispensable programming and in-memory computing capabilities for on-chip optical computing. Here, we demonstrate a multimode photonic computing core consisting of an array of programable mode converters based on metasurface made of phase-change materials. The programmable converters utilize the refractive index change of the phase-change material Ge-Sb-Te during phase transition to control the waveguide spatial modes with a very high precision of up 64 levels in modal contrast. This contrast is used to represent the matrix elements, with 6-bit resolution and both positive and negative values, to perform MVM computation in neural network algorithms. We demonstrate an optical convolutional neural network that can perform image processing and classification tasks with high accuracy. With a broad operation Bandwidth and a compact device footprint, the demonstrated multimode photonic core is very promising toward a large-scale photonic processor for high-throughput optical neural networks.
Gilbert Hendry - One of the best experts on this subject based on the ideXlab platform.
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Physical-layer modeling and system-level design of chip-scale photonic interconnection networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2011Co-Authors: Johnnie Chan, Gilbert Hendry, Keren Bergman, Luca P CarloniAbstract:Photonic technology is becoming an increasingly attractive solution to the problems facing today's electronic chip-scale interconnection networks. Recent progress in silicon photonics research has enabled the demonstration of all the necessary optical building blocks for creating extremely high-Bandwidth Density and energy-efficient links for on-chip and off-chip communications. From the feasibility and architecture perspective however, photonics represents a dramatic paradigm shift from traditional electronic network designs due to fundamental differences in how electronics and photonics function and behave. As a result of these differences, new modeling and analysis methods must be employed in order to properly realize a functional photonic chip-scale interconnect design. In this paper, we present a methodology for characterizing and modeling fundamental photonic building blocks which can subsequently be combined to form full photonic network architectures. We also describe a set of tools which can be utilized to assess the physical-layer and system-level performance properties of a photonic network. The models and tools are integrated in a novel open-source design and simulation environment. We present a case study of two different photonic networks-on-chip to demonstrate how our improved understanding and modeling of the physical-layer details of photonic communications can be used to better understand the system-level performance impact.
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architectural design exploration of chip scale photonic interconnection networks using physical layer analysis
Optical Fiber Communication Conference, 2010Co-Authors: Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, Keren BergmanAbstract:Chip-scale photonic interconnection networks have emerged as a promising technology solution that can address many of the scalability challenges facing the communication networks in next-generation high-performance multicore processors. Photonic interconnects can offer significantly higher Bandwidth Density, lower latencies, and better energy efficiency. Even though photonics exhibits these inherent advantages over electronics, the network designs that can successfully leverage these benefits cannot be straightforwardly extracted from typical electronic network methodologies and must consider the many unique physical-layer constraints of optical technologies. We conduct an architectural exploration of four chip-scale photonic interconnection networks in a novel simulation environment, measuring insertion loss, crosstalk, and power. We also explain and demonstrate the impact of these physical-layer metrics on the scalability, performance, and realizability of each design.
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SC - Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing
2010 ACM IEEE International Conference for High Performance Computing Networking Storage and Analysis, 2010Co-Authors: Gilbert Hendry, Johnnie Chan, Luca P Carloni, Eric Robinson, Vitaliy Gleyzer, Nadya T. Bliss, Keren BergmanAbstract:As advancements in CMOS technology trend toward ever increasing core counts in chip multiprocessors for high-performance embedded computing, the discrepancy between on- and off-chip communication Bandwidth continues to widen due to the power and spatial constraints of electronic off-chip signaling. Silicon photonics-based communication offers many advantages over electronics for network-on-chip design, namely power consumption that is effectively agnostic to distance traveled at the chip- and board-scale, even across chip boundaries. In this work we develop a design for a photonic network-on-chip with integrated DRAM I/O interfaces and compare its performance to similar electronic solutions using a detailed network-on-chip simulation. When used in a circuit-switched network, silicon nanophotonic switches offer higher Bandwidth Density and low power transmission, adding up to over 10x better performance and 3-5x lower power over the baseline for projective transform, matrix multiply, and Fast Fourier Transform (FFT), all key algorithms in embedded real-time signal and image processing.
Johnnie Chan - One of the best experts on this subject based on the ideXlab platform.
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Physical-layer modeling and system-level design of chip-scale photonic interconnection networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2011Co-Authors: Johnnie Chan, Gilbert Hendry, Keren Bergman, Luca P CarloniAbstract:Photonic technology is becoming an increasingly attractive solution to the problems facing today's electronic chip-scale interconnection networks. Recent progress in silicon photonics research has enabled the demonstration of all the necessary optical building blocks for creating extremely high-Bandwidth Density and energy-efficient links for on-chip and off-chip communications. From the feasibility and architecture perspective however, photonics represents a dramatic paradigm shift from traditional electronic network designs due to fundamental differences in how electronics and photonics function and behave. As a result of these differences, new modeling and analysis methods must be employed in order to properly realize a functional photonic chip-scale interconnect design. In this paper, we present a methodology for characterizing and modeling fundamental photonic building blocks which can subsequently be combined to form full photonic network architectures. We also describe a set of tools which can be utilized to assess the physical-layer and system-level performance properties of a photonic network. The models and tools are integrated in a novel open-source design and simulation environment. We present a case study of two different photonic networks-on-chip to demonstrate how our improved understanding and modeling of the physical-layer details of photonic communications can be used to better understand the system-level performance impact.
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architectural design exploration of chip scale photonic interconnection networks using physical layer analysis
Optical Fiber Communication Conference, 2010Co-Authors: Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, Keren BergmanAbstract:Chip-scale photonic interconnection networks have emerged as a promising technology solution that can address many of the scalability challenges facing the communication networks in next-generation high-performance multicore processors. Photonic interconnects can offer significantly higher Bandwidth Density, lower latencies, and better energy efficiency. Even though photonics exhibits these inherent advantages over electronics, the network designs that can successfully leverage these benefits cannot be straightforwardly extracted from typical electronic network methodologies and must consider the many unique physical-layer constraints of optical technologies. We conduct an architectural exploration of four chip-scale photonic interconnection networks in a novel simulation environment, measuring insertion loss, crosstalk, and power. We also explain and demonstrate the impact of these physical-layer metrics on the scalability, performance, and realizability of each design.
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SC - Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing
2010 ACM IEEE International Conference for High Performance Computing Networking Storage and Analysis, 2010Co-Authors: Gilbert Hendry, Johnnie Chan, Luca P Carloni, Eric Robinson, Vitaliy Gleyzer, Nadya T. Bliss, Keren BergmanAbstract:As advancements in CMOS technology trend toward ever increasing core counts in chip multiprocessors for high-performance embedded computing, the discrepancy between on- and off-chip communication Bandwidth continues to widen due to the power and spatial constraints of electronic off-chip signaling. Silicon photonics-based communication offers many advantages over electronics for network-on-chip design, namely power consumption that is effectively agnostic to distance traveled at the chip- and board-scale, even across chip boundaries. In this work we develop a design for a photonic network-on-chip with integrated DRAM I/O interfaces and compare its performance to similar electronic solutions using a detailed network-on-chip simulation. When used in a circuit-switched network, silicon nanophotonic switches offer higher Bandwidth Density and low power transmission, adding up to over 10x better performance and 3-5x lower power over the baseline for projective transform, matrix multiply, and Fast Fourier Transform (FFT), all key algorithms in embedded real-time signal and image processing.
