The Experts below are selected from a list of 15648 Experts worldwide ranked by ideXlab platform
Edward S. Davidson - One of the best experts on this subject based on the ideXlab platform.
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architectural vs delivered performance of the ibm rs 6000 and the astronautics zs 1
Hawaii International Conference on System Sciences, 1991Co-Authors: W Mangionesmith, Santosh G. Abraham, Edward S. DavidsonAbstract:The paper presents a comparative performance evaluation of two novel superscalar Architectures, the IBM RS/6000 and the Astronautics ZS-1. The machine Architectures are presented to lay the groundwork for discussing performance issues, with a RISC Architecture, the Decstation 3100, serving as a Baseline Architecture. Important qualitative observations are made to highlight similarities between the RS/6000 and the ZS-1. Performance measurements from running systems are presented to examine delivered performance. An analytic method of bounding machine performance is introduced to help strip out implementation related details. By comparing these performance bounds, and their component terms, to the achieved performance, the authors assess how well an application code does and how well it might do, in capitalizing on the available performance. Common sources of performance losses are revealed, areas for improvement are highlighted, and specific improvements are suggested. >
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Architectural vs. delivered performance of the IBM RS/6000 and the Astronautics ZS-1
Proceedings of the Twenty-Fourth Annual Hawaii International Conference on System Sciences, 1Co-Authors: William H. Mangione-smith, Santosh G. Abraham, Edward S. DavidsonAbstract:The paper presents a comparative performance evaluation of two novel superscalar Architectures, the IBM RS/6000 and the Astronautics ZS-1. The machine Architectures are presented to lay the groundwork for discussing performance issues, with a RISC Architecture, the Decstation 3100, serving as a Baseline Architecture. Important qualitative observations are made to highlight similarities between the RS/6000 and the ZS-1. Performance measurements from running systems are presented to examine delivered performance. An analytic method of bounding machine performance is introduced to help strip out implementation related details. By comparing these performance bounds, and their component terms, to the achieved performance, the authors assess how well an application code does and how well it might do, in capitalizing on the available performance. Common sources of performance losses are revealed, areas for improvement are highlighted, and specific improvements are suggested. >
Martin Haenggi - One of the best experts on this subject based on the ideXlab platform.
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1The Mean Interference-to-Signal Ratio and its Key Role in Cellular and Amorphous Networks
2016Co-Authors: Martin HaenggiAbstract:Abstract—We introduce a simple yet powerful and versatile analytical framework to approximate the SIR distribution in the downlink of cellular systems. It is based on the mean interference-to-signal ratio and yields the horizontal gap (SIR gain) between the SIR distribution in question and a reference SIR distribution. As applications, we determine the SIR gain for base station silencing, cooperation, and lattice deployment over a Baseline Architecture that is based on a Poisson deployment of base stations and strongest-base station association. The applications demonstrate that the proposed approach unifies several recent results and provides a convenient framework for the analysis and comparison of future network Architectures and transmission schemes, including amorphous networks where a user is served by multiple base stations and, consequently, (hard) cell association becomes less relevant. Index Terms—Stochastic geometry, Poisson point process, in-terference, coverage, cellular network, HetNets
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the mean interference to signal ratio and its key role in cellular and amorphous networks
IEEE Wireless Communications Letters, 2014Co-Authors: Martin HaenggiAbstract:We introduce a simple yet powerful and versatile analytical framework for approximating the SIR distribution in the downlink of cellular systems. It is based on the mean interference-to-signal ratio and yields the horizontal gap (SIR gain) between the SIR distribution in question and a reference SIR distribution. As applications, we determine the SIR gain for base station silencing, cooperation, and lattice deployment over a Baseline Architecture that is based on a Poisson deployment of base stations and strongest-base station association. The applications demonstrate that the proposed approach unifies several recent results and provides a convenient framework for the analysis and comparison of future network Architectures and transmission schemes, including amorphous networks where a user is served by multiple base stations and, consequently, (hard) cell association becomes less relevant.
W Mangionesmith - One of the best experts on this subject based on the ideXlab platform.
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architectural vs delivered performance of the ibm rs 6000 and the astronautics zs 1
Hawaii International Conference on System Sciences, 1991Co-Authors: W Mangionesmith, Santosh G. Abraham, Edward S. DavidsonAbstract:The paper presents a comparative performance evaluation of two novel superscalar Architectures, the IBM RS/6000 and the Astronautics ZS-1. The machine Architectures are presented to lay the groundwork for discussing performance issues, with a RISC Architecture, the Decstation 3100, serving as a Baseline Architecture. Important qualitative observations are made to highlight similarities between the RS/6000 and the ZS-1. Performance measurements from running systems are presented to examine delivered performance. An analytic method of bounding machine performance is introduced to help strip out implementation related details. By comparing these performance bounds, and their component terms, to the achieved performance, the authors assess how well an application code does and how well it might do, in capitalizing on the available performance. Common sources of performance losses are revealed, areas for improvement are highlighted, and specific improvements are suggested. >
Kenji Kise - One of the best experts on this subject based on the ideXlab platform.
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an efficient instruction fetch Architecture for a risc v soft processor on an fpga
Heart, 2019Co-Authors: Hiromu Miyazaki, Junya Miura, Kenji KiseAbstract:To reduce the code size of application programs for RISC-V soft processors on an FPGA, it is desirable for the processor to support the RISC-V compressed instruction extension. In this paper, we implement an efficient instruction fetch unit. We clarify the problem of instruction fetching in pipelining processors that support the extension. To solve the problem of instruction fetching, we propose two instruction fetch units using a decompressed cache and a compressed cache, respectively. We implement the proposed fetch units and evaluate their performance, hardware resources, and operating frequency. Through the evaluation, we show that the proposed unit with a compressed cache is the best and achieves 21.8% better fetch performance using reasonable hardware resources than the Baseline Architecture.
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HEART - An Efficient Instruction Fetch Architecture for a RISC-V Soft Processor on an FPGA
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies - HEART 2019, 2019Co-Authors: Hiromu Miyazaki, Junya Miura, Kenji KiseAbstract:To reduce the code size of application programs for RISC-V soft processors on an FPGA, it is desirable for the processor to support the RISC-V compressed instruction extension. In this paper, we implement an efficient instruction fetch unit. We clarify the problem of instruction fetching in pipelining processors that support the extension. To solve the problem of instruction fetching, we propose two instruction fetch units using a decompressed cache and a compressed cache, respectively. We implement the proposed fetch units and evaluate their performance, hardware resources, and operating frequency. Through the evaluation, we show that the proposed unit with a compressed cache is the best and achieves 21.8% better fetch performance using reasonable hardware resources than the Baseline Architecture.
Nasa - One of the best experts on this subject based on the ideXlab platform.
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Space Station Simulation Computer System (SCS) study for NASA/MSFC. Volume 2: Baseline Architecture report
2013Co-Authors: NasaAbstract:NASA's Space Station Freedom Program (SSFP) planning efforts have identified a need for a payload training simulator system to serve as both a training facility and as a demonstrator to validate operational concepts. The envisioned MSFC Payload Training Complex (PTC) required to meet this need will train the Space Station payload scientists, station scientists, and ground controllers to operate the wide variety of experiments that will be onboard the Space Station Freedom. The Simulation Computer System (SCS) is the computer hardware, software, and workstations that will support the Payload Training Complex at MSFC. The purpose of this SCS Study is to investigate issues related to the SCS, alternative requirements, simulator approaches, and state-of-the-art technologies to develop candidate concepts and designs.
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Space Station Simulation Computer System (SCS) study for NASA/MSFC. Volume 1: Baseline Architecture report
2013Co-Authors: NasaAbstract:NASA's Space Station Freedom Program (SSFP) planning efforts have identified a need for a payload training simulator system to serve as both a training facility and as a demonstrator to validate operational concepts. The envisioned MSFC Payload Training Complex (PTC) required to meet this need will train the Space Station payload scientists, station scientists, and ground controllers to operate the wide variety of experiments that will be onboard the Space Station Freedom. The Simulation Computer System (SCS) is made up of the computer hardware, software, and workstations that will support the Payload Training Complex at MSFC. The purpose of this SCS Study is to investigate issues related to the SCS, alternative requirements, simulator approaches, and state-of-the-art technologies to develop candidate concepts and designs.