The Experts below are selected from a list of 216 Experts worldwide ranked by ideXlab platform

Hafiz Md Hasan Babu - One of the best experts on this subject based on the ideXlab platform.

  • Low-power and area efficient binary coded decimal adder design using a look up table-based field programmable gate array
    IET Circuits Devices & Systems, 2016
    Co-Authors: Zarrin Tasnim Sworna, Hafiz Md Hasan Babu, Mubin Ulhaque, Nazma Tara, Ashis Kumar Biswas
    Abstract:

    The binary coded decimal (BCD) system is suitable for digital communication, which can be designed by field programmable gate array (FPGA) technology, where look up table (LUT) is one of the major components of FPGA. In this study, the authors proposed a low power and area efficient LUT-based BCD adder which is constructed basically in three steps: First, a new technique is introduced for the BCD addition to obtain the correct BCD digit. Second, a new controller circuit of LUT is presented which is designed to select and send Read/Write voltage to memory cell for performing Read or Write operation. Finally, a compact BCD adder is designed using the proposed LUT. Their proposed 2-input LUT outperforms the existing best one providing 65.8% improvement in terms of area, 44.1% for Read operation and 43.5% for Write operation in power consumption. The proposed BCD adder using FPGA gains a radical achievement compared with the existing best-known LUT-based BCD adder providing prominent better performance of 65.6% in area and 48.3% less power consumption.

  • efficient approaches for designing reversible binary coded decimal adders
    Microelectronics Journal, 2008
    Co-Authors: Ashis Kumer Biswas, Ahsan Raja Chowdhury, Mahmudul Hasan, Hafiz Md Hasan Babu
    Abstract:

    Reversible logic has become one of the most promising research areas in the past few decades and has found its applications in several technologies; such as low-power CMOS, nanocomputing and optical computing. This paper presents improved and efficient reversible logic implementations for binary coded decimal (BCD) adder as well as Carry Skip BCD adder. It has been shown that the modified designs outperform the existing ones in terms of number of gates, number of garbage outputs, delay, and quantum cost. In order to show the efficiency of the proposed designs, lower bounds of the reversible BCD adders in terms of gates and garbage outputs are proposed as well.

  • VLSI Design - A Novel Approach to Design BCD Adder and Carry Skip BCD Adder
    21st International Conference on VLSI Design (VLSID 2008), 2008
    Co-Authors: Ashis Kumer Biswas, Ahsan Raja Chowdhury, Mahmudul Hasan, Muhammad Sami Hasan, Hafiz Md Hasan Babu
    Abstract:

    Reversible logic has become one of the most promising research areas in the past few decades and has found its applications in several technologies; such as low power CMOS, nanocomputing and optical computing. This paper presents improved and efficient reversible logic implementations for binary coded decimal (BCD) adder as well as Carry Skip BCD adder. It has been shown that the modified designs outperform the existing ones in terms of number of gates, number of garbage output and delay.

  • Design of a compact reversible binary coded decimal adder circuit
    Journal of Systems Architecture, 2006
    Co-Authors: Hafiz Md Hasan Babu, Ahsan Raja Chowdhury
    Abstract:

    Reversible logic is an emerging research area and getting remarkable interests over the past few years. Interest is sparked in reversible logic by its applications in several technologies, such as quantum, optical, thermodynamics and adiabatic CMOS. This paper represents a synthesis method to realize reversible binary coded decimal adder circuit. Firstly, a reversible full-adder circuit has been proposed that shows the improvement over the two existing circuits. A lower bound is also proposed for the reversible full-adder circuit on the number of garbage outputs (bits needed for reversibility, but not required for the output of the circuit). After that, a final improvement is presented for the reversible full-adder circuit. Finally, a new reversible circuit has been proposed, namely reversible binary coded decimal (BCD) adder, which is the first ever proposed in reversible logic synthesis. In the way to propose reversible BCD adder, a reversible n-bits parallel adder circuit is also shown. Lower bounds for the reversible BCD adder in terms of number of garbage outputs and number of reversible gates are also shown. Delay has also been calculated for each circuit.

  • design of a reversible binary coded decimal adder by using reversible 4 bit parallel adder
    International Conference on VLSI Design, 2005
    Co-Authors: Hafiz Md Hasan Babu, Ahsan Raja Chowdhury
    Abstract:

    In this paper, we have proposed a design technique for the reversible circuit of binary coded decimal (BCD) adder. The proposed circuit has the ability to add two 4-bits binary variables and it transforms the addition into the appropriate BCD number with efficient error correcting modules where the operations are reversible. We also show that the proposed design technique generates the reversible BCD adder circuit with minimum number of gates as well as the minimum number of garbage outputs.

Ahsan Raja Chowdhury - One of the best experts on this subject based on the ideXlab platform.

  • efficient approaches for designing reversible binary coded decimal adders
    Microelectronics Journal, 2008
    Co-Authors: Ashis Kumer Biswas, Ahsan Raja Chowdhury, Mahmudul Hasan, Hafiz Md Hasan Babu
    Abstract:

    Reversible logic has become one of the most promising research areas in the past few decades and has found its applications in several technologies; such as low-power CMOS, nanocomputing and optical computing. This paper presents improved and efficient reversible logic implementations for binary coded decimal (BCD) adder as well as Carry Skip BCD adder. It has been shown that the modified designs outperform the existing ones in terms of number of gates, number of garbage outputs, delay, and quantum cost. In order to show the efficiency of the proposed designs, lower bounds of the reversible BCD adders in terms of gates and garbage outputs are proposed as well.

  • VLSI Design - A Novel Approach to Design BCD Adder and Carry Skip BCD Adder
    21st International Conference on VLSI Design (VLSID 2008), 2008
    Co-Authors: Ashis Kumer Biswas, Ahsan Raja Chowdhury, Mahmudul Hasan, Muhammad Sami Hasan, Hafiz Md Hasan Babu
    Abstract:

    Reversible logic has become one of the most promising research areas in the past few decades and has found its applications in several technologies; such as low power CMOS, nanocomputing and optical computing. This paper presents improved and efficient reversible logic implementations for binary coded decimal (BCD) adder as well as Carry Skip BCD adder. It has been shown that the modified designs outperform the existing ones in terms of number of gates, number of garbage output and delay.

  • Design of a compact reversible binary coded decimal adder circuit
    Journal of Systems Architecture, 2006
    Co-Authors: Hafiz Md Hasan Babu, Ahsan Raja Chowdhury
    Abstract:

    Reversible logic is an emerging research area and getting remarkable interests over the past few years. Interest is sparked in reversible logic by its applications in several technologies, such as quantum, optical, thermodynamics and adiabatic CMOS. This paper represents a synthesis method to realize reversible binary coded decimal adder circuit. Firstly, a reversible full-adder circuit has been proposed that shows the improvement over the two existing circuits. A lower bound is also proposed for the reversible full-adder circuit on the number of garbage outputs (bits needed for reversibility, but not required for the output of the circuit). After that, a final improvement is presented for the reversible full-adder circuit. Finally, a new reversible circuit has been proposed, namely reversible binary coded decimal (BCD) adder, which is the first ever proposed in reversible logic synthesis. In the way to propose reversible BCD adder, a reversible n-bits parallel adder circuit is also shown. Lower bounds for the reversible BCD adder in terms of number of garbage outputs and number of reversible gates are also shown. Delay has also been calculated for each circuit.

  • design of a reversible binary coded decimal adder by using reversible 4 bit parallel adder
    International Conference on VLSI Design, 2005
    Co-Authors: Hafiz Md Hasan Babu, Ahsan Raja Chowdhury
    Abstract:

    In this paper, we have proposed a design technique for the reversible circuit of binary coded decimal (BCD) adder. The proposed circuit has the ability to add two 4-bits binary variables and it transforms the addition into the appropriate BCD number with efficient error correcting modules where the operations are reversible. We also show that the proposed design technique generates the reversible BCD adder circuit with minimum number of gates as well as the minimum number of garbage outputs.

  • VLSI Design - Design of a reversible binary coded decimal adder by using reversible 4-bit parallel adder
    18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 1
    Co-Authors: Hafiz Md Hasan Babu, Ahsan Raja Chowdhury
    Abstract:

    In this paper, we have proposed a design technique for the reversible circuit of binary coded decimal (BCD) adder. The proposed circuit has the ability to add two 4-bits binary variables and it transforms the addition into the appropriate BCD number with efficient error correcting modules where the operations are reversible. We also show that the proposed design technique generates the reversible BCD adder circuit with minimum number of gates as well as the minimum number of garbage outputs.

Namkyoo Park - One of the best experts on this subject based on the ideXlab platform.

  • all optical gray code to binary coded decimal converter
    Korean Journal of Optics and Photonics, 2008
    Co-Authors: Young Jin Jung, Namkyoo Park, Youngmin Jhon, Deok Ha Woo, Seok Lee
    Abstract:

    An all-optical 4-bit Gray code to binary coded decimal (BCD) converter by means of commercially available numerical analysis tool (VPI) was demonstrated, for the first time to our knowledge. Circuit design approach was modified appropriately in order to fit the electrical method on an all-optical logic circuit based on a cross gain modulation (XGM) process so that signal degradation due to the non-ideal optical logic gates can be minimized. Without regenerations, Q-factor of around 4 was obtained for the most severely degraded output bit (least significant bit-LSB) with 2.5 Gbps clean input signals having 20 dB extinction ratio. While modifying the two-level simplification method and Karnaugh map method to design a Gray code to BCD converter, a general design concept was also founded (one-level simplification) in this research, not only for the Gray code to BCD converter but also for any general applications.

  • all optical 4 bit gray code to binary coded decimal converter
    Proceedings of SPIE the International Society for Optical Engineering, 2008
    Co-Authors: Young Ji Jung, Seok Lee, Namkyoo Park
    Abstract:

    ABSTRACT All-optical 4-bit Gray code to binary coded decimal (BCD) converter was demonstrated, for the first time in our knowledge, with the number of 12 SOAs by means of commercially available numerical analysis tool (VPI). Circuit design approach was modified appropriately in order to fit the electrical method on an all-optical logic circuit based on cross gain modulation (XGM) process so that signal degradation due to the non-ideal optical logic gates can be minimized. In our approach, only using XGM process as a nonlinear function, the maximum number of XGM process serially underwent by input signals is twice at the most insuring signal quality. Without regenerations, Q-factor of around 4 was obtained for the most severely degraded output bit (least significant bit - LSB) with 2.5Gbps clean input signals having 20dB extinction ratio. It is worth to note that, implementing this LSB is complex enough to give it as an example of a 4-bit conversion system. While modifying two-level simplification method and Karnaugh map method to design Gray code to BCD converter, general design concept was also founded in this research not only for the Gray code to BCD converter but also for any general applications such as encoder / decoder, multiplexer / demultiplexer, and read only memory so that readers can develop their own all-optical logic device easily using XGM process in SOAs. Keywords: all optical converter, binary coded decimal, combinational logic circuit, cross gain modulation, gray code, one level simplification method, semiconductor optical amplifier, two level simplification method

  • One-Level Simplification Method for All-Optical Combinational Logic Circuits
    IEEE Photonics Technology Letters, 2008
    Co-Authors: Young Jin Jung, Youngmin Jhon, Namkyoo Park
    Abstract:

    We propose a novel one-level simplification method for all-optical combinational logic circuits. With the proposed method, an all-optical gray code to binary coded decimal converter is successfully developed for the first time by using conventional semiconductor optical amplifiers as building elements. In comparison to the construction algorithm based on the conventional two-level simplification method, a significant improvement is observed in the Q-factor.

  • All-Optical Digital Logic Circuit based on NOR-Only Two-Level Simplification Method
    COIN-ACOFT 2007 - Joint International Conference on the Optical Internet and the 32nd Australian Conference on Optical Fibre Technology, 2007
    Co-Authors: Young Jin Jung, Namkyoo Park, Chang Wan Son, Seok Lee
    Abstract:

    For the first time, we suggest the application of NOR-only two-level simplification method for the construction of flexible all-optical digital logic circuit. Arbitrary Boolean function operation and decoding of gray code to binary coded decimal (BCD) are demonstrated with the suggested approach.

Young Jin Jung - One of the best experts on this subject based on the ideXlab platform.

  • all optical gray code to binary coded decimal converter
    Korean Journal of Optics and Photonics, 2008
    Co-Authors: Young Jin Jung, Namkyoo Park, Youngmin Jhon, Deok Ha Woo, Seok Lee
    Abstract:

    An all-optical 4-bit Gray code to binary coded decimal (BCD) converter by means of commercially available numerical analysis tool (VPI) was demonstrated, for the first time to our knowledge. Circuit design approach was modified appropriately in order to fit the electrical method on an all-optical logic circuit based on a cross gain modulation (XGM) process so that signal degradation due to the non-ideal optical logic gates can be minimized. Without regenerations, Q-factor of around 4 was obtained for the most severely degraded output bit (least significant bit-LSB) with 2.5 Gbps clean input signals having 20 dB extinction ratio. While modifying the two-level simplification method and Karnaugh map method to design a Gray code to BCD converter, a general design concept was also founded (one-level simplification) in this research, not only for the Gray code to BCD converter but also for any general applications.

  • One-Level Simplification Method for All-Optical Combinational Logic Circuits
    IEEE Photonics Technology Letters, 2008
    Co-Authors: Young Jin Jung, Youngmin Jhon, Namkyoo Park
    Abstract:

    We propose a novel one-level simplification method for all-optical combinational logic circuits. With the proposed method, an all-optical gray code to binary coded decimal converter is successfully developed for the first time by using conventional semiconductor optical amplifiers as building elements. In comparison to the construction algorithm based on the conventional two-level simplification method, a significant improvement is observed in the Q-factor.

  • One-Level Simplification Method for All-Optical
    2008
    Co-Authors: Young Jin Jung, Chang Wan, Seok Lee
    Abstract:

    We propose a novel one-level simplification method for all-optical combinational logic circuits. With the proposed method, an all-optical gray code to binary coded decimal converter is successfully developed for the first time by using conventional semiconductor optical amplifiers as building elements. In com- parison to the construction algorithm based on the conventional two-level simplification method, a significant improvement is observed in the -factor. Index Terms—All-optical logic circuits, cross-gain modulation (XGM), semiconductor optical amplifier (SOA).

  • All-Optical Digital Logic Circuit based on NOR-Only Two-Level Simplification Method
    COIN-ACOFT 2007 - Joint International Conference on the Optical Internet and the 32nd Australian Conference on Optical Fibre Technology, 2007
    Co-Authors: Young Jin Jung, Namkyoo Park, Chang Wan Son, Seok Lee
    Abstract:

    For the first time, we suggest the application of NOR-only two-level simplification method for the construction of flexible all-optical digital logic circuit. Arbitrary Boolean function operation and decoding of gray code to binary coded decimal (BCD) are demonstrated with the suggested approach.

Seok Lee - One of the best experts on this subject based on the ideXlab platform.

  • all optical gray code to binary coded decimal converter
    Korean Journal of Optics and Photonics, 2008
    Co-Authors: Young Jin Jung, Namkyoo Park, Youngmin Jhon, Deok Ha Woo, Seok Lee
    Abstract:

    An all-optical 4-bit Gray code to binary coded decimal (BCD) converter by means of commercially available numerical analysis tool (VPI) was demonstrated, for the first time to our knowledge. Circuit design approach was modified appropriately in order to fit the electrical method on an all-optical logic circuit based on a cross gain modulation (XGM) process so that signal degradation due to the non-ideal optical logic gates can be minimized. Without regenerations, Q-factor of around 4 was obtained for the most severely degraded output bit (least significant bit-LSB) with 2.5 Gbps clean input signals having 20 dB extinction ratio. While modifying the two-level simplification method and Karnaugh map method to design a Gray code to BCD converter, a general design concept was also founded (one-level simplification) in this research, not only for the Gray code to BCD converter but also for any general applications.

  • all optical 4 bit gray code to binary coded decimal converter
    Proceedings of SPIE the International Society for Optical Engineering, 2008
    Co-Authors: Young Ji Jung, Seok Lee, Namkyoo Park
    Abstract:

    ABSTRACT All-optical 4-bit Gray code to binary coded decimal (BCD) converter was demonstrated, for the first time in our knowledge, with the number of 12 SOAs by means of commercially available numerical analysis tool (VPI). Circuit design approach was modified appropriately in order to fit the electrical method on an all-optical logic circuit based on cross gain modulation (XGM) process so that signal degradation due to the non-ideal optical logic gates can be minimized. In our approach, only using XGM process as a nonlinear function, the maximum number of XGM process serially underwent by input signals is twice at the most insuring signal quality. Without regenerations, Q-factor of around 4 was obtained for the most severely degraded output bit (least significant bit - LSB) with 2.5Gbps clean input signals having 20dB extinction ratio. It is worth to note that, implementing this LSB is complex enough to give it as an example of a 4-bit conversion system. While modifying two-level simplification method and Karnaugh map method to design Gray code to BCD converter, general design concept was also founded in this research not only for the Gray code to BCD converter but also for any general applications such as encoder / decoder, multiplexer / demultiplexer, and read only memory so that readers can develop their own all-optical logic device easily using XGM process in SOAs. Keywords: all optical converter, binary coded decimal, combinational logic circuit, cross gain modulation, gray code, one level simplification method, semiconductor optical amplifier, two level simplification method

  • One-Level Simplification Method for All-Optical
    2008
    Co-Authors: Young Jin Jung, Chang Wan, Seok Lee
    Abstract:

    We propose a novel one-level simplification method for all-optical combinational logic circuits. With the proposed method, an all-optical gray code to binary coded decimal converter is successfully developed for the first time by using conventional semiconductor optical amplifiers as building elements. In com- parison to the construction algorithm based on the conventional two-level simplification method, a significant improvement is observed in the -factor. Index Terms—All-optical logic circuits, cross-gain modulation (XGM), semiconductor optical amplifier (SOA).

  • All-Optical Digital Logic Circuit based on NOR-Only Two-Level Simplification Method
    COIN-ACOFT 2007 - Joint International Conference on the Optical Internet and the 32nd Australian Conference on Optical Fibre Technology, 2007
    Co-Authors: Young Jin Jung, Namkyoo Park, Chang Wan Son, Seok Lee
    Abstract:

    For the first time, we suggest the application of NOR-only two-level simplification method for the construction of flexible all-optical digital logic circuit. Arbitrary Boolean function operation and decoding of gray code to binary coded decimal (BCD) are demonstrated with the suggested approach.