The Experts below are selected from a list of 144 Experts worldwide ranked by ideXlab platform

Viktor K. Prasanna - One of the best experts on this subject based on the ideXlab platform.

  • DOSA: design optimizer for scientific applications
    2008 IEEE International Symposium on Parallel and Distributed Processing, 2008
    Co-Authors: David A. Bader, Viktor K. Prasanna
    Abstract:

    In this paper we briefly introduce our new framework, called "design optimizer for scientific applications" (DOSA) which allows the programmer or Compiler Writer to explore alternative designs and optimize for speed (or power) at design-time and use a run-time optimizer. The run-time system is a portable interface that enables dynamic application optimization by interfacing with the output of DOSA. As an illustration we demonstrate speed up for two applications: parallel exact inference and community identification in large-scale networks.

  • DOSA: Design Optimizer for Scientific Applications
    2007 IEEE International Parallel and Distributed Processing Symposium, 2007
    Co-Authors: David A. Bader, Viktor K. Prasanna
    Abstract:

    In this work, we propose an application composition system (ACS) that allows design-time exploration and automatic run-time optimizations so that we relieve application programmers and Compiler Writers from the challenging task of optimizing the computation in order to achieve high performance. Our new framework, called "design optimizer for scientific applications" (DOSA), allows the programmer or Compiler Writer to explore alternative designs and optimize for speed (or power) at design-time and use its run-time optimizer as an automatic ACS. The ACS constructs an efficient application that dynamically adapts to changes in the underlying execution environment based on the kernel model, architecture, system features, available resources, and performance feedback. The run-time system is a portable interface that enables dynamic application optimization by interfacing with the output of DOSA. It thus provides an application composition system that determines suitable components and performs continuous performance optimizations. We focus on utilizing advanced architectural features and memory-centric optimizations that reduce the I/O complexity, cache pollution, and processor-memory traffic, in order to achieve high performance. The design-time effort uses a computer-aided design space exploration that provides a user-friendly graphical modeling environment, high-level performance estimation and profiling, and the ability to integrate low-level simulators suitable for HPC architectures.

  • IPDPS - DOSA: Design Optimizer for Scientific Applications
    2007 IEEE International Parallel and Distributed Processing Symposium, 2007
    Co-Authors: David A. Bader, Viktor K. Prasanna
    Abstract:

    In this work, we propose an application composition system (ACS) that allows design-time exploration and automatic run-time optimizations so that we relieve application programmers and Compiler Writers from the challenging task of optimizing the computation in order to achieve high performance. Our new framework, called "design optimizer for scientific applications" (DOSA), allows the programmer or Compiler Writer to explore alternative designs and optimize for speed (or power) at design-time and use its run-time optimizer as an automatic ACS. The ACS constructs an efficient application that dynamically adapts to changes in the underlying execution environment based on the kernel model, architecture, system features, available resources, and performance feedback. The run-time system is a portable interface that enables dynamic application optimization by interfacing with the output of DOSA. It thus provides an application composition system that determines suitable components and performs continuous performance optimizations. We focus on utilizing advanced architectural features and memory-centric optimizations that reduce the I/O complexity, cache pollution, and processor-memory traffic, in order to achieve high performance. The design-time effort uses a computer-aided design space exploration that provides a user-friendly graphical modeling environment, high-level performance estimation and profiling, and the ability to integrate low-level simulators suitable for HPC architectures.

David A. Bader - One of the best experts on this subject based on the ideXlab platform.

  • DOSA: design optimizer for scientific applications
    2008 IEEE International Symposium on Parallel and Distributed Processing, 2008
    Co-Authors: David A. Bader, Viktor K. Prasanna
    Abstract:

    In this paper we briefly introduce our new framework, called "design optimizer for scientific applications" (DOSA) which allows the programmer or Compiler Writer to explore alternative designs and optimize for speed (or power) at design-time and use a run-time optimizer. The run-time system is a portable interface that enables dynamic application optimization by interfacing with the output of DOSA. As an illustration we demonstrate speed up for two applications: parallel exact inference and community identification in large-scale networks.

  • DOSA: Design Optimizer for Scientific Applications
    2007 IEEE International Parallel and Distributed Processing Symposium, 2007
    Co-Authors: David A. Bader, Viktor K. Prasanna
    Abstract:

    In this work, we propose an application composition system (ACS) that allows design-time exploration and automatic run-time optimizations so that we relieve application programmers and Compiler Writers from the challenging task of optimizing the computation in order to achieve high performance. Our new framework, called "design optimizer for scientific applications" (DOSA), allows the programmer or Compiler Writer to explore alternative designs and optimize for speed (or power) at design-time and use its run-time optimizer as an automatic ACS. The ACS constructs an efficient application that dynamically adapts to changes in the underlying execution environment based on the kernel model, architecture, system features, available resources, and performance feedback. The run-time system is a portable interface that enables dynamic application optimization by interfacing with the output of DOSA. It thus provides an application composition system that determines suitable components and performs continuous performance optimizations. We focus on utilizing advanced architectural features and memory-centric optimizations that reduce the I/O complexity, cache pollution, and processor-memory traffic, in order to achieve high performance. The design-time effort uses a computer-aided design space exploration that provides a user-friendly graphical modeling environment, high-level performance estimation and profiling, and the ability to integrate low-level simulators suitable for HPC architectures.

  • IPDPS - DOSA: Design Optimizer for Scientific Applications
    2007 IEEE International Parallel and Distributed Processing Symposium, 2007
    Co-Authors: David A. Bader, Viktor K. Prasanna
    Abstract:

    In this work, we propose an application composition system (ACS) that allows design-time exploration and automatic run-time optimizations so that we relieve application programmers and Compiler Writers from the challenging task of optimizing the computation in order to achieve high performance. Our new framework, called "design optimizer for scientific applications" (DOSA), allows the programmer or Compiler Writer to explore alternative designs and optimize for speed (or power) at design-time and use its run-time optimizer as an automatic ACS. The ACS constructs an efficient application that dynamically adapts to changes in the underlying execution environment based on the kernel model, architecture, system features, available resources, and performance feedback. The run-time system is a portable interface that enables dynamic application optimization by interfacing with the output of DOSA. It thus provides an application composition system that determines suitable components and performs continuous performance optimizations. We focus on utilizing advanced architectural features and memory-centric optimizations that reduce the I/O complexity, cache pollution, and processor-memory traffic, in order to achieve high performance. The design-time effort uses a computer-aided design space exploration that provides a user-friendly graphical modeling environment, high-level performance estimation and profiling, and the ability to integrate low-level simulators suitable for HPC architectures.

Wenheng Chung - One of the best experts on this subject based on the ideXlab platform.

  • mapping high level programming languages to opencl 2 0 a Compiler Writer s perspective
    2015
    Co-Authors: Ijui Sung, Wenheng Chung
    Abstract:

    While OpenCL was originally designed as an application programming interface (API) for human developers, it can also serve as an implementation platform for higher-level object-oriented programming languages such as C++. Targeting OpenCL rather than vendor-specific platforms allows high-level language Compiler developers to focus on language implementation issues rather than the vendor-specific intricacies across different types of devices in a heterogeneous computing system. In this chapter, we show that OpenCL 2.0 provides a strong foundation for implementing C++ Accelerated Massive Parallelism (AMP), a parallel extension to C++. We show a mapping of C++ AMP constructs to OpenCL. We also demonstrate that the OpenCL kernels generated from C++ AMP parallel_for_all and related constructs with automatically generated data transfer API calls can achieve a performance level that is comparable to that of hand-coded OpenCL kernels. We expect that Compiler developers who need to target other high-level languages to heterogeneous computing systems will benefit from the techniques and experience presented in this chapter.

  • chapter 11 mapping high level programming languages to opencl 2 0 a Compiler Writer s perspective
    Heterogeneous Computing with OpenCL 2.0 (Third Edition), 2015
    Co-Authors: Ijui Sung, Wenheng Chung
    Abstract:

    While OpenCL was originally designed as an application programming interface (API) for human developers, it can also serve as an implementation platform for higher-level object-oriented programming languages such as C++. Targeting OpenCL rather than vendor-specific platforms allows high-level language Compiler developers to focus on language implementation issues rather than the vendor-specific intricacies across different types of devices in a heterogeneous computing system. In this chapter, we show that OpenCL 2.0 provides a strong foundation for implementing C++ Accelerated Massive Parallelism (AMP), a parallel extension to C++. We show a mapping of C++ AMP constructs to OpenCL. We also demonstrate that the OpenCL kernels generated from C++ AMP parallel_for_all and related constructs with automatically generated data transfer API calls can achieve a performance level that is comparable to that of hand-coded OpenCL kernels. We expect that Compiler developers who need to target other high-level languages to heterogeneous computing systems will benefit from the techniques and experience presented in this chapter.

E. Lassila - One of the best experts on this subject based on the ideXlab platform.

  • EUROMICRO - A macro expansion approach to embedded processor code generation
    Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies, 1996
    Co-Authors: E. Lassila
    Abstract:

    This paper describes an experimental prototype of a code generation tool for embedded special-purpose processors. The tool is a retargetable assembly-code-level macro expander capable of program flow analysis. The main advantage of the tool is its strong support for macro hierarchy: hierarchical macro libraries make the code (produced either by the Compiler Writer or by the assembly language programmer) more modular.

  • A macro expansion approach to embedded processor code generation
    Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies, 1996
    Co-Authors: E. Lassila
    Abstract:

    This paper describes an experimental prototype of a code generation tool for embedded special-purpose processors. The tool is a retargetable assembly-code-level macro expander capable of program flow analysis. The main advantage of the tool is its strong support for macro hierarchy: hierarchical macro libraries make the code (produced either by the Compiler Writer or by the assembly language programmer) more modular.

Charles C. Weems - One of the best experts on this subject based on the ideXlab platform.

  • Towards universal code generator generation
    2008 IEEE International Symposium on Parallel and Distributed Processing, 2008
    Co-Authors: Timothy Richards, Edward K. Walters, Eliot J. B. Moss, Trek Palmer, Charles C. Weems
    Abstract:

    One of the most difficult tasks a Compiler Writer faces is the construction of the code generator. The code generator is that part of the Compiler that translates Compiler intermediate representation (IR) into instructions for a target machine. Unfortunately, implementing a code generator "by hand" is a difficult, time consuming, and error prone task. The details of both the IR and target instruction set must be carefully considered in order to generate correct and efficient code. This, in turn, requires an expert in both the Compiler internals as well as the target machine. Even an expert, however, can produce a code generator that is difficult to verify and debug. In this paper we present a universal approach for automating the construction of correct code generators. In particular, we show that both the Compiler IR and target instruction set semantics can be described by a machine description language and leveraged by a heuristic search procedure to derive code generator patterns. We then utilize formal methods to determine if the IR and target sequence pairs that make up these patterns are semantically equivalent.