The Experts below are selected from a list of 7755 Experts worldwide ranked by ideXlab platform

Michael Stadler - One of the best experts on this subject based on the ideXlab platform.

  • method for autonomous driving in a car wash module and motor vehicle
    2014
    Co-Authors: Michael Stadler
    Abstract:

    A method for autonomously driving a motor vehicle in a car wash to enhance comfort and safety includes detecting a passageway of the car wash and determine with vehicle sensors the vehicle position and the vehicle orientation of the vehicle relative to the passageway. The vehicle is subsequently automatically driven (S2) into the car wash based on the vehicle position and the vehicle orientation, and automatically stopped (S3) in a washing position. After washing is complete, a Completion Signal Signaling Completion of a working step of the car wash is received or detected by the motor vehicle. Finally, the motor vehicle is automatically driven out (S8) of the car wash in response to the Completion Signal.

  • method for autonomous driving in a car wash and a motor vehicle
    2013
    Co-Authors: Michael Stadler
    Abstract:

    A method for autonomously driving a motor vehicle in a car wash to enhance comfort and safety includes detecting a passageway of the car wash and determine with vehicle sensors the vehicle position and the vehicle orientation of the vehicle relative to the passageway. The vehicle is subsequently automatically driven into the car wash based on the vehicle position and the vehicle orientation, and automatically stopped in a washing position. After washing is complete, a Completion Signal Signaling Completion of a working step of the car wash is received or detected by the motor vehicle. Finally, the motor vehicle is automatically driven out of the car wash in response to the Completion Signal.

Byungdo Yang - One of the best experts on this subject based on the ideXlab platform.

  • a fast transient digital ldo using a double edge triggered comparator with a Completion Signal
    2018
    Co-Authors: Kichan Woo, Taewoo Kim, Seonkwang Hwang, Mijeong Kim, Byungdo Yang
    Abstract:

    This paper proposes a fast-transient coarse-fine digital low-dropout regulator (D-LDO). The conventional D-LDO operates a coarse shift-register and a comparator at a fast clock in coarse mode when an overshoot or undershoot voltage occurs, for a fast-transient response. After coarse mode, it operates a fine shift-register at a slow clock for low power consumption in fine mode. However, the comparator operates at a fast clock for a low ripple voltage. The proposed D-LDO reduces the response time to a half of the conventional D-LDO, by using the proposed double edge-triggered comparator and by shifting the shift-register at the double edges of clocks. As a result, it reduces the overshoot and undershoot voltages. It also reduces the power consumption of the comparator in fine mode by using a slow clock instead of a fast clock. But, it still has a low ripple voltage due to the proposed comparator with a Completion Signal. The proposed D-LDO was implemented using a 65nm CMOS process. In the simulation, the settling time is reduced to 340ns from 880ns of the conventional D-LDO. The overshoot and undershoot voltages are reduced to 23mV and 37mV from 129mV and 127mV, respectively. The ripple voltage is 1.5mV and the current efficiency is 99.94%.

Kichan Woo - One of the best experts on this subject based on the ideXlab platform.

  • a fast transient digital ldo using a double edge triggered comparator with a Completion Signal
    2018
    Co-Authors: Kichan Woo, Taewoo Kim, Seonkwang Hwang, Mijeong Kim, Byungdo Yang
    Abstract:

    This paper proposes a fast-transient coarse-fine digital low-dropout regulator (D-LDO). The conventional D-LDO operates a coarse shift-register and a comparator at a fast clock in coarse mode when an overshoot or undershoot voltage occurs, for a fast-transient response. After coarse mode, it operates a fine shift-register at a slow clock for low power consumption in fine mode. However, the comparator operates at a fast clock for a low ripple voltage. The proposed D-LDO reduces the response time to a half of the conventional D-LDO, by using the proposed double edge-triggered comparator and by shifting the shift-register at the double edges of clocks. As a result, it reduces the overshoot and undershoot voltages. It also reduces the power consumption of the comparator in fine mode by using a slow clock instead of a fast clock. But, it still has a low ripple voltage due to the proposed comparator with a Completion Signal. The proposed D-LDO was implemented using a 65nm CMOS process. In the simulation, the settling time is reduced to 340ns from 880ns of the conventional D-LDO. The overshoot and undershoot voltages are reduced to 23mV and 37mV from 129mV and 127mV, respectively. The ripple voltage is 1.5mV and the current efficiency is 99.94%.

Taewoo Kim - One of the best experts on this subject based on the ideXlab platform.

  • a fast transient digital ldo using a double edge triggered comparator with a Completion Signal
    2018
    Co-Authors: Kichan Woo, Taewoo Kim, Seonkwang Hwang, Mijeong Kim, Byungdo Yang
    Abstract:

    This paper proposes a fast-transient coarse-fine digital low-dropout regulator (D-LDO). The conventional D-LDO operates a coarse shift-register and a comparator at a fast clock in coarse mode when an overshoot or undershoot voltage occurs, for a fast-transient response. After coarse mode, it operates a fine shift-register at a slow clock for low power consumption in fine mode. However, the comparator operates at a fast clock for a low ripple voltage. The proposed D-LDO reduces the response time to a half of the conventional D-LDO, by using the proposed double edge-triggered comparator and by shifting the shift-register at the double edges of clocks. As a result, it reduces the overshoot and undershoot voltages. It also reduces the power consumption of the comparator in fine mode by using a slow clock instead of a fast clock. But, it still has a low ripple voltage due to the proposed comparator with a Completion Signal. The proposed D-LDO was implemented using a 65nm CMOS process. In the simulation, the settling time is reduced to 340ns from 880ns of the conventional D-LDO. The overshoot and undershoot voltages are reduced to 23mV and 37mV from 129mV and 127mV, respectively. The ripple voltage is 1.5mV and the current efficiency is 99.94%.

Seonkwang Hwang - One of the best experts on this subject based on the ideXlab platform.

  • a fast transient digital ldo using a double edge triggered comparator with a Completion Signal
    2018
    Co-Authors: Kichan Woo, Taewoo Kim, Seonkwang Hwang, Mijeong Kim, Byungdo Yang
    Abstract:

    This paper proposes a fast-transient coarse-fine digital low-dropout regulator (D-LDO). The conventional D-LDO operates a coarse shift-register and a comparator at a fast clock in coarse mode when an overshoot or undershoot voltage occurs, for a fast-transient response. After coarse mode, it operates a fine shift-register at a slow clock for low power consumption in fine mode. However, the comparator operates at a fast clock for a low ripple voltage. The proposed D-LDO reduces the response time to a half of the conventional D-LDO, by using the proposed double edge-triggered comparator and by shifting the shift-register at the double edges of clocks. As a result, it reduces the overshoot and undershoot voltages. It also reduces the power consumption of the comparator in fine mode by using a slow clock instead of a fast clock. But, it still has a low ripple voltage due to the proposed comparator with a Completion Signal. The proposed D-LDO was implemented using a 65nm CMOS process. In the simulation, the settling time is reduced to 340ns from 880ns of the conventional D-LDO. The overshoot and undershoot voltages are reduced to 23mV and 37mV from 129mV and 127mV, respectively. The ripple voltage is 1.5mV and the current efficiency is 99.94%.