The Experts below are selected from a list of 24660 Experts worldwide ranked by ideXlab platform
David J Perreault - One of the best experts on this subject based on the ideXlab platform.
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Multitrack Power Conversion Architecture
IEEE Transactions on Power Electronics, 2017Co-Authors: Minjie Chen, Khurram K. Afridi, Sombuddha Chakraborty, David J PerreaultAbstract:This paper introduces a MultiTrack power Conversion Architecture that represents a new way of combining switched-capacitor circuits and magnetics. The MultiTrack Architecture takes advantages of the distributed power processing concept and a hybrid switched-capacitor/magnetics circuit structure. It reduces the voltage ratings on devices, reduces the voltage regulation stress of the system, improves the component utilization, and reduces the sizes of passive components. This Architecture is suitable to dc–dc and grid-interface applications that require both isolation and wide voltage Conversion range. An 18–80 V input, 5 V, 15 A output, 800 kHz, 0.93 in $^2$ (1/16 brick equivalent) isolated dc–dc converter has been built and tested to verify the effectiveness of this Architecture. By employing the MultiTrack Architecture, utilizing GaN switches, and operating at higher frequencies, the prototype converter achieves a power density of 457.3 W/in $^3$ and a peak efficiency of 91.3%. Its power density is 3 $\times$ higher than the state-of-the-art commercial converters with comparable efficiency across the wide operation range.
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New AC-DC power factor correction Architecture suitable for high-frequency operation
IEEE Transactions on Power Electronics, 2016Co-Authors: Seungbum Lim, David M. Otten, David J PerreaultAbstract:—This paper presents a novel ac–dc power factor correction (PFC) power Conversion Architecture for a single-phase grid interface. The proposed Architecture has significant advantages for achieving high efficiency, good power factor, and converter miniaturization, especially in low-to-medium power applications. The Architecture enables twice-line-frequency energy to be buffered at high voltage with a large voltage swing, enabling reduction in the energy buffer capacitor size and the elimination of electrolytic capacitors. While this Architecture can be beneficial with a variety of converter topologies, it is especially suited for the system miniaturization by enabling designs that operate at high frequency (HF, 3–30 MHz). Moreover, we introduce circuit implementations that provide efficient operation in this range. The proposed approach is demonstrated for an LED driver converter operating at a (variable) HF switching frequency (3–10 MHz) from 120 V ac , and supplying a 35 V d c output at up to 30 W. The prototype converter achieves high efficiency (92%) and power factor (0.89), and maintains a good performance over a wide load range. Owing to the Architecture and HF operation, the prototype achieves a high " box " power density of 50 W/in 3 (" displacement " power density of 130 W/in 3), with miniaturized inductors, ceramic energy buffer capacitors, and a small-volume EMI filter.
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two stage power Conversion Architecture suitable for wide range input voltage
IEEE Transactions on Power Electronics, 2015Co-Authors: Seungbum Lim, David M. Otten, J. Ranson, David J PerreaultAbstract:This paper presents a merged-two-stage circuit topology suitable for either wide-range dc input voltage or ac line voltage at low-to-moderate power levels (e.g., up to 30 W). This two-stage topology is based on a soft-charged switched-capacitor preregulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect current control are used to maintain high efficiency, high power density, and high power factor. The proposed Architecture is applied to an LED driver circuit, and two implementations are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 88%-96% efficiency at 30-W power across 25-200-V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4-W average power. Contributions of this paper include: 1) demonstrating the value of a merged two-stage Architecture to provide substantial design benefits in high-input voltage, low-power step down Conversion applications, including both wide-range-input dc-dc and line-input ac-dc systems; 2) introduction of a multimode soft-charged SC stage for the merged Architecture that enables compression of an 8:1 input voltage range into a 2:1 intermediate range, along with its implementation, loss considerations, and driving methods; and 3) merging of this topology with an resonant transition discontinuous-mode inverted buck stage and pseudocurrent control to enable step-down power Conversion (e.g., for LED lighting) operating at greatly increased frequencies and reduced magnetics size than with more conventional approaches.
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power Conversion Architecture for grid interface at high switching frequency
Applied Power Electronics Conference, 2014Co-Authors: David M. Otten, David J PerreaultAbstract:This paper presents a new power Conversion Architecture for single-phase grid interface. The proposed Architecture is suitable for realizing miniaturized ac-dc converters operating at high frequencies (HF, above 3 MHz) and high power factor, without the need for electrolytic capacitors. It comprises of a line-frequency rectifier, a stack of capacitors, a set of regulating converters, and a power combining converter (or set of power combining converters). The regulating converters have inputs connected to capacitors on the capacitor stack, and provide regulated outputs while also achieving high power factor, with twice-line-frequency energy buffered on the capacitor stack. The power combining converter combines power from the individual regulated outputs to a single output, and may also provide isolation. While this Architecture can be utilized with a variety of circuit topologies, it is especially suited for systems operating at HF (above 3 MHz), and we introduce circuit implementations that enable efficient operation in this range. The proposed approach is demonstrated for an LED driver operating from 120 Vac, and supplying a 35 V, 30 W output. The prototype converter operates at a (variable) switching frequency of 5-10 MHz and an efficiency of > 93%. The converter achieves a displacement power density of 130 W/in3, while providing a 0.89 power factor, without the use of electrolytic capacitors.
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Power Conversion Architecture for grid interface at high switching frequency
2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014, 2014Co-Authors: Seungbum Lim, David M. Otten, David J PerreaultAbstract:This paper presents a new power Conversion Architecture for single-phase grid interface. The proposed Architecture is suitable for realizing miniaturized ac-dc converters operating at high frequencies (HF, above 3 MHz) and high power factor, without the need for electrolytic capacitors. It comprises of a line-frequency rectifier, a stack of capacitors, a set of regulating converters, and a power combining converter (or set of power combining converters). The regulating converters have inputs connected to capacitors on the capacitor stack, and provide regulated outputs while also achieving high power factor, with twice-line-frequency energy buffered on the capacitor stack. The power combining converter combines power from the individual regulated outputs to a single output, and may also provide isolation. While this Architecture can be utilized with a variety of circuit topologies, it is especially suited for systems operating at HF (above 3 MHz), and we introduce circuit implementations that enable efficient operation in this range. The proposed approach is demonstrated for an LED driver operating from 120 Vac, and supplying a 35 V, 30 W output. The prototype converter operates at a (variable) switching frequency of 5-10 MHz and an efficiency of > 93%. The converter achieves a displacement power density of 130 W/in3, while providing a 0.89 power factor, without the use of electrolytic capacitors.
Min Chen - One of the best experts on this subject based on the ideXlab platform.
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seamless transfer control strategy for fuel cell uninterruptible power supply system
IEEE Transactions on Power Electronics, 2013Co-Authors: Wenping Zhang, Ren Xie, Dezhi Dong, Haijin Li, Dehong Xu, Xiao Li, Chao Sun, Min ChenAbstract:Due to the long cold start time and slow dynamics of proton exchange membrane (PEM) fuel cell (FC) stack, operating modes transfer control strategy for fuel cell uninterruptible power supply (FC-UPS) is different from the traditional uninterruptible power supply (UPS) system. In this paper, a seamless transfer control strategy, which is suitable for FC-UPS, is proposed. The power Conversion Architecture of FC-UPS is presented with the characteristic analysis of PEMFC and the requirements of UPS. Then, the scheme of the seamless transfer control strategy is investigated. The proposed seamless transfer control strategy is not only capable of guaranteeing the uninterruptible load voltage, but also protecting FC against the power demands beyond its allowable bandwidth during the transition for long lifespan and safety. Finally, the control scheme has been verified on a 10-kW FC-UPS prototype.
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seamless transfer control strategy for fuel cell uninterruptible power supply system
IEEE Transactions on Power Electronics, 2013Co-Authors: Wenping Zhang, Ren Xie, Dezhi Dong, Haijin Li, Dehong Xu, Xiao Li, Chao Sun, Min ChenAbstract:Due to the long cold start time and slow dynamics of proton exchange membrane (PEM) fuel cell (FC) stack, operating modes transfer control strategy for fuel cell uninterruptible power supply (FC-UPS) is different from the traditional uninterruptible power supply (UPS) system. In this paper, a seamless transfer control strategy, which is suitable for FC-UPS, is proposed. The power Conversion Architecture of FC-UPS is presented with the characteristic analysis of PEMFC and the requirements of UPS. Then, the scheme of the seamless transfer control strategy is investigated. The proposed seamless transfer control strategy is not only capable of guaranteeing the uninterruptible load voltage, but also protecting FC against the power demands beyond its allowable bandwidth during the transition for long lifespan and safety. Finally, the control scheme has been verified on a 10-kW FC-UPS prototype.
Seungbum Lim - One of the best experts on this subject based on the ideXlab platform.
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New AC-DC power factor correction Architecture suitable for high-frequency operation
IEEE Transactions on Power Electronics, 2016Co-Authors: Seungbum Lim, David M. Otten, David J PerreaultAbstract:—This paper presents a novel ac–dc power factor correction (PFC) power Conversion Architecture for a single-phase grid interface. The proposed Architecture has significant advantages for achieving high efficiency, good power factor, and converter miniaturization, especially in low-to-medium power applications. The Architecture enables twice-line-frequency energy to be buffered at high voltage with a large voltage swing, enabling reduction in the energy buffer capacitor size and the elimination of electrolytic capacitors. While this Architecture can be beneficial with a variety of converter topologies, it is especially suited for the system miniaturization by enabling designs that operate at high frequency (HF, 3–30 MHz). Moreover, we introduce circuit implementations that provide efficient operation in this range. The proposed approach is demonstrated for an LED driver converter operating at a (variable) HF switching frequency (3–10 MHz) from 120 V ac , and supplying a 35 V d c output at up to 30 W. The prototype converter achieves high efficiency (92%) and power factor (0.89), and maintains a good performance over a wide load range. Owing to the Architecture and HF operation, the prototype achieves a high " box " power density of 50 W/in 3 (" displacement " power density of 130 W/in 3), with miniaturized inductors, ceramic energy buffer capacitors, and a small-volume EMI filter.
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High frequency power Conversion Architecture for grid interface
2016Co-Authors: Seungbum LimAbstract:With the present ac-voltage distribution system, ac-dc converters are key components for driving many dc voltage applications from the ac grid voltage. There are a lot of electronic devices that natively operate from the dc voltage including light emitting diodes (LEDs), personal and laptop computers, and smart phones; for all of them there is a drive to increase functionality and to reduce the volume at the same time. The desire for further miniaturization is, however, facing a dominant obstacle strained by the performance requirements on power electronic circuits. In this thesis, a design technique for high-performance ac-dc power converters will be presented. A new grid interface ac-dc Conversion Architecture and associated circuit implementations are proposed along with novel control methods. This approach simultaneously address design challenges associated with high performance (e.g., high efficiency, high power factor, miniaturization, and high reliability/lifetime) of ac-dc power Conversion systems. The proposed Architecture is suitable for realizing ac-dc converters that switch in the HF range (3-30 MHz) with relatively low-voltage components and with zero-voltage switching (ZVS) conditions, enabling significant converter size reduction while maintaining high efficiency. Moreover, the proposed approach can achieve reasonably high power factor about 0.9, while dynamically buffering twice-line frequency energy using small capacitors operating with large voltage swings over the ac line voltage cycle. The ac-dc converter design shows that excellent combinations of power density, efficiency, and power factor can be realized with this approach.
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two stage power Conversion Architecture suitable for wide range input voltage
IEEE Transactions on Power Electronics, 2015Co-Authors: Seungbum Lim, David M. Otten, J. Ranson, David J PerreaultAbstract:This paper presents a merged-two-stage circuit topology suitable for either wide-range dc input voltage or ac line voltage at low-to-moderate power levels (e.g., up to 30 W). This two-stage topology is based on a soft-charged switched-capacitor preregulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect current control are used to maintain high efficiency, high power density, and high power factor. The proposed Architecture is applied to an LED driver circuit, and two implementations are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 88%-96% efficiency at 30-W power across 25-200-V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4-W average power. Contributions of this paper include: 1) demonstrating the value of a merged two-stage Architecture to provide substantial design benefits in high-input voltage, low-power step down Conversion applications, including both wide-range-input dc-dc and line-input ac-dc systems; 2) introduction of a multimode soft-charged SC stage for the merged Architecture that enables compression of an 8:1 input voltage range into a 2:1 intermediate range, along with its implementation, loss considerations, and driving methods; and 3) merging of this topology with an resonant transition discontinuous-mode inverted buck stage and pseudocurrent control to enable step-down power Conversion (e.g., for LED lighting) operating at greatly increased frequencies and reduced magnetics size than with more conventional approaches.
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Power Conversion Architecture for grid interface at high switching frequency
2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014, 2014Co-Authors: Seungbum Lim, David M. Otten, David J PerreaultAbstract:This paper presents a new power Conversion Architecture for single-phase grid interface. The proposed Architecture is suitable for realizing miniaturized ac-dc converters operating at high frequencies (HF, above 3 MHz) and high power factor, without the need for electrolytic capacitors. It comprises of a line-frequency rectifier, a stack of capacitors, a set of regulating converters, and a power combining converter (or set of power combining converters). The regulating converters have inputs connected to capacitors on the capacitor stack, and provide regulated outputs while also achieving high power factor, with twice-line-frequency energy buffered on the capacitor stack. The power combining converter combines power from the individual regulated outputs to a single output, and may also provide isolation. While this Architecture can be utilized with a variety of circuit topologies, it is especially suited for systems operating at HF (above 3 MHz), and we introduce circuit implementations that enable efficient operation in this range. The proposed approach is demonstrated for an LED driver operating from 120 Vac, and supplying a 35 V, 30 W output. The prototype converter operates at a (variable) switching frequency of 5-10 MHz and an efficiency of > 93%. The converter achieves a displacement power density of 130 W/in3, while providing a 0.89 power factor, without the use of electrolytic capacitors.
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Two-stage power Conversion Architecture for an LED driver circuit
2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), 2013Co-Authors: Seungbum Lim, David M. Otten, J. Ranson, David J PerreaultAbstract:This paper presents a merged-two-stage circuit topology suitable for efficient LED drivers operating from either wide-range dc input voltage or ac line voltage. This two-stage topology is based on a soft-charged switched-capacitor pre-regulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect scale current control are used to maintain high efficiency, high power density, and high power factor. Two implementations of the proposed Architecture are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 85-95% efficiency at 20 W power across 25-200 V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4 W average power.
Wenping Zhang - One of the best experts on this subject based on the ideXlab platform.
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seamless transfer control strategy for fuel cell uninterruptible power supply system
IEEE Transactions on Power Electronics, 2013Co-Authors: Wenping Zhang, Ren Xie, Dezhi Dong, Haijin Li, Dehong Xu, Xiao Li, Chao Sun, Min ChenAbstract:Due to the long cold start time and slow dynamics of proton exchange membrane (PEM) fuel cell (FC) stack, operating modes transfer control strategy for fuel cell uninterruptible power supply (FC-UPS) is different from the traditional uninterruptible power supply (UPS) system. In this paper, a seamless transfer control strategy, which is suitable for FC-UPS, is proposed. The power Conversion Architecture of FC-UPS is presented with the characteristic analysis of PEMFC and the requirements of UPS. Then, the scheme of the seamless transfer control strategy is investigated. The proposed seamless transfer control strategy is not only capable of guaranteeing the uninterruptible load voltage, but also protecting FC against the power demands beyond its allowable bandwidth during the transition for long lifespan and safety. Finally, the control scheme has been verified on a 10-kW FC-UPS prototype.
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seamless transfer control strategy for fuel cell uninterruptible power supply system
IEEE Transactions on Power Electronics, 2013Co-Authors: Wenping Zhang, Ren Xie, Dezhi Dong, Haijin Li, Dehong Xu, Xiao Li, Chao Sun, Min ChenAbstract:Due to the long cold start time and slow dynamics of proton exchange membrane (PEM) fuel cell (FC) stack, operating modes transfer control strategy for fuel cell uninterruptible power supply (FC-UPS) is different from the traditional uninterruptible power supply (UPS) system. In this paper, a seamless transfer control strategy, which is suitable for FC-UPS, is proposed. The power Conversion Architecture of FC-UPS is presented with the characteristic analysis of PEMFC and the requirements of UPS. Then, the scheme of the seamless transfer control strategy is investigated. The proposed seamless transfer control strategy is not only capable of guaranteeing the uninterruptible load voltage, but also protecting FC against the power demands beyond its allowable bandwidth during the transition for long lifespan and safety. Finally, the control scheme has been verified on a 10-kW FC-UPS prototype.
David M. Otten - One of the best experts on this subject based on the ideXlab platform.
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New AC-DC power factor correction Architecture suitable for high-frequency operation
IEEE Transactions on Power Electronics, 2016Co-Authors: Seungbum Lim, David M. Otten, David J PerreaultAbstract:—This paper presents a novel ac–dc power factor correction (PFC) power Conversion Architecture for a single-phase grid interface. The proposed Architecture has significant advantages for achieving high efficiency, good power factor, and converter miniaturization, especially in low-to-medium power applications. The Architecture enables twice-line-frequency energy to be buffered at high voltage with a large voltage swing, enabling reduction in the energy buffer capacitor size and the elimination of electrolytic capacitors. While this Architecture can be beneficial with a variety of converter topologies, it is especially suited for the system miniaturization by enabling designs that operate at high frequency (HF, 3–30 MHz). Moreover, we introduce circuit implementations that provide efficient operation in this range. The proposed approach is demonstrated for an LED driver converter operating at a (variable) HF switching frequency (3–10 MHz) from 120 V ac , and supplying a 35 V d c output at up to 30 W. The prototype converter achieves high efficiency (92%) and power factor (0.89), and maintains a good performance over a wide load range. Owing to the Architecture and HF operation, the prototype achieves a high " box " power density of 50 W/in 3 (" displacement " power density of 130 W/in 3), with miniaturized inductors, ceramic energy buffer capacitors, and a small-volume EMI filter.
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two stage power Conversion Architecture suitable for wide range input voltage
IEEE Transactions on Power Electronics, 2015Co-Authors: Seungbum Lim, David M. Otten, J. Ranson, David J PerreaultAbstract:This paper presents a merged-two-stage circuit topology suitable for either wide-range dc input voltage or ac line voltage at low-to-moderate power levels (e.g., up to 30 W). This two-stage topology is based on a soft-charged switched-capacitor preregulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect current control are used to maintain high efficiency, high power density, and high power factor. The proposed Architecture is applied to an LED driver circuit, and two implementations are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 88%-96% efficiency at 30-W power across 25-200-V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4-W average power. Contributions of this paper include: 1) demonstrating the value of a merged two-stage Architecture to provide substantial design benefits in high-input voltage, low-power step down Conversion applications, including both wide-range-input dc-dc and line-input ac-dc systems; 2) introduction of a multimode soft-charged SC stage for the merged Architecture that enables compression of an 8:1 input voltage range into a 2:1 intermediate range, along with its implementation, loss considerations, and driving methods; and 3) merging of this topology with an resonant transition discontinuous-mode inverted buck stage and pseudocurrent control to enable step-down power Conversion (e.g., for LED lighting) operating at greatly increased frequencies and reduced magnetics size than with more conventional approaches.
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power Conversion Architecture for grid interface at high switching frequency
Applied Power Electronics Conference, 2014Co-Authors: David M. Otten, David J PerreaultAbstract:This paper presents a new power Conversion Architecture for single-phase grid interface. The proposed Architecture is suitable for realizing miniaturized ac-dc converters operating at high frequencies (HF, above 3 MHz) and high power factor, without the need for electrolytic capacitors. It comprises of a line-frequency rectifier, a stack of capacitors, a set of regulating converters, and a power combining converter (or set of power combining converters). The regulating converters have inputs connected to capacitors on the capacitor stack, and provide regulated outputs while also achieving high power factor, with twice-line-frequency energy buffered on the capacitor stack. The power combining converter combines power from the individual regulated outputs to a single output, and may also provide isolation. While this Architecture can be utilized with a variety of circuit topologies, it is especially suited for systems operating at HF (above 3 MHz), and we introduce circuit implementations that enable efficient operation in this range. The proposed approach is demonstrated for an LED driver operating from 120 Vac, and supplying a 35 V, 30 W output. The prototype converter operates at a (variable) switching frequency of 5-10 MHz and an efficiency of > 93%. The converter achieves a displacement power density of 130 W/in3, while providing a 0.89 power factor, without the use of electrolytic capacitors.
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Power Conversion Architecture for grid interface at high switching frequency
2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014, 2014Co-Authors: Seungbum Lim, David M. Otten, David J PerreaultAbstract:This paper presents a new power Conversion Architecture for single-phase grid interface. The proposed Architecture is suitable for realizing miniaturized ac-dc converters operating at high frequencies (HF, above 3 MHz) and high power factor, without the need for electrolytic capacitors. It comprises of a line-frequency rectifier, a stack of capacitors, a set of regulating converters, and a power combining converter (or set of power combining converters). The regulating converters have inputs connected to capacitors on the capacitor stack, and provide regulated outputs while also achieving high power factor, with twice-line-frequency energy buffered on the capacitor stack. The power combining converter combines power from the individual regulated outputs to a single output, and may also provide isolation. While this Architecture can be utilized with a variety of circuit topologies, it is especially suited for systems operating at HF (above 3 MHz), and we introduce circuit implementations that enable efficient operation in this range. The proposed approach is demonstrated for an LED driver operating from 120 Vac, and supplying a 35 V, 30 W output. The prototype converter operates at a (variable) switching frequency of 5-10 MHz and an efficiency of > 93%. The converter achieves a displacement power density of 130 W/in3, while providing a 0.89 power factor, without the use of electrolytic capacitors.
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Two-stage power Conversion Architecture for an LED driver circuit
2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), 2013Co-Authors: Seungbum Lim, David M. Otten, J. Ranson, David J PerreaultAbstract:This paper presents a merged-two-stage circuit topology suitable for efficient LED drivers operating from either wide-range dc input voltage or ac line voltage. This two-stage topology is based on a soft-charged switched-capacitor pre-regulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect scale current control are used to maintain high efficiency, high power density, and high power factor. Two implementations of the proposed Architecture are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 85-95% efficiency at 20 W power across 25-200 V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4 W average power.