The Experts below are selected from a list of 222 Experts worldwide ranked by ideXlab platform
Suh-hyun Cheon - One of the best experts on this subject based on the ideXlab platform.
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Speculative parallel graph reduction of lambda calculus to deferred substitution form
Proceedings of 3rd International Conference on Algorithms and Architectures for Parallel Processing, 1997Co-Authors: Suh-hyun CheonAbstract:In a parallel graph reduction system, speculative evaluation can increase parallelism but waste machine resources by evaluating expression which may eventually be discarded. When a speculative task reduces a lambda expression to WHNF (Weak Head Normal Form), substitution can lead to unbounded growth of the graph size and require Copy Operation. This speculative task may be unnecessary. In that case the performance is affected by the overheads to terminate all tasks to be propagated from a speculative task and to refresh the memory cells to be allocated for Copy Operation. We propose a lambda form called DSF (Deferred Substitution Form) which substitution is deferred until a mandatory task will evaluate substitution. In a speculative task to DSF, since there is no substitution. It cannot grow the graph size and require Copy Operation. Therefore the overhead can be decreased when a expression reduced to DSF is eventually unnecessary. In addition we propose an evaluation model for DSF to increase the parallelism.
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Speculative parallel graph reduction for lambda calculus
Proceedings of ICICS 1997 International Conference on Information Communications and Signal Processing. Theme: Trends in Information Systems Engineeri, 1997Co-Authors: Suh-hyun CheonAbstract:In a parallel graph reduction system, speculative evaluation can increase parallelism but waste machine resources by evaluating an expression which may eventually be discarded. When a speculative task reduces a lambda expression to WHNF (weak head normal form), substitution can lead to unbounded growth of the graph size and require a Copy Operation. This speculative task may be unnecessary. In that case the performance is affected by the overheads to terminate all tasks to be propagated from a speculative task and to refresh the memory cells to be allocated for the Copy Operation. We propose a lambda form called DSF (deferred substitution form) in which substitution is deferred until a mandatory task evaluates the substitution. In a speculative task to the DSF, since there is no substitution, it cannot grow the graph size and require a Copy Operation. Therefore the overhead can be decreased when a expression reduced to the DSF is eventually unnecessary. In addition we propose an evaluation model for the DSF to increase the parallelism.
Siegfried Selberherr - One of the best experts on this subject based on the ideXlab platform.
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Layer coupling and read disturbances in a buffered magnetic logic environment
Proceedings of SPIE, 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:There are two major obstacles impeding computing systems from further advancements: The power dissipation due to leakage and the energy spent for the information transfer between memory and processor(s). The first issue is commonly handled by shutting down unused circuit parts, however, when the dormant circuits are turned on again, their previous state must be recovered. This is commonly realized by retrieving the required information from the memory, which exacerbates the limited bandwidth between memory and processor(s). In order to circumvent these limitations, we have proposed a non-volatile buffered magnetic logic grid with instant-on capability. Non-volatile magnetic flip flops and spin-transfer torque majority gates are combined to a compact regular structure, which enables a small layout foot print as well as it guarantees the reduction of the information transfer due to a shared buffer. In the proposed structure the information is passed from one magnetic layer to another by first running a current through the magnetic layer to be read, which subsequently generates a magnetization orientation encoded spin-transfer torque, when the polarized electron spins enter the next layer. Since the current passing through the junction also exerts a spin-transfer torque on the read layer, its magnetization orientation could be destabilized which might cause a read disturbance. However, during our simulations it was also found out that the stray fields of neighboring layers have a non-negligible influence on the proposed Copy Operation. In this work we investigate these potential read disturbances in detail for a 2-bit shift register for varying stray field strength by changing the thickness of the interconnection layer. We found that for closer proximity the acting stray fields not only stabilize but also speed up the Copy procedure, while for increasing interconnection layer thickness oscillating domain walls are formed and the Copy Operation becomes unreliable.
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ESSDERC - The exploitation of magnetization orientation encoded spin-transfer torque for an ultra dense non-volatile magnetic shift register
2016 46th European Solid-State Device Research Conference (ESSDERC), 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:Nowadays there are two big obstacles for further progress in CMOS device technology. The energy dissipation due to leakage and the energy required to Copy information between memory and processor. Even though cutting the power of unused circuits reduces the leakage dissipation to zero, it causes the loss of the locally stored information. Thus, it must be copied back from memory, when the circuit is turned on again. This, unfortunately, degrades the already strained available bandwidth between memory and processor. Using non-volatile elements which can serve as memory and information processing units is an attractive path to overcome these limitations in future computation environments. Therefore, we propose non-volatile circuits based on magnetic flip flops and non-volatile shift registers that extensively exploit these features. For the Copy Operation of the shift register we have proposed to traverse an unpolarized current through a portion of the read flip flops' free layer to create a spin polarized magnetization orientation encoded current and pass it to a subsequent free layer. There it exerts a spin-transfer torque and switches with the aid of a second clocked spin-transfer torque the subsequent layer. In order to test the feasibility of the Operation procedure we reduce the shift register to two flip flops and study all possible input and output combinations via extensive simulations. We found that the switching behaves exactly as required for the proposed Copy Operation. Thus the feasibility of the Operation as well as the Operationability of the shift register are demonstrated.
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The exploitation of magnetization orientation encoded spin-transfer torque for an ultra dense non-volatile magnetic shift register
2016 46th European Solid-State Device Research Conference (ESSDERC), 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:Nowadays there are two big obstacles for further progress in CMOS device technology. The energy dissipation due to leakage and the energy required to Copy information between memory and processor. Even though cutting the power of unused circuits reduces the leakage dissipation to zero, it causes the loss of the locally stored information. Thus, it must be copied back from memory, when the circuit is turned on again. This, unfortunately, degrades the already strained available bandwidth between memory and processor. Using non-volatile elements which can serve as memory and information processing units is an attractive path to overcome these limitations in future computation environments. Therefore, we propose non-volatile circuits based on magnetic flip flops and non-volatile shift registers that extensively exploit these features. For the Copy Operation of the shift register we have proposed to traverse an unpolarized current through a portion of the read flip flops' free layer to create a spin polarized magnetization orientation encoded current and pass it to a subsequent free layer. There it exerts a spin-transfer torque and switches with the aid of a second clocked spin-transfer torque the subsequent layer. In order to test the feasibility of the Operation procedure we reduce the shift register to two flip flops and study all possible input and output combinations via extensive simulations. We found that the switching behaves exactly as required for the proposed Copy Operation. Thus the feasibility of the Operation as well as the Operationability of the shift register are demonstrated.
Thomas Windbacher - One of the best experts on this subject based on the ideXlab platform.
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Layer coupling and read disturbances in a buffered magnetic logic environment
Proceedings of SPIE, 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:There are two major obstacles impeding computing systems from further advancements: The power dissipation due to leakage and the energy spent for the information transfer between memory and processor(s). The first issue is commonly handled by shutting down unused circuit parts, however, when the dormant circuits are turned on again, their previous state must be recovered. This is commonly realized by retrieving the required information from the memory, which exacerbates the limited bandwidth between memory and processor(s). In order to circumvent these limitations, we have proposed a non-volatile buffered magnetic logic grid with instant-on capability. Non-volatile magnetic flip flops and spin-transfer torque majority gates are combined to a compact regular structure, which enables a small layout foot print as well as it guarantees the reduction of the information transfer due to a shared buffer. In the proposed structure the information is passed from one magnetic layer to another by first running a current through the magnetic layer to be read, which subsequently generates a magnetization orientation encoded spin-transfer torque, when the polarized electron spins enter the next layer. Since the current passing through the junction also exerts a spin-transfer torque on the read layer, its magnetization orientation could be destabilized which might cause a read disturbance. However, during our simulations it was also found out that the stray fields of neighboring layers have a non-negligible influence on the proposed Copy Operation. In this work we investigate these potential read disturbances in detail for a 2-bit shift register for varying stray field strength by changing the thickness of the interconnection layer. We found that for closer proximity the acting stray fields not only stabilize but also speed up the Copy procedure, while for increasing interconnection layer thickness oscillating domain walls are formed and the Copy Operation becomes unreliable.
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ESSDERC - The exploitation of magnetization orientation encoded spin-transfer torque for an ultra dense non-volatile magnetic shift register
2016 46th European Solid-State Device Research Conference (ESSDERC), 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:Nowadays there are two big obstacles for further progress in CMOS device technology. The energy dissipation due to leakage and the energy required to Copy information between memory and processor. Even though cutting the power of unused circuits reduces the leakage dissipation to zero, it causes the loss of the locally stored information. Thus, it must be copied back from memory, when the circuit is turned on again. This, unfortunately, degrades the already strained available bandwidth between memory and processor. Using non-volatile elements which can serve as memory and information processing units is an attractive path to overcome these limitations in future computation environments. Therefore, we propose non-volatile circuits based on magnetic flip flops and non-volatile shift registers that extensively exploit these features. For the Copy Operation of the shift register we have proposed to traverse an unpolarized current through a portion of the read flip flops' free layer to create a spin polarized magnetization orientation encoded current and pass it to a subsequent free layer. There it exerts a spin-transfer torque and switches with the aid of a second clocked spin-transfer torque the subsequent layer. In order to test the feasibility of the Operation procedure we reduce the shift register to two flip flops and study all possible input and output combinations via extensive simulations. We found that the switching behaves exactly as required for the proposed Copy Operation. Thus the feasibility of the Operation as well as the Operationability of the shift register are demonstrated.
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The exploitation of magnetization orientation encoded spin-transfer torque for an ultra dense non-volatile magnetic shift register
2016 46th European Solid-State Device Research Conference (ESSDERC), 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:Nowadays there are two big obstacles for further progress in CMOS device technology. The energy dissipation due to leakage and the energy required to Copy information between memory and processor. Even though cutting the power of unused circuits reduces the leakage dissipation to zero, it causes the loss of the locally stored information. Thus, it must be copied back from memory, when the circuit is turned on again. This, unfortunately, degrades the already strained available bandwidth between memory and processor. Using non-volatile elements which can serve as memory and information processing units is an attractive path to overcome these limitations in future computation environments. Therefore, we propose non-volatile circuits based on magnetic flip flops and non-volatile shift registers that extensively exploit these features. For the Copy Operation of the shift register we have proposed to traverse an unpolarized current through a portion of the read flip flops' free layer to create a spin polarized magnetization orientation encoded current and pass it to a subsequent free layer. There it exerts a spin-transfer torque and switches with the aid of a second clocked spin-transfer torque the subsequent layer. In order to test the feasibility of the Operation procedure we reduce the shift register to two flip flops and study all possible input and output combinations via extensive simulations. We found that the switching behaves exactly as required for the proposed Copy Operation. Thus the feasibility of the Operation as well as the Operationability of the shift register are demonstrated.
Onur Mutlu - One of the best experts on this subject based on the ideXlab platform.
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RowClone
Proceedings of the 46th Annual IEEE ACM International Symposium on Microarchitecture - MICRO-46, 2013Co-Authors: V. Seshadri, Chris Fallin, Michael A. Kozuch, Donghyuk Lee, Yoongu Kim, Yixin Luo, Rachata Ausavarungnirun, Todd C Mowry, Gennady Pekhimenko, Onur MutluAbstract:Several system-level Operations trigger bulk data Copy or initial- ization. Even though these bulk data Operations do not require any computation, current systems transfer a large quantity of data back and forth on the memory channel to perform such opera- tions. As a result, bulk data Operations consume high latency, bandwidth, and energy—degrading both system performance and energy efficiency. In this work, we propose RowClone, a new and simple mech- anism to perform bulk Copy and initialization completely within DRAM—eliminating the need to transfer any data over the mem- ory channel to perform such Operations. Our key observation is that DRAM can internally and efficiently transfer a large quantity of data (multiple KBs) between a row of DRAM cells and the as- sociated row buffer. Based on this, our primary mechanism can quickly Copy an entire rowof data from a source rowto a destina- tion row by first Copying the data from the source row to the row buffer and then from the row buffer to the destination row, via two back-to-back activate commands. This mechanism, which we call the Fast Parallel Mode of RowClone, reduces the latency and energy consumption of a 4KB bulk Copy Operation by 11.6x and 74.4x, respectively, and a 4KB bulk zeroing Operation by 6.0x and 41.5x, respectively. To efficiently Copy data between rows that do not share a row buffer, we propose a second mode of RowClone, the Pipelined Serial Mode, which uses the shared internal bus of a DRAM chip to quickly Copy data between two banks. RowClone requires only a 0.01% increase in DRAM chip area. We quantitatively evaluate the benefits of RowClone by focus- ing on fork, one of the frequently invoked system calls, and five other Copy and initialization intensive applications. Our results show that RowClone can significantly improve both single-core and multi-core system performance, while also significantly re- ducing main memory bandwidth and energy consumption.
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RowClone: Fast and energy-efficient in-DRAM bulk data Copy and initialization
2013 46th Annual IEEE ACM International Symposium on Microarchitecture (MICRO), 2013Co-Authors: V. Seshadri, Chris Fallin, Michael A. Kozuch, Rachata Ausavarungnirun, Gennady Pekhimenko, Onur Mutlu, Phillip B. Gibbons, Todd C MowryAbstract:Several system-level Operations trigger bulk data Copy or initialization. Even though these bulk data Operations do not require any computation, current systems transfer a large quantity of data back and forth on the memory channel to perform such Operations. As a result, bulk data Operations consume high latency, bandwidth, and energy - degrading both system performance and energy efficiency. In this work, we propose RowClone, a new and simple mechanism to perform bulk Copy and initialization completely within DRAM - eliminating the need to transfer any data over the memory channel to perform such Operations. Our key observation is that DRAM can internally and efficiently transfer a large quantity of data (multiple KBs) between a row of DRAM cells and the associated row buffer. Based on this, our primary mechanism can quickly Copy an entire row of data from a source row to a destination row by first Copying the data from the source row to the row buffer and then from the row buffer to the destination row, via two back-to-back activate commands. This mechanism, which we call the Fast Parallel Mode of RowClone, reduces the latency and energy consumption of a 4KB bulk Copy Operation by 11.6× and 74.4×, respectively, and a 4KB bulk zeroing Operation by 6.0× and 41.5×, respectively. To efficiently Copy data between rows that do not share a row buffer, we propose a second mode of RowClone, the Pipelined Serial Mode, which uses the shared internal bus of a DRAM chip to quickly Copy data between two banks. RowClone requires only a 0.01% increase in DRAM chip area. We quantitatively evaluate the benefits of RowClone by focusing on fork, one of the frequently invoked system calls, and five other Copy and initialization intensive applications. Our results show that RowClone can significantly improve both single-core and multi-core system performance, while also significantly reducing main memory bandwidth and energy consumption.
Viktor Sverdlov - One of the best experts on this subject based on the ideXlab platform.
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Layer coupling and read disturbances in a buffered magnetic logic environment
Proceedings of SPIE, 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:There are two major obstacles impeding computing systems from further advancements: The power dissipation due to leakage and the energy spent for the information transfer between memory and processor(s). The first issue is commonly handled by shutting down unused circuit parts, however, when the dormant circuits are turned on again, their previous state must be recovered. This is commonly realized by retrieving the required information from the memory, which exacerbates the limited bandwidth between memory and processor(s). In order to circumvent these limitations, we have proposed a non-volatile buffered magnetic logic grid with instant-on capability. Non-volatile magnetic flip flops and spin-transfer torque majority gates are combined to a compact regular structure, which enables a small layout foot print as well as it guarantees the reduction of the information transfer due to a shared buffer. In the proposed structure the information is passed from one magnetic layer to another by first running a current through the magnetic layer to be read, which subsequently generates a magnetization orientation encoded spin-transfer torque, when the polarized electron spins enter the next layer. Since the current passing through the junction also exerts a spin-transfer torque on the read layer, its magnetization orientation could be destabilized which might cause a read disturbance. However, during our simulations it was also found out that the stray fields of neighboring layers have a non-negligible influence on the proposed Copy Operation. In this work we investigate these potential read disturbances in detail for a 2-bit shift register for varying stray field strength by changing the thickness of the interconnection layer. We found that for closer proximity the acting stray fields not only stabilize but also speed up the Copy procedure, while for increasing interconnection layer thickness oscillating domain walls are formed and the Copy Operation becomes unreliable.
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ESSDERC - The exploitation of magnetization orientation encoded spin-transfer torque for an ultra dense non-volatile magnetic shift register
2016 46th European Solid-State Device Research Conference (ESSDERC), 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:Nowadays there are two big obstacles for further progress in CMOS device technology. The energy dissipation due to leakage and the energy required to Copy information between memory and processor. Even though cutting the power of unused circuits reduces the leakage dissipation to zero, it causes the loss of the locally stored information. Thus, it must be copied back from memory, when the circuit is turned on again. This, unfortunately, degrades the already strained available bandwidth between memory and processor. Using non-volatile elements which can serve as memory and information processing units is an attractive path to overcome these limitations in future computation environments. Therefore, we propose non-volatile circuits based on magnetic flip flops and non-volatile shift registers that extensively exploit these features. For the Copy Operation of the shift register we have proposed to traverse an unpolarized current through a portion of the read flip flops' free layer to create a spin polarized magnetization orientation encoded current and pass it to a subsequent free layer. There it exerts a spin-transfer torque and switches with the aid of a second clocked spin-transfer torque the subsequent layer. In order to test the feasibility of the Operation procedure we reduce the shift register to two flip flops and study all possible input and output combinations via extensive simulations. We found that the switching behaves exactly as required for the proposed Copy Operation. Thus the feasibility of the Operation as well as the Operationability of the shift register are demonstrated.
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The exploitation of magnetization orientation encoded spin-transfer torque for an ultra dense non-volatile magnetic shift register
2016 46th European Solid-State Device Research Conference (ESSDERC), 2016Co-Authors: Thomas Windbacher, Alexander Makarov, Viktor Sverdlov, Siegfried SelberherrAbstract:Nowadays there are two big obstacles for further progress in CMOS device technology. The energy dissipation due to leakage and the energy required to Copy information between memory and processor. Even though cutting the power of unused circuits reduces the leakage dissipation to zero, it causes the loss of the locally stored information. Thus, it must be copied back from memory, when the circuit is turned on again. This, unfortunately, degrades the already strained available bandwidth between memory and processor. Using non-volatile elements which can serve as memory and information processing units is an attractive path to overcome these limitations in future computation environments. Therefore, we propose non-volatile circuits based on magnetic flip flops and non-volatile shift registers that extensively exploit these features. For the Copy Operation of the shift register we have proposed to traverse an unpolarized current through a portion of the read flip flops' free layer to create a spin polarized magnetization orientation encoded current and pass it to a subsequent free layer. There it exerts a spin-transfer torque and switches with the aid of a second clocked spin-transfer torque the subsequent layer. In order to test the feasibility of the Operation procedure we reduce the shift register to two flip flops and study all possible input and output combinations via extensive simulations. We found that the switching behaves exactly as required for the proposed Copy Operation. Thus the feasibility of the Operation as well as the Operationability of the shift register are demonstrated.