The Experts below are selected from a list of 1743 Experts worldwide ranked by ideXlab platform

P.suresh Varma - One of the best experts on this subject based on the ideXlab platform.

  • DESIGN AND IMPLEMENTATION OF GEOMETRIC BASED Cryptographic Hash Algorithm: ASH-256
    2016
    Co-Authors: Pallipamu.venkateswara Rao *, K.thammi Reddy, P.suresh Varma
    Abstract:

    Online communication takes a major part in our daily life. Since sending or receiving information over internet is inevitable, usage of Hash function is essential to check whether the information is correct or not especially for sensitive or confidential information. In this paper a new Cryptographic Hash function, Algorithm for Secure Hashing (ASH-256) has been proposed which is based on geometric concepts. In ASH-256, each 64-bit block of a given 512-bit block is increased to 96-bits by using Expansion table (E-Table) of DES(Data Encryption Standard) Algorithm and divided into two equal sub-blocks. Each sub-block is used to generate three points of a triangle, which are involved in area calculation. The calculated area values are in turn processed to generate message digest. ASH-256 is more secure and exhibits strong avalanche effect and also simple construction and easy to implemention, when compared to standard Hash function SHA2(256)

Rene Peralta - One of the best experts on this subject based on the ideXlab platform.

  • a new combinational logic minimization technique with applications to cryptology
    2010
    Co-Authors: Joan Boyar, Rene Peralta
    Abstract:

    A new technique for combinational logic optimization is described. The technique is a two-step process. In the first step, the nonlinearity of a circuit – as measured by the number of non-linear gates it contains – is reduced. The second step reduces the number of gates in the linear components of the already reduced circuit. The technique can be applied to arbitrary combinational logic problems, and often yields improvements even after optimization by standard methods has been performed. In this paper we show the results of our technique when applied to the S-box of the Advanced Encryption Standard (AES [5]). This is an experimental proof of concept, as opposed to a full-fledged circuit optimization effort. Nevertheless the result is, as far as we know, the circuit with the smallest gate count yet constructed for this function. We have also used the technique to improve the performance (in software) of several candidates to the Cryptographic Hash Algorithm Competition. Finally, we have experimentally verified that the second step of our technique yields significant improvements over conventional methods when applied to randomly chosen linear transformations.

  • status report on the second round of the sha 3 Cryptographic Hash Algorithm competition
    NIST Interagency Internal Report (NISTIR) - 7620, 2009
    Co-Authors: Meltem Sonmez Turan, Ray A Perlner, Lawrence E Bassham, William E Burr, Dong H Chang, Shujen H Chang, Morris J Dworkin, John Kelsey, Souradyuti Paul, Rene Peralta
    Abstract:

    The National Institute of Standards and Technology (NIST) opened a public competition on November 2, 2007 to develop a new Cryptographic Hash Algorithm – SHA-3, which will augment the Hash Algorithms currently specified in the Federal Information Processing Standard (FIPS) 180-3, Secure Hash Standard. The competition was NIST’s response to advances in the cryptanalysis of Hash Algorithms. NIST received sixty-four submissions in October 2008, and selected fifty-one candidate Algorithms as the first-round candidates on December 10, 2008, and fourteen as the second-round candidates on July 24, 2009. One year was allocated for the public review of the second-round candidates. On December 9, 2010, NIST announced five SHA-3 finalists to advance to the third (and final) round of the competition. This report summarizes the evaluation and selection of the five finalists – BLAKE, Grostl, JH, Keccak and Skein.

Venkateswara Rao - One of the best experts on this subject based on the ideXlab platform.

  • technology design and implementation of geometric based Cryptographic Hash Algorithm ash 256
    2016
    Co-Authors: Venkateswara Rao
    Abstract:

    Online communication takes a major part in our daily life. Since sending or receiving information over internet is inevitable, usage of Hash function is essential to check whether the information is correct or not especially for sensitive or confidential information. In this paper a new Cryptographic Hash function, Algorithm for Secure Hashing (ASH-256) has been proposed which is based on geometric concepts. In ASH-256, each 64-bit block of a given 512-bit block is increased to 96-bits by using Expansion table (E-Table) of DES(Data Encryption Standard) Algorithm and divided into two equal sub-blocks. Each sub-block is used to generate three points of a triangle, which are involved in area calculation. The calculated area values are in turn processed to generate message digest. ASH256 is more secure and exhibits strong avalanche effect and also simple construction and easy to implemention, when compared to standard Hash function SHA2(256).

Artemios G Voyiatzis - One of the best experts on this subject based on the ideXlab platform.

  • high performance pipelined fpga implementation of the sha 3 Hash Algorithm
    Mediterranean Conference on Embedded Computing, 2015
    Co-Authors: Lenos Ioannou, Harris E Michail, Artemios G Voyiatzis
    Abstract:

    The SHA-3 Cryptographic Hash Algorithm is standardized in FIPS 202. We present a pipelined hardware architecture supporting all the four SHA-3 modes of operation and a high-performance implementation for FPGA devices that can support both multi-block and multi-message processing. Experimental results on different FPGA devices validate that the proposed design achieves significant throughput improvements compared to the available literature.

G Theodoridis - One of the best experts on this subject based on the ideXlab platform.

  • high throughput pipelined fpga implementation of the new sha 3 Cryptographic Hash Algorithm
    International Symposium on Communications Control and Signal Processing, 2014
    Co-Authors: George Athanasiou, Georgeparis Makkas, G Theodoridis
    Abstract:

    In this paper a two-staged pipelined architecture of the new SHA-3 (Keccak) Algorithm is presented. The core can operate on both one-block and multi-block messages, realizing all possible modes of Keccak. Special effort has been paid and different design alternatives have been studied to derive efficient FPGA implementations in terms of throughput and throughput/area metrics. The proposed core has been implemented in Xilinx Virtex-5, Virtex-6, and Virtex-7 FPGA technologies and achieves significant improvements compared to existing FPGA implementations. Specifically, for Virtex-5 the proposed architecture achieves better throughput and throughput/area results from 45.8% to 248× and from 8.9% up to 17.9×, respectively. Regarding Virtex-6, the improvements in throughput and throughput/area are from 47.2% up to 18.1× and from 8% up to 27.3×, respectively.