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Susumu Yamazaki - One of the best experts on this subject based on the ideXlab platform.

  • a concept of a hardware Design Environment with the functional language elixir work in progress
    International Conference on Hardware Software Codesign and System Synthesis, 2019
    Co-Authors: Hideki Takase, Yuki Hisae, Kentaro Matsui, Masakazu Mori, Yoshihiro Ueno, Susumu Yamazaki
    Abstract:

    The functional language Elixir is Designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a Design Environment for hardware circuits using Elixir as a Design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator $\vert >$ which connects the processing relation of the function by the data processing order. To realize a hardware Design Environment by Elixir, this paper shares current status of our implementation.

  • a concept of a hardware Design Environment with the functional language elixir work in progress
    International Conference on Hardware Software Codesign and System Synthesis, 2019
    Co-Authors: Hideki Takase, Yuki Hisae, Kentaro Matsui, Masakazu Mori, Yoshihiro Ueno, Susumu Yamazaki
    Abstract:

    The functional language Elixir is Designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a Design Environment for hardware circuits using Elixir as a Design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator |> which connects the processing relation of the function by the data processing order. To realize a hardware Design Environment by Elixir, this paper shares current status of our implementation.

Hideki Takase - One of the best experts on this subject based on the ideXlab platform.

  • a concept of a hardware Design Environment with the functional language elixir work in progress
    International Conference on Hardware Software Codesign and System Synthesis, 2019
    Co-Authors: Hideki Takase, Yuki Hisae, Kentaro Matsui, Masakazu Mori, Yoshihiro Ueno, Susumu Yamazaki
    Abstract:

    The functional language Elixir is Designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a Design Environment for hardware circuits using Elixir as a Design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator $\vert >$ which connects the processing relation of the function by the data processing order. To realize a hardware Design Environment by Elixir, this paper shares current status of our implementation.

  • a concept of a hardware Design Environment with the functional language elixir work in progress
    International Conference on Hardware Software Codesign and System Synthesis, 2019
    Co-Authors: Hideki Takase, Yuki Hisae, Kentaro Matsui, Masakazu Mori, Yoshihiro Ueno, Susumu Yamazaki
    Abstract:

    The functional language Elixir is Designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a Design Environment for hardware circuits using Elixir as a Design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator |> which connects the processing relation of the function by the data processing order. To realize a hardware Design Environment by Elixir, this paper shares current status of our implementation.

H De Man - One of the best experts on this subject based on the ideXlab platform.

  • coware a Design Environment for heterogeneous hardware software systems
    European Design Automation Conference, 1996
    Co-Authors: K Van Rompaey, I Bolsens, D Verkest, H De Man
    Abstract:

    The Design problems encountered when Designing heterogeneous systems are studied and solutions to these problems are proposed. It is shown why a single heterogeneous specification method ranging from concept to architecture is required and why it should cover issues as modularity Design for reuse, reuse of Designs and reuse of Design Environments. A heterogeneous system Design Environment based on cospecification, cosimulation and cosynthesis is proposed and its application is illustrated by means of a spread spectrum based pager system.

Yuki Hisae - One of the best experts on this subject based on the ideXlab platform.

  • a concept of a hardware Design Environment with the functional language elixir work in progress
    International Conference on Hardware Software Codesign and System Synthesis, 2019
    Co-Authors: Hideki Takase, Yuki Hisae, Kentaro Matsui, Masakazu Mori, Yoshihiro Ueno, Susumu Yamazaki
    Abstract:

    The functional language Elixir is Designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a Design Environment for hardware circuits using Elixir as a Design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator $\vert >$ which connects the processing relation of the function by the data processing order. To realize a hardware Design Environment by Elixir, this paper shares current status of our implementation.

  • a concept of a hardware Design Environment with the functional language elixir work in progress
    International Conference on Hardware Software Codesign and System Synthesis, 2019
    Co-Authors: Hideki Takase, Yuki Hisae, Kentaro Matsui, Masakazu Mori, Yoshihiro Ueno, Susumu Yamazaki
    Abstract:

    The functional language Elixir is Designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a Design Environment for hardware circuits using Elixir as a Design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator |> which connects the processing relation of the function by the data processing order. To realize a hardware Design Environment by Elixir, this paper shares current status of our implementation.

Kentaro Matsui - One of the best experts on this subject based on the ideXlab platform.

  • a concept of a hardware Design Environment with the functional language elixir work in progress
    International Conference on Hardware Software Codesign and System Synthesis, 2019
    Co-Authors: Hideki Takase, Yuki Hisae, Kentaro Matsui, Masakazu Mori, Yoshihiro Ueno, Susumu Yamazaki
    Abstract:

    The functional language Elixir is Designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a Design Environment for hardware circuits using Elixir as a Design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator $\vert >$ which connects the processing relation of the function by the data processing order. To realize a hardware Design Environment by Elixir, this paper shares current status of our implementation.

  • a concept of a hardware Design Environment with the functional language elixir work in progress
    International Conference on Hardware Software Codesign and System Synthesis, 2019
    Co-Authors: Hideki Takase, Yuki Hisae, Kentaro Matsui, Masakazu Mori, Yoshihiro Ueno, Susumu Yamazaki
    Abstract:

    The functional language Elixir is Designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a Design Environment for hardware circuits using Elixir as a Design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator |> which connects the processing relation of the function by the data processing order. To realize a hardware Design Environment by Elixir, this paper shares current status of our implementation.