The Experts below are selected from a list of 17577 Experts worldwide ranked by ideXlab platform
G. Gielen - One of the best experts on this subject based on the ideXlab platform.
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Efficient analog circuit synthesis with simultaneous yield and robustness optimization
1998 IEEE ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287), 1998Co-Authors: G. Debyser, G. GielenAbstract:The paper presents an efficient statistical Design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The starting point of this methodology is a declarative analytical description of the circuit. An equation manipulation program based on constraint satisfaction converts this declarative model into an efficient Design Plan for optimization based sizing. The efficiency is due to the use of an operating point driven DC formulation, so that the Design Plan avoids the calculation of simultaneous sets of nonlinear equations. From the same declarative analytical description also a direct symbolic yield estimation Plan is generated. The parametric yield is estimated by propagating the spread of the technological variables through the analytical model towards the performance variables of the circuit. The Design Plan and the yield estimation Plan are then combined together in the inner loop of a global optimization routine. The strength of this methodology lies in the low CPU times needed to perform yield estimation compared to the hours of simulation batches with Monte Carlo simulations, while the accuracy is comparable.
Yuan Liang - One of the best experts on this subject based on the ideXlab platform.
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Research and Design of High-Frequency High-Voltage Power Supply for Capacitive Loads
Power Supply Technologies and Applications, 2020Co-Authors: Yuan LiangAbstract:Based on the resonance theory of inductive loads and capacitive loads in series and parallel circuits,we propose a low-voltage monosiphonous high-frequency high-voltage power supply with the ozone generator cell as the capacitive load.The operation principles,Design Plan and test results of this power supply are introduced in this paper.The results show that this power supply features low-cost and high performance.
R. Yokoyama - One of the best experts on this subject based on the ideXlab platform.
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Application of CBR approach for electrical equipment layout Design
Proceedings of 1995 IEEE International Conference on Fuzzy Systems., 1995Co-Authors: S. Itakura, K. Okada, R. YokoyamaAbstract:In this study, we developed a prototype system for electrical equipment layout Design. In order to acquire the appropriate layout Design Plans, we utilized the case-based reasoning (CBR) approach. Our prototype system consists of 6 executive modules: (1) Problem analysis module, (2) Case retrieval module, (3) Draft layout Design module, (4) Design Plan evaluation module, (5) Data operation module, (6) Database that includes past layout Designs. We applied the fuzzy theory to evaluate layout Design Plans in the Design Plan evaluation module. This paper describes the basic structure and functions of the developed prototype system and some application results.
G.a. Bekey - One of the best experts on this subject based on the ideXlab platform.
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Constructing Design Plans for DFA reDesign
[1993] Proceedings IEEE International Conference on Robotics and Automation, 1993Co-Authors: G.a. BekeyAbstract:Design-for-assembly (DFA) analysis of a product may indicate shortcomings of a Design, without providing specific guidance on reDesigns. A computational tool for assisting reDesigns of mechanical assemblies for DFA is introduced. The system, named REV-ENGE, is based on a model of reverse engineering in order to incorporate Design rationale into the reDesign process. The system consists of three major parts: knowledge acquisition, construction of a default Design Plan, and case-based reDesign. The authors emphasize how a Design Plan, which serves as the basis for constructing a reDesign Plan, can be generated with user assistance. A simple example of a reDesign of a container is illustrated. REV-ENGE produces reDesign Plans by constructing and modifying the original Design Plan, and facilitates the reDesign process by providing a specific order and Design actions to carry out, while considering Design rationale.
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ICRA (3) - Constructing Design Plans for DFA reDesign
[1993] Proceedings IEEE International Conference on Robotics and Automation, 1993Co-Authors: G.a. BekeyAbstract:Design-for-assembly (DFA) analysis of a product may indicate shortcomings of a Design, without providing specific guidance on reDesigns. A computational tool for assisting reDesigns of mechanical assemblies for DFA is introduced. The system, named REV-ENGE, is based on a model of reverse engineering in order to incorporate Design rationale into the reDesign process. The system consists of three major parts: knowledge acquisition, construction of a default Design Plan, and case-based reDesign. The authors emphasize how a Design Plan, which serves as the basis for constructing a reDesign Plan, can be generated with user assistance. A simple example of a reDesign of a container is illustrated. REV-ENGE produces reDesign Plans by constructing and modifying the original Design Plan, and facilitates the reDesign process by providing a specific order and Design actions to carry out, while considering Design rationale. >
G. Debyser - One of the best experts on this subject based on the ideXlab platform.
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Efficient analog circuit synthesis with simultaneous yield and robustness optimization
1998 IEEE ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287), 1998Co-Authors: G. Debyser, G. GielenAbstract:The paper presents an efficient statistical Design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The starting point of this methodology is a declarative analytical description of the circuit. An equation manipulation program based on constraint satisfaction converts this declarative model into an efficient Design Plan for optimization based sizing. The efficiency is due to the use of an operating point driven DC formulation, so that the Design Plan avoids the calculation of simultaneous sets of nonlinear equations. From the same declarative analytical description also a direct symbolic yield estimation Plan is generated. The parametric yield is estimated by propagating the spread of the technological variables through the analytical model towards the performance variables of the circuit. The Design Plan and the yield estimation Plan are then combined together in the inner loop of a global optimization routine. The strength of this methodology lies in the low CPU times needed to perform yield estimation compared to the hours of simulation batches with Monte Carlo simulations, while the accuracy is comparable.