The Experts below are selected from a list of 6 Experts worldwide ranked by ideXlab platform

Dayanand - One of the best experts on this subject based on the ideXlab platform.

  • The design related Issue debug by static fault isolation methodology
    2020 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), 2020
    Co-Authors: C. Q. Chen, Dayanand
    Abstract:

    As semiconductor technology keeps developing, failure analysis and device characterizations become more and more challenging. Global fault isolation without detailed circuit information comprises the majority of foundry EFA cases. That's why static fault isolation is majority part of the foundry EFA methodology. Limited pins will be biased with the static condition to access and trigger the defect, finally visualize it. Since the limited access pin and info were provided the static fault isolation has its intrinsic limitation, especially for the functionally failed unit analysis. So the different indirect methodologies were applied in the static analysis. The conventional and straightforward practice is to adjust the different bias condition to access and trigger the detect, trial and error. The other method is trying to select suitable and representative units for analysis. As long as some signal was triggered the subsequent analysis can be proceed on. For the functional fail the situation will be even worse because the failure mode is difficult to verify by the DC bias condition. In this paper a functional fail prototype Issue was analyzed. DC bias shows normal for the units which customer's feedback show leakage under the functional testinge After the studying of the customer provided layout and circuit of the suspected block, we repetitively switch on and off of the power we biased on some of the pin. We manage to trigger the leakage mentioned by customer. With this kind of leakage hot spot was successfully observed. Combined with different hot spot of different bias condition and layout/circuit study, the failure mechanism was come out. It is a design related problem which was also accepted by the designer.

C. Q. Chen - One of the best experts on this subject based on the ideXlab platform.

  • The design related Issue debug by static fault isolation methodology
    2020 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), 2020
    Co-Authors: C. Q. Chen, Dayanand
    Abstract:

    As semiconductor technology keeps developing, failure analysis and device characterizations become more and more challenging. Global fault isolation without detailed circuit information comprises the majority of foundry EFA cases. That's why static fault isolation is majority part of the foundry EFA methodology. Limited pins will be biased with the static condition to access and trigger the defect, finally visualize it. Since the limited access pin and info were provided the static fault isolation has its intrinsic limitation, especially for the functionally failed unit analysis. So the different indirect methodologies were applied in the static analysis. The conventional and straightforward practice is to adjust the different bias condition to access and trigger the detect, trial and error. The other method is trying to select suitable and representative units for analysis. As long as some signal was triggered the subsequent analysis can be proceed on. For the functional fail the situation will be even worse because the failure mode is difficult to verify by the DC bias condition. In this paper a functional fail prototype Issue was analyzed. DC bias shows normal for the units which customer's feedback show leakage under the functional testinge After the studying of the customer provided layout and circuit of the suspected block, we repetitively switch on and off of the power we biased on some of the pin. We manage to trigger the leakage mentioned by customer. With this kind of leakage hot spot was successfully observed. Combined with different hot spot of different bias condition and layout/circuit study, the failure mechanism was come out. It is a design related problem which was also accepted by the designer.

Nina Nurdiani - One of the best experts on this subject based on the ideXlab platform.

  • Evaluasi Proses Penelusuran Literatur dan Penerapan Topik-Tema dalam Perancangan Arsitektur
    ComTech, 2012
    Co-Authors: Nina Nurdiani
    Abstract:

    Topics and themes become the key to open the insights of both theoretical and practical knowledge in architectural design; a concept in architectural design related Issue as well. Ideally, the students of architecture do researches to generate new design ideas or proper design solutions. Prior to doing researches, it is necessary for them to find out how far the process of searches – literature review and application of topics and themes in the architectural design – have been done. This study was conducted with descriptive approach through case studies. The analysis unit is the final students of design studio class and students of the final project in the Department of Architecture, Faculty of Engineering, Binus University - Jakarta. The Results of the study illustrate that the architecture students of Binus University know and learn about the architecture research. However, they need the efforts to improve research skills, accurate literature searches, as well as exercise and evaluation of the implementation of topic-themes that started to be studied by students from the mid-level to the advance-level. The results of this study will be inputs to support architectural design learning based on architectural research at the Department of Architecture, especially in Binus University.