The Experts below are selected from a list of 543 Experts worldwide ranked by ideXlab platform

De-ting Ye - One of the best experts on this subject based on the ideXlab platform.

  • Design and Implementation of a Reduced Data Link Layer for Embedded WEB Server
    2007 2nd IEEE Conference on Industrial Electronics and Applications, 2007
    Co-Authors: Chong Fu, De-ting Ye
    Abstract:

    In this paper, a design and implementation scheme of a reduced data link layer for embedded web server is proposed based on ARM7 that uses RISC technology and RTL-8019 NIC (network interface controller) hardware platform. The design aims at the characteristics that the embedded system only has limited resources and reduced any unnecessary operation process. The logic structure, operation principle and DMA controller data sending and receiving principles of RTL-8019 NIC and IP packet encapsulation course have been explained in detail. The registers programming process for realizing NIC initialization, operation of local/remote DMA controller and Ethernet Frame sending and receiving have been deeply discussed, which provides a completed implementation scheme of data link layer construction for embedded web server.

Chong Fu - One of the best experts on this subject based on the ideXlab platform.

  • Design and Implementation of a General Data Link Layer Interface for Embedded WEB Server
    2009 International Forum on Computer Science-Technology and Applications, 2009
    Co-Authors: Ying Chen, Chong Fu
    Abstract:

    This paper proposes a design and implementation scheme of a general data link layer interface for embedded web server, which based on ARM7 and RTL-8019 NIC (network interface controller) hardware platform. The design aims at the characteristics that the embedded system is resources restricted and reduced any unnecessary operation process for improving the response speed of the web server. The logic structure, operation principle and DMA controller data sending and receiving fundamentals of RTL-8019 NIC and IP packet encapsulation process have been explained in detail. The process of programming on registers for NIC initialization, operation of local/remote DMA controller and Ethernet Frame sending and receiving have been discussed in particular, which provides a completed implementation scheme of data link layer construction for embedded Web server.

  • Design and Implementation of a Reduced Data Link Layer for Embedded WEB Server
    2007 2nd IEEE Conference on Industrial Electronics and Applications, 2007
    Co-Authors: Chong Fu, De-ting Ye
    Abstract:

    In this paper, a design and implementation scheme of a reduced data link layer for embedded web server is proposed based on ARM7 that uses RISC technology and RTL-8019 NIC (network interface controller) hardware platform. The design aims at the characteristics that the embedded system only has limited resources and reduced any unnecessary operation process. The logic structure, operation principle and DMA controller data sending and receiving principles of RTL-8019 NIC and IP packet encapsulation course have been explained in detail. The registers programming process for realizing NIC initialization, operation of local/remote DMA controller and Ethernet Frame sending and receiving have been deeply discussed, which provides a completed implementation scheme of data link layer construction for embedded web server.

Joao Baptista Dos Santos Martins - One of the best experts on this subject based on the ideXlab platform.

  • ICECS - A Gigabit UDP/IP network stack in FPGA
    2009 16th IEEE International Conference on Electronics Circuits and Systems - (ICECS 2009), 2009
    Co-Authors: Fernando Luis Herrmann, Guilherme Perin, Josue Paulo Jose De Freitas, Rafael Bertagnolli, Joao Baptista Dos Santos Martins
    Abstract:

    This paper presents a proposal of a Gigabit UDP/IP network stack in FPGA, which is the stack of the widely used in VoIP and Video-conference applications. This network node implements the Network, Transport and Link Layer of a traditional stack. This architecture is integrated and developed using Xilinx ISE tool and synthesized to a Spartan-3E FPGA. We show architecture details, timing and area results of a practical prototyping. Also, we compare our prototype and results with other works in terms of area (Xilinx slices), speed (MHz), maximum Ethernet Frame length (bytes) and maximum Ethernet speed (Mbps). Comparing to these works our architecture obtained a intermediate solution in area and is the best implementation in terms of speed (MHz).

  • A Gigabit UDP/IP network stack in FPGA
    2009 16th IEEE International Conference on Electronics Circuits and Systems - (ICECS 2009), 2009
    Co-Authors: Fernando Luis Herrmann, Guilherme Perin, Josue Paulo Jose De Freitas, Rafael Bertagnolli, Joao Baptista Dos Santos Martins
    Abstract:

    This paper presents a proposal of a Gigabit UDP/IP network stack in FPGA, which is the stack of the widely used in VoIP and Video-conference applications. This network node implements the Network, Transport and Link Layer of a traditional stack. This architecture is integrated and developed using Xilinx ISE tool and synthesized to a Spartan-3E FPGA. We show architecture details, timing and area results of a practical prototyping. Also, we compare our prototype and results with other works in terms of area (Xilinx slices), speed (MHz), maximum Ethernet Frame length (bytes) and maximum Ethernet speed (Mbps). Comparing to these works our architecture obtained a intermediate solution in area and is the best implementation in terms of speed (MHz).

W. Smith - One of the best experts on this subject based on the ideXlab platform.

  • A first person IP over HDSL case study
    36th Annual Hawaii International Conference on System Sciences 2003. Proceedings of the, 2003
    Co-Authors: W. Smith
    Abstract:

    As many authors have articulated, the "last mile problem" is often cited as a persistent engineering obstacle in deploying residential broadband solutions. Additionally, some academic researchers may require completely unfiltered Internet access, short network paths to Internet2, SIP, QoS, IPv6, and other functionality that may not be offered by commercial ISPs. This paper describes how the author designed and developed a high-speed (>2 Mb/sec), residential IP connection by using a four-wire HDSL circuit terminated directly at an academic institution. Technologically, this was done by extending the Ethernet Frame beyond the institution's physical boundaries with transparent MAC-layer forwarding controlled by relatively low-cost, dedicated HDSL transceivers. The process was strategically planned, documented, tested, and managed across seven individuals in four disparate organizations and the monthly cost per throughput capacity is significantly lower than typical ISPs in the region.

Daichi Sugita - One of the best experts on this subject based on the ideXlab platform.