Evaluation Board

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Yoshitaka Toyota - One of the best experts on this subject based on the ideXlab platform.

  • A Study on Evaluation Board Requirements for Assessing Vulnerability of Cryptographic Modules to Side-Channel Attacks
    2020 IEEE International Symposium on Electromagnetic Compatibility & Signal Power Integrity (EMCSI), 2020
    Co-Authors: Kengo Iokibe, Tomonobu Kan, Yoshitaka Toyota
    Abstract:

    We studied for specifying requirements for side-channel attack (SCA) vulnerability Evaluation Boards. SCAs are a potential threat to cryptographic modules mounted in electronics products. Cryptographic modules are required to be evaluated in terms of vulnerability by using a test Board. However, no reasonable requirements for such test Boards have been specified. In this paper, we investigated the signal-to-noise ratio (SNR) of side-channel leakage and the transfer impedance from the side-channel leakage source to an observation port where side-channel leakage is probed in an Evaluation Board. We examined two models of existing SCA vulnerability Evaluation Boards that implemented the Advanced Encryption Standard (AES). Results suggest that cryptographic modules need to provide SNRs of side-channel leakage greater than 2 dB for implementations of the cryptographic algorithm involving no SCA countermeasures. It is also inferred that the transfer impedance needs to satisfy two conflicting requirements. The transfer impedance should be as large as possible, considering the ease of Evaluation. At the same time, the transfer impedance needs to be low enough to suppress fluctuations in the power supply voltage and guarantee Evaluation in a state equivalent to the actual operating state of the IC. Coaxial connectors would be recommended to be implemented for increasing the SNR and for reproducibility of measurements.

Theodore S. Rappaport - One of the best experts on this subject based on the ideXlab platform.

  • A Wideband Sliding Correlator based Channel Sounder in 65 nm CMOS: An Evaluation Board Design
    arXiv: Signal Processing, 2020
    Co-Authors: Dipankar Shakya, Theodore S. Rappaport
    Abstract:

    Wide swaths of bandwidth at millimeter-wave (mmWave) and Terahertz (THz) frequencies stimulate diverse applications in wireless sensing, imaging, position location, cloud computing, and much more. These emerging applications motivate wireless communications hardware to operate with multi Gigahertz (GHz) bandwidth, at nominal costs, minimal size, and power consumption. Channel sounding system implementations currently used to study and measure wireless channels utilize numerous commercially available components from multiple manufacturers that result in a complex and large assembly with many costly and fragile cable interconnections between the constituents and commonly achieve a system bandwidth under one GHz. This paper presents an Evaluation Board (EVB) design that features a sliding correlator-based channel sounder with 2 GHz null-to-null RF bandwidth in a single monolithic integrated circuit (IC) fabricated in 65 nm CMOS technology. The EVB landscape provides necessary peripherals for signal interfacing, amplification, buffering, and enables integration into both the transmitter and receiver of a channel sounding system, thereby reducing complexity, size, and cost through integrated design. The channel sounder IC on the EVB is the worlds first to report gigabit-per-second baseband operation using low-cost CMOS technology, allowing the global research community to now have an inexpensive and compact channel sounder system with nanosecond time resolution capability for the detection of multipath signals in a wireless channel.

  • GLOBECOM - A Wideband Sliding Correlator based Channel Sounder in 65 nm CMOS: An Evaluation Board Design
    GLOBECOM 2020 - 2020 IEEE Global Communications Conference, 2020
    Co-Authors: Dipankar Shakya, Theodore S. Rappaport
    Abstract:

    Wide swaths of bandwidth at millimeter-wave (mm- Wave) and Terahertz (THz) frequencies stimulate diverse applications in wireless sensing, imaging, position location, cloud computing, and much more. These emerging applications motivate wireless communications hardware to operate with multi- Gigahertz (GHz) bandwidth, at nominal costs, minimal size, and power consumption. Channel sounding system implementations currently used to study and measure wireless channels utilize numerous commercially available components from multiple manufacturers that result in a complex and large assembly with many costly and fragile cable interconnections between the constituents and commonly achieve a system bandwidth under one GHz. This paper presents an Evaluation Board (EVB) design that features a sliding correlator based channel sounder with 2 GHz null-to-null RF bandwidth in a single monolithic integrated circuit (IC) fabricated in 65 nm CMOS technology. The EVB landscape provides necessary peripherals for signal interfacing, amplification, buffering, and enables integration into both the transmitter and receiver of a channel sounding system, thereby reducing complexity, size, and cost through integrated design. The channel sounder IC on the EVB is the world’s first to report gigabit-per-second baseband operation using low-cost CMOS technology, allowing the global research community to now have an inexpensive and compact channel sounder system with nanosecond time resolution capability for the detection of multipath signals in a wireless channel.

Kengo Iokibe - One of the best experts on this subject based on the ideXlab platform.

  • A Study on Evaluation Board Requirements for Assessing Vulnerability of Cryptographic Modules to Side-Channel Attacks
    2020 IEEE International Symposium on Electromagnetic Compatibility & Signal Power Integrity (EMCSI), 2020
    Co-Authors: Kengo Iokibe, Tomonobu Kan, Yoshitaka Toyota
    Abstract:

    We studied for specifying requirements for side-channel attack (SCA) vulnerability Evaluation Boards. SCAs are a potential threat to cryptographic modules mounted in electronics products. Cryptographic modules are required to be evaluated in terms of vulnerability by using a test Board. However, no reasonable requirements for such test Boards have been specified. In this paper, we investigated the signal-to-noise ratio (SNR) of side-channel leakage and the transfer impedance from the side-channel leakage source to an observation port where side-channel leakage is probed in an Evaluation Board. We examined two models of existing SCA vulnerability Evaluation Boards that implemented the Advanced Encryption Standard (AES). Results suggest that cryptographic modules need to provide SNRs of side-channel leakage greater than 2 dB for implementations of the cryptographic algorithm involving no SCA countermeasures. It is also inferred that the transfer impedance needs to satisfy two conflicting requirements. The transfer impedance should be as large as possible, considering the ease of Evaluation. At the same time, the transfer impedance needs to be low enough to suppress fluctuations in the power supply voltage and guarantee Evaluation in a state equivalent to the actual operating state of the IC. Coaxial connectors would be recommended to be implemented for increasing the SNR and for reproducibility of measurements.

Dipankar Shakya - One of the best experts on this subject based on the ideXlab platform.

  • A Wideband Sliding Correlator based Channel Sounder in 65 nm CMOS: An Evaluation Board Design
    arXiv: Signal Processing, 2020
    Co-Authors: Dipankar Shakya, Theodore S. Rappaport
    Abstract:

    Wide swaths of bandwidth at millimeter-wave (mmWave) and Terahertz (THz) frequencies stimulate diverse applications in wireless sensing, imaging, position location, cloud computing, and much more. These emerging applications motivate wireless communications hardware to operate with multi Gigahertz (GHz) bandwidth, at nominal costs, minimal size, and power consumption. Channel sounding system implementations currently used to study and measure wireless channels utilize numerous commercially available components from multiple manufacturers that result in a complex and large assembly with many costly and fragile cable interconnections between the constituents and commonly achieve a system bandwidth under one GHz. This paper presents an Evaluation Board (EVB) design that features a sliding correlator-based channel sounder with 2 GHz null-to-null RF bandwidth in a single monolithic integrated circuit (IC) fabricated in 65 nm CMOS technology. The EVB landscape provides necessary peripherals for signal interfacing, amplification, buffering, and enables integration into both the transmitter and receiver of a channel sounding system, thereby reducing complexity, size, and cost through integrated design. The channel sounder IC on the EVB is the worlds first to report gigabit-per-second baseband operation using low-cost CMOS technology, allowing the global research community to now have an inexpensive and compact channel sounder system with nanosecond time resolution capability for the detection of multipath signals in a wireless channel.

  • GLOBECOM - A Wideband Sliding Correlator based Channel Sounder in 65 nm CMOS: An Evaluation Board Design
    GLOBECOM 2020 - 2020 IEEE Global Communications Conference, 2020
    Co-Authors: Dipankar Shakya, Theodore S. Rappaport
    Abstract:

    Wide swaths of bandwidth at millimeter-wave (mm- Wave) and Terahertz (THz) frequencies stimulate diverse applications in wireless sensing, imaging, position location, cloud computing, and much more. These emerging applications motivate wireless communications hardware to operate with multi- Gigahertz (GHz) bandwidth, at nominal costs, minimal size, and power consumption. Channel sounding system implementations currently used to study and measure wireless channels utilize numerous commercially available components from multiple manufacturers that result in a complex and large assembly with many costly and fragile cable interconnections between the constituents and commonly achieve a system bandwidth under one GHz. This paper presents an Evaluation Board (EVB) design that features a sliding correlator based channel sounder with 2 GHz null-to-null RF bandwidth in a single monolithic integrated circuit (IC) fabricated in 65 nm CMOS technology. The EVB landscape provides necessary peripherals for signal interfacing, amplification, buffering, and enables integration into both the transmitter and receiver of a channel sounding system, thereby reducing complexity, size, and cost through integrated design. The channel sounder IC on the EVB is the world’s first to report gigabit-per-second baseband operation using low-cost CMOS technology, allowing the global research community to now have an inexpensive and compact channel sounder system with nanosecond time resolution capability for the detection of multipath signals in a wireless channel.

Tomonobu Kan - One of the best experts on this subject based on the ideXlab platform.

  • A Study on Evaluation Board Requirements for Assessing Vulnerability of Cryptographic Modules to Side-Channel Attacks
    2020 IEEE International Symposium on Electromagnetic Compatibility & Signal Power Integrity (EMCSI), 2020
    Co-Authors: Kengo Iokibe, Tomonobu Kan, Yoshitaka Toyota
    Abstract:

    We studied for specifying requirements for side-channel attack (SCA) vulnerability Evaluation Boards. SCAs are a potential threat to cryptographic modules mounted in electronics products. Cryptographic modules are required to be evaluated in terms of vulnerability by using a test Board. However, no reasonable requirements for such test Boards have been specified. In this paper, we investigated the signal-to-noise ratio (SNR) of side-channel leakage and the transfer impedance from the side-channel leakage source to an observation port where side-channel leakage is probed in an Evaluation Board. We examined two models of existing SCA vulnerability Evaluation Boards that implemented the Advanced Encryption Standard (AES). Results suggest that cryptographic modules need to provide SNRs of side-channel leakage greater than 2 dB for implementations of the cryptographic algorithm involving no SCA countermeasures. It is also inferred that the transfer impedance needs to satisfy two conflicting requirements. The transfer impedance should be as large as possible, considering the ease of Evaluation. At the same time, the transfer impedance needs to be low enough to suppress fluctuations in the power supply voltage and guarantee Evaluation in a state equivalent to the actual operating state of the IC. Coaxial connectors would be recommended to be implemented for increasing the SNR and for reproducibility of measurements.