Fractional Bandwidth

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F Svelto - One of the best experts on this subject based on the ideXlab platform.

  • a pvt tolerant 40 db irr 44 Fractional Bandwidth ultra wideband mm wave quadrature lo generator for 5g networks in 55 nm cmos
    IEEE Journal of Solid-state Circuits, 2018
    Co-Authors: Farshad Piri, Andrea Mazzanti, Matteo Bassi, Niccolo Lacaita, F Svelto
    Abstract:

    Precise generation of quadrature signals over a wide frequency range is a key function for the next-generation 5G communication systems. In this paper, we present a wideband quadrature generator based on a single-stage polyphase filter (PPF). A phase detector senses the phase error from quadrature signals generated by a single-stage PPF, and a feedback circuit continuously tunes the filter center frequency to the input signal frequency by varying the polyphase resistance of an nMOS device in triode. Transformer-based resonant circuits at the input and output of the PPF ensure wide Bandwidth and low loss. Prototypes have been realized in a 55-nm CMOS technology. Tailored to the next-generation 5G systems for cross-network interoperability requirements, the measured quadrature generator shows an image rejection ratio IRR > 40 dB over a Bandwidth from 28 to 44 GHz. The power consumption is 36 mW for the PPF and buffers, and 3 mW only for the calibration loop. One key aspect of the proposed solution is its robustness over process, voltage and temperature (PVT), one of the weak aspects of alternatives proposed in the literature. This solution compares favorably with the state of the art and shows the largest Fractional Bandwidth (44%) among the quadrature generators at frequencies greater than 20 GHz, to authors’ knowledge.

  • a 40db irr 44 Fractional Bandwidth ultra wideband mm wave quadrature lo generator for 5g networks in 55nm cmos
    International Solid-State Circuits Conference, 2018
    Co-Authors: Farshad Piri, Andrea Mazzanti, Matteo Bassi, Niccolo Lacaita, F Svelto
    Abstract:

    The development of next-generation 5G networks is ongoing. The large available Bandwidth at mm-waves allows increasing channel capacity well beyond the levels offered by LTE. Wide ranges of spectra, with sub-bands centered at 28GHz, 37GHz, and 39GHz, have been appointed for 5G development to facilitate international roaming and intra-networks connections [1]. In this scenario, generation of ultra-low phase-noise quadrature (IQ) signals with >40dB image rejection ratio (IRR) over >40% Fractional Bandwidth is key to efficiently deliver extreme data-rates through high-order spectrally efficient modulations. Quadrature voltage-controlled oscillators are disregarded because of their limited tuning range and also due to a severe trade-off between phase noise and phase accuracy. Solutions leveraging single-phase VCOs followed by quadrature generators is seen as a better strategy. Still, the challenging phase noise, required to support higher-order modulations trading-off with tuning range, mandates at least two VCOs covering half Bandwidth each. For quadrature generation, distributed couplers, e.g., Lange couplers, are bulky and not amenable to integration. Hybrid couplers based on coupled inductors offer a compact footprint with low loss, but they are disregarded, because a few percent variation in the coupling coefficient, k, leads to unacceptable phase deviations. Polyphase filters (PPFs) and their improvements are widely adopted at RF [2]. In [3], the PPF operation at mm-waves is proven through careful layout techniques. Still, wideband operation can be achieved only by cascading several stages, severely increasing signal loss and power consumption.

  • a 4 8mw inductorless cmos frequency divider by 4 with more than 60 Fractional Bandwidth up to 70ghz
    Custom Integrated Circuits Conference, 2012
    Co-Authors: Andrea Ghilioni, Ugo Decanis, Andrea Mazzanti, F Svelto
    Abstract:

    Frequency synthesizers at mm-waves would benefit from wide-band low-power dividers with large division factors. This work proposes a divider-by-4 based on clocked differential amplifiers working as dynamic CML latches. The clock modulates both the tail current and the load resistance of the differential pair, allowing a wide locking range. Prototypes, realized in 32nm CMOS, operate between 14GHz and 70GHz demonstrating a Fractional Bandwidth in excess of 60% in the entire range, 4.8mW of maximum power consumption and 55×18μm2 occupied area.

Gabriel M. Rebeiz - One of the best experts on this subject based on the ideXlab platform.

  • a 0 97 1 53 ghz tunable four pole bandpass filter with four transmission zeroes
    IEEE Microwave and Wireless Components Letters, 2019
    Co-Authors: Gabriel M. Rebeiz
    Abstract:

    In this letter, a miniature 0.97–1.53-GHz tunable four-pole bandpass filter with constant Fractional Bandwidth is demonstrated. The filter consists of three quarter-wavelength resonators and one half-wavelength resonator. By introducing cross-coupling, two transmission zeroes are generated and are located at both sides of the passband. Also, source–load coupling is employed to produce two extra transmission zeroes, resulting in a miniature ( $0.09\lambda _{{\text {g}}}\times 0.1\lambda _{{\text {g}}}$ ) four-pole, four-transmission zero filter with high selectivity. The measured results show a tuning range of 0.97–1.53 GHz with an insertion loss of 4.2–2 dB and 1-dB Fractional Bandwidth of 5.5%. The four transmission zeroes change with the passband synchronously, ensuring high selectivity over a wide tuning range. The application areas are in software-defined radios in high-interference environments.

  • a simple and effective method for 1 9 3 4 ghz tunable diplexer with compact size and constant Fractional Bandwidth
    IEEE Transactions on Microwave Theory and Techniques, 2016
    Co-Authors: Tao Yang, Gabriel M. Rebeiz
    Abstract:

    In this paper, a simple and effective method is proposed for designing tunable diplexers with constant Fractional Bandwidth using dual-mode resonators. The proposed method directly connects two independently designed dual-mode bandpass filters and forms a tunable diplexer without any additional matching network at the common port, thus bringing significant design flexibility to the diplexer design process. Also, an alternative design process is proposed to characterize the coupling in the dual-mode resonator and external quality factors at the input/output, making it much easier for constant Bandwidth designs. A second- and fourth-order diplexer consisting of dual-mode stepped-impedance microstrip resonators are designed and fabricated to demonstrate this method. The second-order diplexer is tuned using silicon varactor diodes, and covers 1.9–3.4 GHz with an insertion loss of 3.0–5.0 dB. Constant Fractional Bandwidths of $\sim$ 6% and $\sim$ 4.5% are obtained for the two frequency channels, respectively. In addition, due to the employment of the stepped-impedance dual-mode resonator, the second-order tunable diplexer occupies a compact area of $0.037\lambda_{0}\times 0.158\lambda_{0}$ , where $\lambda_{0}$ is the free-space wavelength at the lowest frequency that the diplexer can be tuned. Simulations and measurements are presented with excellent agreement. Application areas are in multi-standard communication systems.

  • compact self shielded 2 3 ghz high q coaxial fixed and tunable filters
    IEEE Transactions on Microwave Theory and Techniques, 2014
    Co-Authors: Tao Yang, Kevin Mingjiang Ho, Gabriel M. Rebeiz
    Abstract:

    A novel coaxial stepped-impedance resonator (SIR) filter is proposed based on conventional multi-layer printed-circuit board (PCB) technology. The resonator results in a measured unloaded quality factor (Qu) of 185 at 3.7 GHz, has compact size, is self-shielded and has very low electromagnetic (EM) coupling to nearby RF circuits. The 3-D filter topology easily lends to advanced filter design with multiple transmission zeroes using cross coupling and source-to-load coupling on the top printed-circuit board layer. Two third-order fixed-band bandpass filters, and two fourth-order tunable bandpass filters are demonstrated in this technology. The fixed-band filters have an insertion loss of 1.6 dB with a Fractional Bandwidth of 6.5% at 3.6 GHz and occupy a size of 9 × 12 mm 2 . The tunable filter covers 2.1-2.9 GHz with a Fractional Bandwidth of 3.5%, and an insertion loss of 4.2-9.2 dB, limited by the silicon varactors. Multiple transmission zeroes are used in these designs to significantly improve the filter selectivity. Application areas are in fixed and tunable filters with very compact size and high shielding from nearby circuits for advanced communication systems.

  • low loss two pole tunable filters with three different predefined Bandwidth characteristics
    IEEE Transactions on Microwave Theory and Techniques, 2008
    Co-Authors: Sangjune Park, Gabriel M. Rebeiz
    Abstract:

    Low-loss tunable filters with three different Fractional-Bandwidth variations were designed and fabricated on epsivr = 2.2, 0.787 mm Duroid substrates for 850-1400-MHz applications. A detailed analysis for realizing predefined Bandwidth characteristics is presented, and a design technique to take into account the source and load impedance loading is discussed. It is found that independent electric and magnetic coupling makes it possible to realize three different coupling coefficient variations with the same filter structure. The proposed topology is different from the comb-line design in that all three filters have identical electrical lengths, the same varactors, and the same filter Q values. Three different filters are built using Schottky varactor diodes with a tuning range from ~ 850 to ~ 1400 MHz. The constant fraction-Bandwidth filter has a 1-dB Bandwidth of 5.4%plusmn0.3% and an insertion loss of 2.88-1.04 dB. The decreasing Fractional-Bandwidth filter shows a 1-dB Bandwidth decrease from 5.2% to 2.9% with an insertion loss of 2.89-1.93 dB (this is effectively a 40-45-MHz constant absolute-Bandwidth filter). The increasing Fractional-Bandwidth filter shows a 1-dB Bandwidth increase from 4.3% to 6.5% with an insertion loss of 3.47-1.18 dB. The measured Q of the filters are between 53-152 from ~ 850 to ~ 1400 MHz. The measured third-order intermodulation intercept point ranges from 11.3 to 20.1 dBm depending on the bias voltage. To our knowledge, these planar tunable filters represent state-of-the art insertion-loss performance at this frequency range.

Jacques C Rudell - One of the best experts on this subject based on the ideXlab platform.

  • a compact 77 Fractional Bandwidth cmos band pass distributed amplifier with mirror symmetric norton transforms
    IEEE Journal of Solid-state Circuits, 2015
    Co-Authors: Venumadhav Bhagavatula, Mazhareddin Taghivand, Jacques C Rudell
    Abstract:

    This paper presents the design of a high Fractional-Bandwidth millimeter-wave band-pass distributed amplifier (BPDA) implemented in a 40 nm (LP) CMOS process. A high-order load impedance with multiple resonant elements is often used to realize wideband amplifiers. However, these implementations require the use of numerous inductors which occupy a prohibitively large amount of silicon area. A mirror-symmetric Norton transformation technique which reduces inductor component values for a wideband amplifier, allowing an area-efficient layout, is described in this paper. The BPDA consumes 34 mW while providing a power-gain of 7 dB from 24-to-54 GHz with less than 2 dB in-band gain-variation. The BPDA has a measured 77% Fractional Bandwidth, a +11 dBm in-band IIP3, and an in-band noise-figure less than 6.2 dB, while occupying an area of 0.15 mm $^{2}$ .

  • a compact 24 54 ghz cmos band pass distributed amplifier for high Fractional Bandwidth signal amplification
    Radio Frequency Integrated Circuits Symposium, 2014
    Co-Authors: Venumadhav Bhagavatula, Mazhareddin Taghivand, Jacques C Rudell
    Abstract:

    This paper describes a compact 24-54 GHz two-stage band-pass distributed amplifier (BPDA) utilizing dual mirror-symmetric Norton transformations to reduce inductor component values allowing an area-efficient layout. The BPDA, implemented in a 40nm CMOS process, occupies an active area of 0.15mm 2 , has a 77% Fractional-Bandwidth, an overall gain of 7dB, a minimum in-band IIP3 of 11dBm, inband noise-figure less than 6.2dB while consuming 34mA from a 1V supply.

Farshad Piri - One of the best experts on this subject based on the ideXlab platform.

  • a pvt tolerant 40 db irr 44 Fractional Bandwidth ultra wideband mm wave quadrature lo generator for 5g networks in 55 nm cmos
    IEEE Journal of Solid-state Circuits, 2018
    Co-Authors: Farshad Piri, Andrea Mazzanti, Matteo Bassi, Niccolo Lacaita, F Svelto
    Abstract:

    Precise generation of quadrature signals over a wide frequency range is a key function for the next-generation 5G communication systems. In this paper, we present a wideband quadrature generator based on a single-stage polyphase filter (PPF). A phase detector senses the phase error from quadrature signals generated by a single-stage PPF, and a feedback circuit continuously tunes the filter center frequency to the input signal frequency by varying the polyphase resistance of an nMOS device in triode. Transformer-based resonant circuits at the input and output of the PPF ensure wide Bandwidth and low loss. Prototypes have been realized in a 55-nm CMOS technology. Tailored to the next-generation 5G systems for cross-network interoperability requirements, the measured quadrature generator shows an image rejection ratio IRR > 40 dB over a Bandwidth from 28 to 44 GHz. The power consumption is 36 mW for the PPF and buffers, and 3 mW only for the calibration loop. One key aspect of the proposed solution is its robustness over process, voltage and temperature (PVT), one of the weak aspects of alternatives proposed in the literature. This solution compares favorably with the state of the art and shows the largest Fractional Bandwidth (44%) among the quadrature generators at frequencies greater than 20 GHz, to authors’ knowledge.

  • a 40db irr 44 Fractional Bandwidth ultra wideband mm wave quadrature lo generator for 5g networks in 55nm cmos
    International Solid-State Circuits Conference, 2018
    Co-Authors: Farshad Piri, Andrea Mazzanti, Matteo Bassi, Niccolo Lacaita, F Svelto
    Abstract:

    The development of next-generation 5G networks is ongoing. The large available Bandwidth at mm-waves allows increasing channel capacity well beyond the levels offered by LTE. Wide ranges of spectra, with sub-bands centered at 28GHz, 37GHz, and 39GHz, have been appointed for 5G development to facilitate international roaming and intra-networks connections [1]. In this scenario, generation of ultra-low phase-noise quadrature (IQ) signals with >40dB image rejection ratio (IRR) over >40% Fractional Bandwidth is key to efficiently deliver extreme data-rates through high-order spectrally efficient modulations. Quadrature voltage-controlled oscillators are disregarded because of their limited tuning range and also due to a severe trade-off between phase noise and phase accuracy. Solutions leveraging single-phase VCOs followed by quadrature generators is seen as a better strategy. Still, the challenging phase noise, required to support higher-order modulations trading-off with tuning range, mandates at least two VCOs covering half Bandwidth each. For quadrature generation, distributed couplers, e.g., Lange couplers, are bulky and not amenable to integration. Hybrid couplers based on coupled inductors offer a compact footprint with low loss, but they are disregarded, because a few percent variation in the coupling coefficient, k, leads to unacceptable phase deviations. Polyphase filters (PPFs) and their improvements are widely adopted at RF [2]. In [3], the PPF operation at mm-waves is proven through careful layout techniques. Still, wideband operation can be achieved only by cascading several stages, severely increasing signal loss and power consumption.

Andrea Mazzanti - One of the best experts on this subject based on the ideXlab platform.

  • a pvt tolerant 40 db irr 44 Fractional Bandwidth ultra wideband mm wave quadrature lo generator for 5g networks in 55 nm cmos
    IEEE Journal of Solid-state Circuits, 2018
    Co-Authors: Farshad Piri, Andrea Mazzanti, Matteo Bassi, Niccolo Lacaita, F Svelto
    Abstract:

    Precise generation of quadrature signals over a wide frequency range is a key function for the next-generation 5G communication systems. In this paper, we present a wideband quadrature generator based on a single-stage polyphase filter (PPF). A phase detector senses the phase error from quadrature signals generated by a single-stage PPF, and a feedback circuit continuously tunes the filter center frequency to the input signal frequency by varying the polyphase resistance of an nMOS device in triode. Transformer-based resonant circuits at the input and output of the PPF ensure wide Bandwidth and low loss. Prototypes have been realized in a 55-nm CMOS technology. Tailored to the next-generation 5G systems for cross-network interoperability requirements, the measured quadrature generator shows an image rejection ratio IRR > 40 dB over a Bandwidth from 28 to 44 GHz. The power consumption is 36 mW for the PPF and buffers, and 3 mW only for the calibration loop. One key aspect of the proposed solution is its robustness over process, voltage and temperature (PVT), one of the weak aspects of alternatives proposed in the literature. This solution compares favorably with the state of the art and shows the largest Fractional Bandwidth (44%) among the quadrature generators at frequencies greater than 20 GHz, to authors’ knowledge.

  • a 40db irr 44 Fractional Bandwidth ultra wideband mm wave quadrature lo generator for 5g networks in 55nm cmos
    International Solid-State Circuits Conference, 2018
    Co-Authors: Farshad Piri, Andrea Mazzanti, Matteo Bassi, Niccolo Lacaita, F Svelto
    Abstract:

    The development of next-generation 5G networks is ongoing. The large available Bandwidth at mm-waves allows increasing channel capacity well beyond the levels offered by LTE. Wide ranges of spectra, with sub-bands centered at 28GHz, 37GHz, and 39GHz, have been appointed for 5G development to facilitate international roaming and intra-networks connections [1]. In this scenario, generation of ultra-low phase-noise quadrature (IQ) signals with >40dB image rejection ratio (IRR) over >40% Fractional Bandwidth is key to efficiently deliver extreme data-rates through high-order spectrally efficient modulations. Quadrature voltage-controlled oscillators are disregarded because of their limited tuning range and also due to a severe trade-off between phase noise and phase accuracy. Solutions leveraging single-phase VCOs followed by quadrature generators is seen as a better strategy. Still, the challenging phase noise, required to support higher-order modulations trading-off with tuning range, mandates at least two VCOs covering half Bandwidth each. For quadrature generation, distributed couplers, e.g., Lange couplers, are bulky and not amenable to integration. Hybrid couplers based on coupled inductors offer a compact footprint with low loss, but they are disregarded, because a few percent variation in the coupling coefficient, k, leads to unacceptable phase deviations. Polyphase filters (PPFs) and their improvements are widely adopted at RF [2]. In [3], the PPF operation at mm-waves is proven through careful layout techniques. Still, wideband operation can be achieved only by cascading several stages, severely increasing signal loss and power consumption.

  • a 4 8mw inductorless cmos frequency divider by 4 with more than 60 Fractional Bandwidth up to 70ghz
    Custom Integrated Circuits Conference, 2012
    Co-Authors: Andrea Ghilioni, Ugo Decanis, Andrea Mazzanti, F Svelto
    Abstract:

    Frequency synthesizers at mm-waves would benefit from wide-band low-power dividers with large division factors. This work proposes a divider-by-4 based on clocked differential amplifiers working as dynamic CML latches. The clock modulates both the tail current and the load resistance of the differential pair, allowing a wide locking range. Prototypes, realized in 32nm CMOS, operate between 14GHz and 70GHz demonstrating a Fractional Bandwidth in excess of 60% in the entire range, 4.8mW of maximum power consumption and 55×18μm2 occupied area.