The Experts below are selected from a list of 183 Experts worldwide ranked by ideXlab platform
Chunsheng Jiang - One of the best experts on this subject based on the ideXlab platform.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Gang Qiu, Ali Shakouri, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4-12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Mengwei Si, Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Ali Shakouri, Chunjung Su, Chienting Wu, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal–oxide–semiconductor field-effect transistor (MOSFET) at 60 mV dec−1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4–12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm−1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied. A field-effect MoS 2 transistor with a negative capacitor in its gate shows stable, hysteresis-free performance characterized by a sub-thermionic sub-threshold slope.
Muhammad A Alam - One of the best experts on this subject based on the ideXlab platform.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Gang Qiu, Ali Shakouri, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4-12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Mengwei Si, Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Ali Shakouri, Chunjung Su, Chienting Wu, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal–oxide–semiconductor field-effect transistor (MOSFET) at 60 mV dec−1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4–12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm−1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied. A field-effect MoS 2 transistor with a negative capacitor in its gate shows stable, hysteresis-free performance characterized by a sub-thermionic sub-threshold slope.
Ali Shakouri - One of the best experts on this subject based on the ideXlab platform.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Gang Qiu, Ali Shakouri, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4-12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Mengwei Si, Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Ali Shakouri, Chunjung Su, Chienting Wu, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal–oxide–semiconductor field-effect transistor (MOSFET) at 60 mV dec−1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4–12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm−1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied. A field-effect MoS 2 transistor with a negative capacitor in its gate shows stable, hysteresis-free performance characterized by a sub-thermionic sub-threshold slope.
Nathan J Conrad - One of the best experts on this subject based on the ideXlab platform.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Gang Qiu, Ali Shakouri, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4-12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Mengwei Si, Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Ali Shakouri, Chunjung Su, Chienting Wu, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal–oxide–semiconductor field-effect transistor (MOSFET) at 60 mV dec−1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4–12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm−1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied. A field-effect MoS 2 transistor with a negative capacitor in its gate shows stable, hysteresis-free performance characterized by a sub-thermionic sub-threshold slope.
Hong Zhou - One of the best experts on this subject based on the ideXlab platform.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Gang Qiu, Ali Shakouri, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4-12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied.
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steep slope hysteresis free negative capacitance mos 2 transistors
Nature Nanotechnology, 2018Co-Authors: Mengwei Si, Chunsheng Jiang, Nathan J Conrad, Hong Zhou, Kerry Maize, Ali Shakouri, Chunjung Su, Chienting Wu, Muhammad A AlamAbstract:The so-called Boltzmann tyranny defines the Fundamental thermionic limit of the subthreshold slope of a metal–oxide–semiconductor field-effect transistor (MOSFET) at 60 mV dec−1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this Fundamental Barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4–12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm−1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced Barrier lowering. A high on-current-induced self-heating effect was also observed and studied. A field-effect MoS 2 transistor with a negative capacitor in its gate shows stable, hysteresis-free performance characterized by a sub-thermionic sub-threshold slope.
