The Experts below are selected from a list of 66 Experts worldwide ranked by ideXlab platform

Yves Robert - One of the best experts on this subject based on the ideXlab platform.

  • Hierarchical QR factorization algorithms for multi-core clusters
    2013
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Mathias Jacquelin, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed nodes, where a node is a multi-core processor. These platforms represent the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of nodes, in order to minimize the number of inter-processor communications (aka, ''communication-avoiding''), it is natural to consider hierarchical trees composed of an ''inter-node'' tree which acts on top of ''intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ''TS level'' for cache-friendliness, (1) ''low-level'' for decoupled highly parallel inter-node reductions, (2) ''domino level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-node and intra-node. Numerical experiments on a cluster of multi-core nodes (i) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (ii) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the DAGuE scheduling tool significantly outperforms currently available QR factorization software for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • Hierarchical QR factorization algorithms for multi-core clusters
    2013
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Mathias Jacquelin, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed nodes, where a node is a multi-core processor. These platforms represent the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of nodes, in order to minimize the number of inter-processor communications (aka, ''communication-avoiding''), it is natural to consider hierarchical trees composed of an ''inter-node'' tree which acts on top of ''intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ''TS level'' for cache-friendliness, (1) ''low-level'' for decoupled highly parallel inter-node reductions, (2) ''domino level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-node and intra-node. Numerical experiments on a cluster of multi-core nodes (i) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (ii) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the DAGuE scheduling tool significantly outperforms currently available QR factorization software for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • hierarchical qr factorization algorithms for multi core cluster systems
    International Parallel and Distributed Processing Symposium, 2012
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed multi-core nodes. %equipped with accelerators. These platforms make the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of multicores, in order to minimize the number of inter-processor communications (aka, ``communication-avoiding'' algorithm), it is natural to consider two-level hierarchical trees composed of an ``inter-node'' tree which acts on top of ``intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ``TS level'' for cache-friendliness, (1) ``low level'' for decoupled highly parallel inter-node reductions, (2) ``coupling level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-cluster and intra-cluster. Numerical experiments on a cluster of multicore nodes (1) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (2) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the \Dague scheduling tool significantly outperforms currently available QR factorization softwares for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • IPDPS - Hierarchical QR Factorization Algorithms for Multi-core Cluster Systems
    2012 IEEE 26th International Parallel and Distributed Processing Symposium, 2012
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed multi-core nodes. %equipped with accelerators. These platforms make the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of multicores, in order to minimize the number of inter-processor communications (aka, ``communication-avoiding'' algorithm), it is natural to consider two-level hierarchical trees composed of an ``inter-node'' tree which acts on top of ``intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ``TS level'' for cache-friendliness, (1) ``low level'' for decoupled highly parallel inter-node reductions, (2) ``coupling level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-cluster and intra-cluster. Numerical experiments on a cluster of multicore nodes (1) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (2) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the \Dague scheduling tool significantly outperforms currently available QR factorization softwares for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • Hierarchical QR factorization algorithms for multi-core cluster systems
    2012
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed multi-core nodes. These platforms make the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of multicores, in order to minimize the number of inter-processor communications (aka, "communication-avoiding'' algorithm), it is natural to consider two-level hierarchical trees composed of an "inter-node'' tree which acts on top of "intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) "TS level'' for cache-friendliness, (1) "low level'' for decoupled highly parallel inter-node reductions, (2) "coupling level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-cluster and intra-cluster. Numerical experiments on a cluster of multicore nodes (1) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (2) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the DAGUE scheduling tool significantly outperforms currently available QR factorization softwares for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platfo- ms.

Mathieu Faverge - One of the best experts on this subject based on the ideXlab platform.

  • Improving mapping for sparse direct solvers: A trade-off between Data Locality and load balancing
    2020
    Co-Authors: Changjiang Gou, Mathieu Faverge, Ali Al Zoobi, Anne Benoit, Loris Marchal, Grégoire Pichon, Pierre Ramet
    Abstract:

    In order to express parallelism, parallel sparse direct solvers take advantage of the elimination tree to exhibit tree-shaped task graphs, where nodes represent computational tasks and edges represent Data dependencies. One of the pre-processing stages of sparse direct solvers consists of mapping computational resources (processors) to these tasks. The objective is to minimize the factorization time by exhibiting Good Data Locality and load balancing. The proportional mapping technique is a widely used approach to solve this resource-allocation problem. It achieves Good Data Locality by assigning the same processors to large parts of the elimination tree. However, it may limit load balancing in some cases. In this paper, we propose a dynamic mapping algorithm based on proportional mapping. This new approach, named Steal, relaxes the Data Locality criterion to improve load balancing. In order to validate the newly introduced method, we perform extensive experiments on the PaStiX sparse direct solver. It demonstrates that our algorithm enables better static scheduling of the numerical factorization while keeping Good Data Locality.

  • Hierarchical QR factorization algorithms for multi-core clusters
    2013
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Mathias Jacquelin, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed nodes, where a node is a multi-core processor. These platforms represent the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of nodes, in order to minimize the number of inter-processor communications (aka, ''communication-avoiding''), it is natural to consider hierarchical trees composed of an ''inter-node'' tree which acts on top of ''intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ''TS level'' for cache-friendliness, (1) ''low-level'' for decoupled highly parallel inter-node reductions, (2) ''domino level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-node and intra-node. Numerical experiments on a cluster of multi-core nodes (i) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (ii) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the DAGuE scheduling tool significantly outperforms currently available QR factorization software for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • Hierarchical QR factorization algorithms for multi-core clusters
    2013
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Mathias Jacquelin, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed nodes, where a node is a multi-core processor. These platforms represent the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of nodes, in order to minimize the number of inter-processor communications (aka, ''communication-avoiding''), it is natural to consider hierarchical trees composed of an ''inter-node'' tree which acts on top of ''intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ''TS level'' for cache-friendliness, (1) ''low-level'' for decoupled highly parallel inter-node reductions, (2) ''domino level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-node and intra-node. Numerical experiments on a cluster of multi-core nodes (i) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (ii) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the DAGuE scheduling tool significantly outperforms currently available QR factorization software for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • hierarchical qr factorization algorithms for multi core cluster systems
    International Parallel and Distributed Processing Symposium, 2012
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed multi-core nodes. %equipped with accelerators. These platforms make the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of multicores, in order to minimize the number of inter-processor communications (aka, ``communication-avoiding'' algorithm), it is natural to consider two-level hierarchical trees composed of an ``inter-node'' tree which acts on top of ``intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ``TS level'' for cache-friendliness, (1) ``low level'' for decoupled highly parallel inter-node reductions, (2) ``coupling level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-cluster and intra-cluster. Numerical experiments on a cluster of multicore nodes (1) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (2) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the \Dague scheduling tool significantly outperforms currently available QR factorization softwares for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • IPDPS - Hierarchical QR Factorization Algorithms for Multi-core Cluster Systems
    2012 IEEE 26th International Parallel and Distributed Processing Symposium, 2012
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed multi-core nodes. %equipped with accelerators. These platforms make the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of multicores, in order to minimize the number of inter-processor communications (aka, ``communication-avoiding'' algorithm), it is natural to consider two-level hierarchical trees composed of an ``inter-node'' tree which acts on top of ``intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ``TS level'' for cache-friendliness, (1) ``low level'' for decoupled highly parallel inter-node reductions, (2) ``coupling level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-cluster and intra-cluster. Numerical experiments on a cluster of multicore nodes (1) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (2) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the \Dague scheduling tool significantly outperforms currently available QR factorization softwares for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

Jack Dongarra - One of the best experts on this subject based on the ideXlab platform.

  • Hierarchical QR factorization algorithms for multi-core clusters
    2013
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Mathias Jacquelin, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed nodes, where a node is a multi-core processor. These platforms represent the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of nodes, in order to minimize the number of inter-processor communications (aka, ''communication-avoiding''), it is natural to consider hierarchical trees composed of an ''inter-node'' tree which acts on top of ''intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ''TS level'' for cache-friendliness, (1) ''low-level'' for decoupled highly parallel inter-node reductions, (2) ''domino level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-node and intra-node. Numerical experiments on a cluster of multi-core nodes (i) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (ii) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the DAGuE scheduling tool significantly outperforms currently available QR factorization software for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • Hierarchical QR factorization algorithms for multi-core clusters
    2013
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Mathias Jacquelin, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed nodes, where a node is a multi-core processor. These platforms represent the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of nodes, in order to minimize the number of inter-processor communications (aka, ''communication-avoiding''), it is natural to consider hierarchical trees composed of an ''inter-node'' tree which acts on top of ''intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ''TS level'' for cache-friendliness, (1) ''low-level'' for decoupled highly parallel inter-node reductions, (2) ''domino level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-node and intra-node. Numerical experiments on a cluster of multi-core nodes (i) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (ii) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the DAGuE scheduling tool significantly outperforms currently available QR factorization software for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • hierarchical qr factorization algorithms for multi core cluster systems
    International Parallel and Distributed Processing Symposium, 2012
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed multi-core nodes. %equipped with accelerators. These platforms make the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of multicores, in order to minimize the number of inter-processor communications (aka, ``communication-avoiding'' algorithm), it is natural to consider two-level hierarchical trees composed of an ``inter-node'' tree which acts on top of ``intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ``TS level'' for cache-friendliness, (1) ``low level'' for decoupled highly parallel inter-node reductions, (2) ``coupling level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-cluster and intra-cluster. Numerical experiments on a cluster of multicore nodes (1) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (2) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the \Dague scheduling tool significantly outperforms currently available QR factorization softwares for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • IPDPS - Hierarchical QR Factorization Algorithms for Multi-core Cluster Systems
    2012 IEEE 26th International Parallel and Distributed Processing Symposium, 2012
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed multi-core nodes. %equipped with accelerators. These platforms make the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of multicores, in order to minimize the number of inter-processor communications (aka, ``communication-avoiding'' algorithm), it is natural to consider two-level hierarchical trees composed of an ``inter-node'' tree which acts on top of ``intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) ``TS level'' for cache-friendliness, (1) ``low level'' for decoupled highly parallel inter-node reductions, (2) ``coupling level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-cluster and intra-cluster. Numerical experiments on a cluster of multicore nodes (1) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (2) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the \Dague scheduling tool significantly outperforms currently available QR factorization softwares for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platforms.

  • Hierarchical QR factorization algorithms for multi-core cluster systems
    2012
    Co-Authors: Jack Dongarra, Julien Langou, Thomas Herault, Mathieu Faverge, Yves Robert
    Abstract:

    This paper describes a new QR factorization algorithm which is especially designed for massively parallel platforms combining parallel distributed multi-core nodes. These platforms make the present and the foreseeable future of high-performance computing. Our new QR factorization algorithm falls in the category of the tile algorithms which naturally enables Good Data Locality for the sequential kernels executed by the cores (high sequential performance), low number of messages in a parallel distributed setting (small latency term), and fine granularity (high parallelism). Each tile algorithm is uniquely characterized by its sequence of reduction trees. In the context of a cluster of multicores, in order to minimize the number of inter-processor communications (aka, "communication-avoiding'' algorithm), it is natural to consider two-level hierarchical trees composed of an "inter-node'' tree which acts on top of "intra-node'' trees. At the intra-node level, we propose a hierarchical tree made of three levels: (0) "TS level'' for cache-friendliness, (1) "low level'' for decoupled highly parallel inter-node reductions, (2) "coupling level'' to efficiently resolve interactions between local reductions and global reductions. Our hierarchical algorithm and its implementation are flexible and modular, and can accommodate several kernel types, different distribution layouts, and a variety of reduction trees at all levels, both inter-cluster and intra-cluster. Numerical experiments on a cluster of multicore nodes (1) confirm that each of the four levels of our hierarchical tree contributes to build up performance and (2) build insights on how these levels influence performance and interact within each other. Our implementation of the new algorithm with the DAGUE scheduling tool significantly outperforms currently available QR factorization softwares for all matrix shapes, thereby bringing a new advance in numerical linear algebra for petascale and exascale platfo- ms.

David E. Keyes - One of the best experts on this subject based on the ideXlab platform.

  • Newton-Krylov-Schwarz methods : Interfacing sparse linear solvers with nonlinear applications
    Journal of Applied Mathematics and Mechanics, 1996
    Co-Authors: David E. Keyes, Venkat Venkatakrishnan
    Abstract:

    Parallel implicit solution methods are increasingly important in large-scale applications, since reliable low-residual solutions to individual steady-state analyses are often needed repeatedly in multidisciplinary analysis and optimization. We review a class of linear implicit methods called Krylov-Schwarz and a class of nonlinear implicit methods called Newton-Krylov. Newton-Krylov methods are suited for problems in which it is unreasonable to compute or store a true Jacobian, given a strong enough preconditioner for the inner linear system that needs to be solved for each Newton correction. Schwarz-type domain decomposition preconditioning provides Good Data Locality for parallel implementations over a range of granularities. Their composition forms a class of methods called Newton-Krylov-Schwarz with strong potential for parallel implicit solution, as illustrated on an aerodynamics application.

  • Aerodynamic applications of Newton- Krylov-Schwarz solvers
    Lecture Notes in Physics, 1995
    Co-Authors: David E. Keyes
    Abstract:

    Parallel implicit solution methods are increasingly important in aerodynamics, since reliable low-residual solutions at elevated CFL number are prerequisite to such large-scale applications of aerodynamic analysis codes as aeroelasticity and optimization. In this chapter, a class of nonlinear implicit methods and a class of linear implicit methods are defined and illustrated. Their composition forms a class of methods with strong potential for parallel implicit solution of aerodynamics problems. Newton-Krylov methods are suited for nonlinear problems in which it is unreasonable to compute or store a true Jacobian, given a strong enough preconditioner for the inner linear system that needs to be solved for each Newton correction. In turn, Krylov-Schwarz iterative methods are suited for the parallel implicit solution of multidimensional systems of linearized boundary value problems. Schwarz-type domain decomposition preconditioning provides Good Data Locality for parallel implementations over a range of granularities. These methods are reviewed separately, illustrated with CFD applications, and composed in a class of methods named Newton-Krylov-Schwarz.

  • Parallel Implicit Solvers for Steady, Compressible Aerodynamics
    Parallel Computational Fluid Dynamics 1993, 1995
    Co-Authors: William Gropp, David E. Keyes, M. Driss Tidriri
    Abstract:

    Publisher Summary The computations of steady transonic flow are often approached through a process of semi- implicit pseudo-transient continuation: a time derivative is appended to the governing of Euler or Navier–Stokes equations and the discretized time step is chosen according to several criteria. Conventional factorizations yield sparse block triangular or block tridiagonal systems not ideally suited for large-scale parallelism. Despite the dual requirements of high-order spatial accuracy and high Reynolds numbers in aerodynamic applications, delta forms of the governing equations with low-order upwind implicit parts can be effectively preconditioned in a domain-parallel fashion and accelerated using methods of Krylov type, such as GMRES, Bi-CGSTAB, and Transpose-Free QMR. Newton-Krylov methods are potentially well suited for the implicit solution of nonlinear problems, whenever it is unreasonable to compute or store a true Jacobian. Krylov-Schwarz iterative methods are well suited for the parallel implicit solution of multidimensional systems of boundary value problems that arise in CFD. They provide Good Data Locality so that even a high-latency workstation network can be employed as a parallel machine. The combination of these two methods is known as “Newton-Krylov-Schwarz.” Numerical experiments are discussed in this chapter based on some algorithmic and implementation aspects: the use of mixed discretization schemes in the (implicitly defined) Jacobian and its preconditioner, the selection of the differencing parameter in the formation of the action of the Jacobian, and workstation network implementation.

Gou Changjiang - One of the best experts on this subject based on the ideXlab platform.

  • Amélioration du placement de tâches pour des solveurs directs creux
    HAL CCSD, 2020
    Co-Authors: Gou Changjiang, Al Zoobi Ali, Benoit Anne, Faverge Mathieu, Marchal Loris, Pichon Grégoire, Ramet Pierre
    Abstract:

    International audienceIn order to express parallelism, parallel sparse direct solvers take advantage of the elimination tree to exhibit tree-shaped task graphs, where nodes represent computational tasks and edges represent Data dependencies. One of the pre-processing stages of sparse direct solvers consists of mapping computational resources (processors) to these tasks. The objective is to minimize the factorization time by exhibiting Good Data Locality and load balancing. The proportional mapping technique is a widely used approach to solve this resource-allocation problem. It achieves Good Data Locality by assigning the same processors to large parts of the elimination tree. However, it may limit load balancing in some cases. In this paper, we propose a dynamic mapping algorithm based on proportional mapping. This new approach, named Steal, relaxes the Data Locality criterion to improve load balancing. In order to validate the newly introduced method, we perform extensive experiments on the PaStiX sparse direct solver. It demonstrates that our algorithm enables better static scheduling of the numerical factorization while keeping Good Data Locality.Les solveurs parallèles directs creux se servent de l’arbre d’ élimination pour obtenir des graphes de tâches sous forme d’arbres, où les nœuds représentent des tâches de calcul, et les arêtes des dépendances de données. Une des premières étapes de ces solveurs consiste à placer les tâches sur les ressources (les processeurs). Le but est de minimiser le temps de factorisation, en ayant un bon équilibrage de charge et une bonne localité des données. La technique de place-ment proportionnel est utilisée afin d’avoir une bonne localité : un même processeur va traiter une branche de l’arbre d’élimination et il y a peu de communications à faire lors de la factorisation. Cependant, dans certains cas, l’équilibrage de charge n’est pas parfait. Nous proposons un nouvel algorithme dynamique de placement, basé sur le placement proportionnel, qui améliore l’équilibrage de charge au prix d’une légère perte en localité. De nombreuses expériences et simulations sur le solveur direct creux PaStiX permettent de démontrer que notre algorithme permet un meilleur ordonnancement pour la factorisation numérique, tout en gardant une bonne localité des données

  • Amélioration du placement de tâches pour des solveurs directs creux
    HAL CCSD, 2020
    Co-Authors: Gou Changjiang, Al Zoobi Ali, Benoit Anne, Faverge Mathieu, Marchal Loris, Pichon Grégoire, Ramet Pierre
    Abstract:

    In order to express parallelism, parallel sparse direct solvers take advantage of the elimination tree to exhibit tree-shaped task graphs, where nodes represent computational tasks and edges represent Data dependencies. One of the pre-processing stages of sparse direct solvers consists of mapping computational resources (processors) to these tasks. The objective is to minimize the factorization time by exhibiting Good Data Locality and load balancing. The proportional mapping technique is a widely used approach to solve this resource-allocation problem. It achieves Good Data Locality by assigning the same processors to large parts of the elimination tree. However, it may limit load balancing in some cases. In this paper, we propose a dynamic mapping algorithm based on proportional mapping. This new approach, named Steal, relaxes the Data Locality criterion to improve load balancing. In order to validate the newly introduced method, we perform extensive experiments on the PaStiX sparse direct solver. It demonstrates that our algorithm enables better static scheduling of the numerical factorization while keeping Good Data Locality.Les solveurs parallèles directs creux se servent de l’arbre d’ élimination pour obtenir des graphes de tâches sous forme d’arbres, où les nœuds représentent des tâches de calcul, et les arêtes des dépendances de données. Une des premières étapes de ces solveurs consiste à placer les tâches sur les ressources (les processeurs). Le but est de minimiser le temps de factorisation, en ayant un bon équilibrage de charge et une bonne localité des données. La technique de place-ment proportionnel est utilisée afin d’avoir une bonne localité : un même processeur va traiter une branche de l’arbre d’élimination et il y a peu de communications à faire lors de la factorisation. Cependant, dans certains cas, l’équilibrage de charge n’est pas parfait. Nous proposons un nouvel algorithme dynamique de placement, basé sur le placement proportionnel, qui améliore l’équilibrage de charge au prix d’une légère perte en localité. De nombreuses expériences et simulations sur le solveur direct creux PaStiX permettent de démontrer que notre algorithme permet un meilleur ordonnancement pour la factorisation numérique, tout en gardant une bonne localité des données

  • Allocation de tâches et équilibrage de charge pour les performances, la mémoire, la fiabilité et l'énergie
    HAL CCSD, 2020
    Co-Authors: Gou Changjiang
    Abstract:

    This thesis focuses on multi-objective optimization problems arising when running scientific applications on high performance computing platforms and streaming applications on embedded systems. These optimization problems are all proven to be NP-complete, hence our efforts are mainly on designing efficient heuristics for general cases, and proposing optimal solutions for special cases.Some scientific applications are commonly modeled as rooted trees. Due to the size of temporary Data, processing such a tree may exceed the local memory capacity. A practical solution on a multiprocessor system is to partition the tree into many subtrees, and run each on a processor, which is equipped with a local memory. We studied how to partition the tree into several subtrees such that each subtree fits in local memory and the makespan is minimized, when communication costs between processors are accounted for.Then, a practical work of tree scheduling arising in parallel sparse matrix solver is examined. The objective is to minimize the factorization time by exhibiting Good Data Locality and load balancing. The proportional mapping technique is a widely used approach to solve this resource-allocation problem. It achieves Good Data Locality by assigning the same processors to large parts of the task tree. However, it may limit load balancing in some cases. Based on proportional mapping, a dynamic scheduling algorithm is proposed. It relaxes the Data Locality criterion to improve load balancing. The performance of our approach has been validated by extensive experiments with the parallel sparse matrix direct solver PaStiX.Streaming applications often appear in video and audio domains. They are characterized by a series of operations on streaming Data, and a high throughput. Multi-Processor System on Chip (MPSoC) is a multi/many-core embedded system that integrates many specific cores through a high speed interconnect on a single die. Such systems are widely used for multimedia applications. Lots of MPSoCs are batteries-operated. Such a tight energy budget intrinsically calls for an efficient schedule to meet the intensive computation demands. Dynamic Voltage and Frequency Scaling (DVFS) can save energy by decreasing the frequency and voltage at the price of increasing failure rates. Another technique to reduce the energy cost and meet the reliability target consists in running multiple copies of tasks. We first model applications as linear chains and study how to minimize the energy consumption under throughput and reliability constraints, using DVFS and duplication technique on MPSoC platforms.Then, in a following study, with the same optimization goal, we model streaming applications as series-parallel graphs, which are more complex than simple chains and more realistic. The target platform has a hierarchical communication system with two levels, which is common in embedded systems and high performance computing platforms. The reliability is guaranteed through either running tasks at the maximum speed or triplication of tasks. Several efficient heuristics are proposed to tackle this NP-complete optimization problem.Cette thèse se concentre sur les problèmes d'optimisation multi-objectifs survenant lors de l'exécution d'applications scientifiques sur des plates-formes de calcul haute performance et des applications de streaming sur des systèmes embarqués. Ces problèmes d'optimisation se sont tous avérés NP-complets, c'est pourquoi nos efforts portent principalement sur la conception d'heuristiques efficaces pour des cas généraux et sur la proposition de solutions optimales pour des cas particuliers.Certaines applications scientifiques sont généralement modélisées comme des arbres enracinés. En raison de la taille des données temporaires, le traitement d'une telle arborescence peut dépasser la capacité de la mémoire locale. Une solution pratique sur un système multiprocesseur consiste à partitionner l'arborescence en plusieurs sous-arbres, et à exécuter chacun d'eux sur un processeur, qui est équipé d'une mémoire locale. Nous avons étudié comment partitionner l'arbre en plusieurs sous-arbres de sorte que chaque sous-arbre tienne dans la mémoire locale et que le makespan soit minimisé, lorsque les coûts de communication entre les processeurs sont pris en compte. Ensuite, un travail pratique d'ordonnancement d'arbres apparaissant dans un solveur de matrice clairsemée parallèle est examiné. L'objectif est de minimiser le temps de factorisation en présentant une bonne localisation des données et un équilibrage de charge. La technique de cartographie proportionnelle est une approche largement utilisée pour résoudre ce problème d'allocation des ressources. Il réalise une bonne localisation des données en affectant les mêmes processeurs à de grandes parties de l'arborescence des tâches. Cependant, cela peut limiter l'équilibrage de charge dans certains cas. Basé sur une cartographie proportionnelle, un algorithme d'ordonnancement dynamique est proposé. Il assouplit le critère de localisation des données pour améliorer l'équilibrage de charge. La performance de notre approche a été validée par de nombreuses expériences avec le solveur direct à matrice clairsemée parallèle PaStiX. Les applications de streaming apparaissent souvent dans les domaines vidéo et audio. Ils se caractérisent par une série d'opérations sur le streaming de données et un débit élevé. Le système multiprocesseur sur puce (MPSoC) est un système embarqué multi / plusieurs cœurs qui intègre de nombreux cœurs spécifiques via une interconnexion haute vitesse sur une seule puce. De tels systèmes sont largement utilisés pour les applications multimédias. De nombreux MPSoC fonctionnent sur piles. Un budget énergétique aussi serré nécessite intrinsèquement un calendrier efficace pour répondre aux demandes de calcul intensives. La mise à l'échelle dynamique de la tension et de la fréquence (DVFS) peut économiser de l'énergie en diminuant la fréquence et la tension au prix d'une augmentation des taux de défaillance. Une autre technique pour réduire le coût énergétique et atteindre l'objectif de fiabilité consiste à exécuter plusieurs copies de tâches. Nous modélisons d'abord les applications sous forme de chaînes linéaires et étudions comment minimiser la consommation d'énergie sous des contraintes de débit et de fiabilité, en utilisant DVFS et la technique de duplication sur les plates-formes MPSoC.Ensuite, dans une étude suivante, avec le même objectif d'optimisation, nous modélisons les applications de streaming sous forme de graphes série-parallèle, plus complexes que de simples chaînes et plus réalistes. La plate-forme cible dispose d'un système de communication hiérarchique à deux niveaux, ce qui est courant dans les systèmes embarqués et les plates-formes informatiques hautes performances. La fiabilité est garantie par l'exécution des tâches à la vitesse maximale ou par la triplication des tâches. Plusieurs heuristiques efficaces sont proposées pour résoudre ce problème d'optimisation NP-complet