Hardware Design

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Ian Justin Oliver - One of the best experts on this subject based on the ideXlab platform.

  • A UML profile for asynchronous Hardware Design
    Lecture Notes in Computer Science, 2006
    Co-Authors: Kim Sandström, Ian Justin Oliver
    Abstract:

    In this work we present UML for Hardware Design (UML-HD), a UML profile suitable for Asynchronous Hardware Design and an approach for automatically generating a Hardware Description Language (HDL) model from UML-HD models. A UML-HD model comprises solely class diagrams and an action language. We use stereotypes in two categories -structure and activity - to categorise classes. Structure type stereotypes signify state and activity type signify transitions. The approach is largely inspired by Petri nets. Several model transformations are suggested in this paper, but only code generation to Haste was implemented.

  • SAMOS - A UML profile for asynchronous Hardware Design
    Lecture Notes in Computer Science, 2006
    Co-Authors: Kim Sandström, Ian Justin Oliver
    Abstract:

    In this work we present UML for Hardware Design (UML-HD), a UML profile suitable for Asynchronous Hardware Design and an approach for automatically generating a Hardware Description Language (HDL) model from UML-HD models. A UML-HD model comprises solely class diagrams and an action language. We use stereotypes in two categories – structure and activity – to categorise classes. Structure type stereotypes signify state and activity type signify transitions. The approach is largely inspired by Petri nets. Several model transformations are suggested in this paper, but only code generation to Haste was implemented.

Kim Sandström - One of the best experts on this subject based on the ideXlab platform.

  • A UML profile for asynchronous Hardware Design
    Lecture Notes in Computer Science, 2006
    Co-Authors: Kim Sandström, Ian Justin Oliver
    Abstract:

    In this work we present UML for Hardware Design (UML-HD), a UML profile suitable for Asynchronous Hardware Design and an approach for automatically generating a Hardware Description Language (HDL) model from UML-HD models. A UML-HD model comprises solely class diagrams and an action language. We use stereotypes in two categories -structure and activity - to categorise classes. Structure type stereotypes signify state and activity type signify transitions. The approach is largely inspired by Petri nets. Several model transformations are suggested in this paper, but only code generation to Haste was implemented.

  • SAMOS - A UML profile for asynchronous Hardware Design
    Lecture Notes in Computer Science, 2006
    Co-Authors: Kim Sandström, Ian Justin Oliver
    Abstract:

    In this work we present UML for Hardware Design (UML-HD), a UML profile suitable for Asynchronous Hardware Design and an approach for automatically generating a Hardware Description Language (HDL) model from UML-HD models. A UML-HD model comprises solely class diagrams and an action language. We use stereotypes in two categories – structure and activity – to categorise classes. Structure type stereotypes signify state and activity type signify transitions. The approach is largely inspired by Petri nets. Several model transformations are suggested in this paper, but only code generation to Haste was implemented.

Steven Derrien - One of the best experts on this subject based on the ideXlab platform.

  • GeCoS: A framework for prototyping custom Hardware Design flows
    2013
    Co-Authors: Antoine Floch, Maxime Naullet, Ludovic L'hours, Tomofumi Yuki, Ali Moussawi, Mythri Alle, Antoine Morvan, Kevin St. Martin, Nicolas Simon, Steven Derrien
    Abstract:

    GeCoS is an open source framework that provide a highly productive environment for Hardware Design. GeCoS primarily targets custom Hardware Design using High Level Synthesis, distinguishing itself from classical compiler infrastructures. Compiling for custom Hardware makes use of domain specific semantics that are not considered by general purpose compilers. Finding the right balance between various performance criteria, such as area, speed, and accuracy, is the goal, contrary to the typical goal in high performance context to maximize speed. The GeCoS infrastructure facilitates the prototyping of Hardware Design flows, going beyond compiler analyses and transformations. Hardware Designers must interact with the compiler for Design space exploration, and it is important to be able to give instant feedback to the users.

  • SCAM - GeCoS: A framework for prototyping custom Hardware Design flows
    2013 IEEE 13th International Working Conference on Source Code Analysis and Manipulation (SCAM), 2013
    Co-Authors: Antoine Floch, Maxime Naullet, Ludovic L'hours, Tomofumi Yuki, Ali Moussawi, Mythri Alle, Antoine Morvan, Kevin St. Martin, Nicolas Simon, Steven Derrien
    Abstract:

    GeCoS is an open source framework that provide a highly productive environment for Hardware Design. GeCoS primarily targets custom Hardware Design using High Level Synthesis, distinguishing itself from classical compiler infrastructures. Compiling for custom Hardware makes use of domain specific semantics that are not considered by general purpose compilers. Finding the right balance between various performance criteria, such as area, speed, and accuracy, is the goal, contrary to the typical goal in high performance context to maximize speed. The GeCoS infrastructure facilitates the prototyping of Hardware Design flows, going beyond compiler analyses and transformations. Hardware Designers must interact with the compiler for Design space exploration, and it is important to be able to give instant feedback to the users.

Shigeru Kokaji - One of the best experts on this subject based on the ideXlab platform.

  • Hardware Design of modular robotic system
    Proceedings. 2000 IEEE RSJ International Conference on Intelligent Robots and Systems (IROS 2000) (Cat. No.00CH37113), 2000
    Co-Authors: Satoshi Murata, Akiya Kamimura, Kohji Tomita, Eiichi Yoshida, Haruhisa Kurokawa, Shigeru Kokaji
    Abstract:

    In this paper we describe the Hardware Design of a novel self-reconfigurable robotic system. We have classified previous studies on self-reconfigurable robotic systems into "lattice type" composed of spatially symmetric modules and "string type" like snake robots. The proposed system has both the advantages of simple operation of self-reconfiguration of the former and motion generation ability of the latter. Its simple structure and reliable operation allows us to construct large 3D self-reconfigurable structure which functions as a robotic system such as a legged walking machine. We have examined its basic mechanical functions and verified its reliable operation of self-reconfiguration.

Feng Yan - One of the best experts on this subject based on the ideXlab platform.