The Experts below are selected from a list of 1503 Experts worldwide ranked by ideXlab platform
Jérémie Crenne - One of the best experts on this subject based on the ideXlab platform.
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Lightweight reconfiguration security services for AXI-based MPSoCs
2012Co-Authors: Pascal Cotret, Guy Gogniat, Jean-philippe Diguet, Jérémie CrenneAbstract:Nowadays, security is a key constraint in MPSoC development as many critical and secret information can be stored and manipulated within these systems. Addressing the protection issue in an efficient way is challenging as information can leak from many points. However one strategic component of a bus-based MPSoC is the communication architecture as all information that an attacker could try to extract or modify would be visible on the bus. Thus monitoring and controlling communications allows an efficient protection of the whole system. Attacks can be detected and discarded before system corruption. In this work, we propose a lightweight solution to dynamically update Hardware Firewall enhancements which secure data exchanges in a bus-based MPSoC. It provides a standalone security solution for AXI-based embedded systems where no user intervention is required for security mechanisms update. An FPGA implementation demonstrates an area overhead of around 11% for the adaptive version of the Hardware Firewall compared to the static one.
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FPL - Lightweight reconfiguration security services for AXI-based MPSoCs
22nd International Conference on Field Programmable Logic and Applications (FPL), 2012Co-Authors: Pascal Cotret, Guy Gogniat, Jean-philippe Diguet, Jérémie CrenneAbstract:Nowadays, security is a key constraint in MPSoC development as many critical and secret information can be stored and manipulated within these systems. Addressing the protection issue in an efficient way is challenging as information can leak from many points. However one strategic component of a bus-based MPSoC is the communication architecture as all information that an attacker could try to extract or modify would be visible on the bus. Thus monitoring and controlling communications allows an efficient protection of the whole system. Attacks can be detected and discarded before system corruption. In this work, we propose a lightweight solution to dynamically update Hardware Firewall enhancements which secure data exchanges in a bus-based MPSoC. It provides a standalone security solution for AXI-based embedded systems where no user intervention is required for security mechanisms update. An FPGA implementation demonstrates an area overhead of around 11% for the adaptive version of the Hardware Firewall compared to the static one.
Pascal Cotret - One of the best experts on this subject based on the ideXlab platform.
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Lightweight reconfiguration security services for AXI-based MPSoCs
2012Co-Authors: Pascal Cotret, Guy Gogniat, Jean-philippe Diguet, Jérémie CrenneAbstract:Nowadays, security is a key constraint in MPSoC development as many critical and secret information can be stored and manipulated within these systems. Addressing the protection issue in an efficient way is challenging as information can leak from many points. However one strategic component of a bus-based MPSoC is the communication architecture as all information that an attacker could try to extract or modify would be visible on the bus. Thus monitoring and controlling communications allows an efficient protection of the whole system. Attacks can be detected and discarded before system corruption. In this work, we propose a lightweight solution to dynamically update Hardware Firewall enhancements which secure data exchanges in a bus-based MPSoC. It provides a standalone security solution for AXI-based embedded systems where no user intervention is required for security mechanisms update. An FPGA implementation demonstrates an area overhead of around 11% for the adaptive version of the Hardware Firewall compared to the static one.
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FPL - Lightweight reconfiguration security services for AXI-based MPSoCs
22nd International Conference on Field Programmable Logic and Applications (FPL), 2012Co-Authors: Pascal Cotret, Guy Gogniat, Jean-philippe Diguet, Jérémie CrenneAbstract:Nowadays, security is a key constraint in MPSoC development as many critical and secret information can be stored and manipulated within these systems. Addressing the protection issue in an efficient way is challenging as information can leak from many points. However one strategic component of a bus-based MPSoC is the communication architecture as all information that an attacker could try to extract or modify would be visible on the bus. Thus monitoring and controlling communications allows an efficient protection of the whole system. Attacks can be detected and discarded before system corruption. In this work, we propose a lightweight solution to dynamically update Hardware Firewall enhancements which secure data exchanges in a bus-based MPSoC. It provides a standalone security solution for AXI-based embedded systems where no user intervention is required for security mechanisms update. An FPGA implementation demonstrates an area overhead of around 11% for the adaptive version of the Hardware Firewall compared to the static one.
Guy Gogniat - One of the best experts on this subject based on the ideXlab platform.
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Lightweight reconfiguration security services for AXI-based MPSoCs
2012Co-Authors: Pascal Cotret, Guy Gogniat, Jean-philippe Diguet, Jérémie CrenneAbstract:Nowadays, security is a key constraint in MPSoC development as many critical and secret information can be stored and manipulated within these systems. Addressing the protection issue in an efficient way is challenging as information can leak from many points. However one strategic component of a bus-based MPSoC is the communication architecture as all information that an attacker could try to extract or modify would be visible on the bus. Thus monitoring and controlling communications allows an efficient protection of the whole system. Attacks can be detected and discarded before system corruption. In this work, we propose a lightweight solution to dynamically update Hardware Firewall enhancements which secure data exchanges in a bus-based MPSoC. It provides a standalone security solution for AXI-based embedded systems where no user intervention is required for security mechanisms update. An FPGA implementation demonstrates an area overhead of around 11% for the adaptive version of the Hardware Firewall compared to the static one.
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FPL - Lightweight reconfiguration security services for AXI-based MPSoCs
22nd International Conference on Field Programmable Logic and Applications (FPL), 2012Co-Authors: Pascal Cotret, Guy Gogniat, Jean-philippe Diguet, Jérémie CrenneAbstract:Nowadays, security is a key constraint in MPSoC development as many critical and secret information can be stored and manipulated within these systems. Addressing the protection issue in an efficient way is challenging as information can leak from many points. However one strategic component of a bus-based MPSoC is the communication architecture as all information that an attacker could try to extract or modify would be visible on the bus. Thus monitoring and controlling communications allows an efficient protection of the whole system. Attacks can be detected and discarded before system corruption. In this work, we propose a lightweight solution to dynamically update Hardware Firewall enhancements which secure data exchanges in a bus-based MPSoC. It provides a standalone security solution for AXI-based embedded systems where no user intervention is required for security mechanisms update. An FPGA implementation demonstrates an area overhead of around 11% for the adaptive version of the Hardware Firewall compared to the static one.
Jean-philippe Diguet - One of the best experts on this subject based on the ideXlab platform.
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Lightweight reconfiguration security services for AXI-based MPSoCs
2012Co-Authors: Pascal Cotret, Guy Gogniat, Jean-philippe Diguet, Jérémie CrenneAbstract:Nowadays, security is a key constraint in MPSoC development as many critical and secret information can be stored and manipulated within these systems. Addressing the protection issue in an efficient way is challenging as information can leak from many points. However one strategic component of a bus-based MPSoC is the communication architecture as all information that an attacker could try to extract or modify would be visible on the bus. Thus monitoring and controlling communications allows an efficient protection of the whole system. Attacks can be detected and discarded before system corruption. In this work, we propose a lightweight solution to dynamically update Hardware Firewall enhancements which secure data exchanges in a bus-based MPSoC. It provides a standalone security solution for AXI-based embedded systems where no user intervention is required for security mechanisms update. An FPGA implementation demonstrates an area overhead of around 11% for the adaptive version of the Hardware Firewall compared to the static one.
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FPL - Lightweight reconfiguration security services for AXI-based MPSoCs
22nd International Conference on Field Programmable Logic and Applications (FPL), 2012Co-Authors: Pascal Cotret, Guy Gogniat, Jean-philippe Diguet, Jérémie CrenneAbstract:Nowadays, security is a key constraint in MPSoC development as many critical and secret information can be stored and manipulated within these systems. Addressing the protection issue in an efficient way is challenging as information can leak from many points. However one strategic component of a bus-based MPSoC is the communication architecture as all information that an attacker could try to extract or modify would be visible on the bus. Thus monitoring and controlling communications allows an efficient protection of the whole system. Attacks can be detected and discarded before system corruption. In this work, we propose a lightweight solution to dynamically update Hardware Firewall enhancements which secure data exchanges in a bus-based MPSoC. It provides a standalone security solution for AXI-based embedded systems where no user intervention is required for security mechanisms update. An FPGA implementation demonstrates an area overhead of around 11% for the adaptive version of the Hardware Firewall compared to the static one.
Hong Peilin - One of the best experts on this subject based on the ideXlab platform.
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Design for Firewall Based on Network Processor and Its Implementation of NAT Function
Computer Engineering, 2005Co-Authors: Hong PeilinAbstract:Using network processor to develop next-generation network devices will not only ensure performance of products, but also accelerate time-to-market of products, and products can be easily upgraded in software. This paper describes the design for a 1000Mb Hardware Firewall based on the Intel IXP1200 network processor, and the implementation of network address transition (NAT) function in detail.
