The Experts below are selected from a list of 4746 Experts worldwide ranked by ideXlab platform
Bryant Wysocki - One of the best experts on this subject based on the ideXlab platform.
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ICCAD - A write-time based memristive PUF for Hardware Security applications
2013 IEEE ACM International Conference on Computer-Aided Design (ICCAD), 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we describe a novel memristive PUF (M-PUF) architecture that utilizes variations in the write-time of a memristor as an entropy source. The results presented show strong statistical performance for the M-PUF in terms of uniqueness, uniformity, and bit-aliasing. Additionally, nanoscale M-PUFs are shown to exhibit reduced area utilization as compared to CMOS counterparts.
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ASP-DAC - Hardware Security strategies exploiting nanoelectronic circuits
2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Jeyavijayan Rajendran, Miodrag Potkonjak, Ramesh Karri, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we provide an overview of memristor based PUF structures and circuits that illustrate the potential for nanoelectronic Hardware Security solutions.
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Hardware Security strategies exploiting nanoelectronic circuits
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Jeyavijayan Rajendran, Miodrag Potkonjak, Ramesh Karri, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we provide an overview of memristor based PUF structures and circuits that illustrate the potential for nanoelectronic Hardware Security solutions.
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A write-time based memristive PUF for Hardware Security applications
2013 IEEE ACM International Conference on Computer-Aided Design (ICCAD), 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we describe a novel memristive PUF (M-PUF) architecture that utilizes variations in the write-time of a memristor as an entropy source. The results presented show strong statistical performance for the M-PUF in terms of uniqueness, uniformity, and bit-aliasing. Additionally, nanoscale M-PUFs are shown to exhibit reduced area utilization as compared to CMOS counterparts.
Garrett S. Rose - One of the best experts on this subject based on the ideXlab platform.
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A Designer's Rationale for Nanoelectronic Hardware Security Primitives
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016Co-Authors: Garrett S. Rose, Mesbah Uddin, Md. Badruddoja MajumderAbstract:A variety of Hardware Security primitives have been developed in recent years, aimed at mitigating issues such as integrated circuit (IC) piracy, counterfeiting, and side-channel analysis. For example, a popular Security primitive for mitigating such Hardware Security vulnerabilities is the physical unclonable function (PUF) which provides Hardware specific unique identification based on intrinsic process variations in individual integrated circuit implementations. At the same time, as technology scaling progresses further into the nanometer region, emerging nanoelectronic technologies are becoming viable options for many next-generation computing technologies. At the intersection between nanoelectronics and Security, several examples of nano-enabled Security primitives have been proposed in the last few years. In this paper, we consider a few examples of nanoelectronic Security in the context of how such nanoscale technologies impact power, area and delay as compared to conventional CMOS-based approaches. Our analyses show that leveraging novel nanoelectronic technologies not only provide area benefits but also energy-efficient solutions that enable Security with a small footprint.
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ISVLSI - A Designer's Rationale for Nanoelectronic Hardware Security Primitives
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016Co-Authors: Garrett S. Rose, Mesbah Uddin, Badruddoja MajumderAbstract:A variety of Hardware Security primitives have been developed in recent years, aimed at mitigating issues such as integrated circuit (IC) piracy, counterfeiting, and side-channel analysis. For example, a popular Security primitive for mitigating such Hardware Security vulnerabilities is the physical unclonable function (PUF) which provides Hardware specific unique identification based on intrinsic process variations in individual integrated circuit implementations. At the same time, as technology scaling progresses further into the nanometer region, emerging nanoelectronic technologies are becoming viable options for many next-generation computing technologies. At the intersection between nanoelectronics and Security, several examples of nano-enabled Security primitives have been proposed in the last few years. In this paper, we consider a few examples of nanoelectronic Security in the context of how such nanoscale technologies impact power, area and delay as compared to conventional CMOS-based approaches. Our analyses show that leveraging novel nanoelectronic technologies not only provide area benefits but also energy-efficient solutions that enable Security with a small footprint.
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ICCAD - A write-time based memristive PUF for Hardware Security applications
2013 IEEE ACM International Conference on Computer-Aided Design (ICCAD), 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we describe a novel memristive PUF (M-PUF) architecture that utilizes variations in the write-time of a memristor as an entropy source. The results presented show strong statistical performance for the M-PUF in terms of uniqueness, uniformity, and bit-aliasing. Additionally, nanoscale M-PUFs are shown to exhibit reduced area utilization as compared to CMOS counterparts.
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ASP-DAC - Hardware Security strategies exploiting nanoelectronic circuits
2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Jeyavijayan Rajendran, Miodrag Potkonjak, Ramesh Karri, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we provide an overview of memristor based PUF structures and circuits that illustrate the potential for nanoelectronic Hardware Security solutions.
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Hardware Security strategies exploiting nanoelectronic circuits
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Jeyavijayan Rajendran, Miodrag Potkonjak, Ramesh Karri, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we provide an overview of memristor based PUF structures and circuits that illustrate the potential for nanoelectronic Hardware Security solutions.
Hai Helen Li - One of the best experts on this subject based on the ideXlab platform.
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FPL - A Hardware Security scheme for RRAM-based FPGA
2013 23rd International Conference on Field programmable Logic and Applications, 2013Co-Authors: Yi-chung Chen, Wei Zhang, Hai Helen LiAbstract:To enhance the system integrity of FPGA-based embedded systems on Hardware design, we propose a Hardware Security scheme for nonvolatile resistive random access memory (RRAM) based FPGA, in which internal block RAM (BRAMs) are used for configuration and temporary data storage. The proposed scheme loads obfuscated configurations into nonvolatile BRAMs to protect design data from physical attacks and utilizes Chip DNA to enable logic function.
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A Hardware Security scheme for RRAM-based FPGA
2013 23rd International Conference on Field programmable Logic and Applications, 2013Co-Authors: Yi-chung Chen, Wei Zhang, Hai Helen LiAbstract:To enhance the system integrity of FPGA-based embedded systems on Hardware design, we propose a Hardware Security scheme for nonvolatile resistive random access memory (RRAM) based FPGA, in which internal block RAM (BRAMs) are used for configuration and temporary data storage. The proposed scheme loads obfuscated configurations into nonvolatile BRAMs to protect design data from physical attacks and utilizes Chip DNA to enable logic function.
David Wheeler - One of the best experts on this subject based on the ideXlab platform.
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Hardware Security risk assessment: A case study
2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2016Co-Authors: Brent Sherman, David WheelerAbstract:The Security demands on development teams are growing in direct proportion to the Security incidents discovered and leveraged in computer crime and cyber warfare every day. There is ongoing research to increase the effectiveness of Security defect detection and penetration testing of products, but where the literature is thin, is in actual case studies that apply Security assurance processes in a large-scale Hardware-centric environment. This paper adds to the literature by providing an actual case study of Hardware Security assurance practices using a sample size of 151 projects. Furthermore, it documents and analyzes the efficacy of deploying selective automation using quantitative weighted risk ratings of the Security Development Lifecycle (SDL) to Hardware projects, including strategic reuse of existing SDL collaterals for derivative projects. The evaluated methodology provided acceptable accuracy and labor savings, but the results indicate that automation focusing on assignment of a quantitative risk scoring introduces a dilution of real Security concerns; instead, an approach using qualitative analysis and assignment of Security assurance tasks is more beneficial.
Nathan Mcdonald - One of the best experts on this subject based on the ideXlab platform.
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ICCAD - A write-time based memristive PUF for Hardware Security applications
2013 IEEE ACM International Conference on Computer-Aided Design (ICCAD), 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we describe a novel memristive PUF (M-PUF) architecture that utilizes variations in the write-time of a memristor as an entropy source. The results presented show strong statistical performance for the M-PUF in terms of uniqueness, uniformity, and bit-aliasing. Additionally, nanoscale M-PUFs are shown to exhibit reduced area utilization as compared to CMOS counterparts.
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ASP-DAC - Hardware Security strategies exploiting nanoelectronic circuits
2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Jeyavijayan Rajendran, Miodrag Potkonjak, Ramesh Karri, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we provide an overview of memristor based PUF structures and circuits that illustrate the potential for nanoelectronic Hardware Security solutions.
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Hardware Security strategies exploiting nanoelectronic circuits
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Jeyavijayan Rajendran, Miodrag Potkonjak, Ramesh Karri, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we provide an overview of memristor based PUF structures and circuits that illustrate the potential for nanoelectronic Hardware Security solutions.
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A write-time based memristive PUF for Hardware Security applications
2013 IEEE ACM International Conference on Computer-Aided Design (ICCAD), 2013Co-Authors: Garrett S. Rose, Nathan Mcdonald, Bryant WysockiAbstract:Hardware Security has emerged as an important field of study aimed at mitigating issues such as piracy, counterfeiting, and side channel attacks. One popular solution for such Hardware Security attacks are physical unclonable functions (PUF) which provide a Hardware specific unique signature or identification. The uniqueness of a PUF depends on intrinsic process variations within individual integrated circuits. As process variations become more prevalent due to technology scaling into the nanometer regime, novel nanoelectronic technologies such as memristors become viable options for improved Security in emerging integrated circuits. In this paper, we describe a novel memristive PUF (M-PUF) architecture that utilizes variations in the write-time of a memristor as an entropy source. The results presented show strong statistical performance for the M-PUF in terms of uniqueness, uniformity, and bit-aliasing. Additionally, nanoscale M-PUFs are shown to exhibit reduced area utilization as compared to CMOS counterparts.
