Hash Algorithm

14,000,000 Leading Edge Experts on the ideXlab platform

Scan Science and Technology

Contact Leading Edge Experts & Companies

Scan Science and Technology

Contact Leading Edge Experts & Companies

The Experts below are selected from a list of 360 Experts worldwide ranked by ideXlab platform

Y U Guohua - One of the best experts on this subject based on the ideXlab platform.

M. Samet - One of the best experts on this subject based on the ideXlab platform.

  • A novel chaos-based image encryption using DNA sequence operation and Secure Hash Algorithm SHA-2
    Nonlinear Dynamics, 2016
    Co-Authors: Ramzi Guesmi, Abdennaceur Kachouri, M. A. B. Farah, M. Samet
    Abstract:

    In this paper, we propose a novel image encryption Algorithm based on a hybrid model of deoxyribonucleic acid (DNA) masking, a Secure Hash Algorithm SHA-2 and the Lorenz system. Our study uses DNA sequences and operations and the chaotic Lorenz system to strengthen the cryptosystem. The significant advantages of this approach are improving the information entropy which is the most important feature of randomness, resisting against various typical attacks and getting good experimental results. The theoretical analysis and experimental results show that the Algorithm improves the encoding efficiency, enhances the security of the ciphertext and has a large key space and a high key sensitivity, and it is able to resist against the statistical and exhaustive attacks.

Arshad Aziz - One of the best experts on this subject based on the ideXlab platform.

  • software implementation of standard Hash Algorithm sha 3 keccak on intel core i5 and cavium networks octeon plus embedded platform
    Mediterranean Conference on Embedded Computing, 2013
    Co-Authors: Aisha Malik, Arshad Aziz, Dureeshahwar Kundi, Moiz Akhter
    Abstract:

    Keccak is the new Standard Hash Algorithm (SHA-3) to complement the existing Hash standard SHA-2. The Hash function has been selected after five years of tough competition and continuous evaluation in various aspects. Apart from security, performance evaluation of Hash function is of significant importance and has been the key criteria in its selection. In this paper, we present a software implementation of Keccak - 512 on two unexplored platforms - Intel core-i5 and Cavium Networks Octeon embedded platform. The main contribution of the paper is the benchmarking of our code on the former platform and its comparison with benchmarking results of other Keccak implementations. Comparisons reveal significant improvement in performance metrics of cycles/byte and bandwidth.

  • efficient fpga implementation of secure Hash Algorithm grostl sha 3 finalist
    International Multi-Topic Conference, 2012
    Co-Authors: Muzaffar Rao, Arshad Aziz, Kashif Latif, Athar Mahboob
    Abstract:

    Cryptographic Hash functions are used for digital signatures; message authentication codes (MACs) and other forms of authentication. National Institute of Standards and Technology (NIST) announced a publicly open competition for selection of new standard Secure Hash Algorithm called SHA-3. Hardware performance evaluation of the candidates of this competition is a vital part of this contest. In this work we present an efficient FPGA implementation of Grostl, one of the final round candidates of SHA-3. We show our results in the form of chip area consumption, throughput and throughput per area. We compare and contrast these results with other reported implementations of Grostl. Our design ranks highest in terms of throughput per area, achieving figures of 5.47 Mbps/slice on Virtex 7 and 5.12 Mbps/slice for Grostl-256 on Virtex 6.

  • efficient hardware implementation of secure Hash Algorithm sha 3 finalist skein
    ICFCE, 2012
    Co-Authors: Kashif Latif, Arshad Aziz, Muhammad Tariq, Athar Mahboob
    Abstract:

    Cryptographic Hash functions are widely used in many information security applications like digital signatures, message authentication codes (MACs), and other forms of authentication. In response to recent advances in cryptanalysis of commonly used Hash Algorithms, NIST USA announced a publicly open competition for selection of new standard Secure Hash Algorithm called SHA-3. One important aspect of this competition is evaluation of hardware implementations of the candidates. Skein is one of the 5 candidates that have been promoted to final round of the competition. In this paper we present an efficient hardware implementation of Skein-256 Algorithm and compare our results with other published hardware implementations of Skein. This work serves as performance investigation of hardware implementation of Skein on modern FPGAs.

  • high throughput hardware implementation of secure Hash Algorithm sha 3 finalist blake
    Frontiers of Information Technology, 2011
    Co-Authors: Kashif Latif, Athar Mahboob, Arshad Aziz
    Abstract:

    Cryptographic Hash functions are at heart of many information security applications like digital signatures, message authentication codes (MACs), and other forms of authentication. In consequence of recent innovations in cryptanalysis of commonly used Hash Algorithms, NIST USA announced a publicly open competition for selection of new standard Secure Hash Algorithm called SHA-3. An essential part of this contest is hardware performance evaluation of the candidates. In this work we present a high throughput efficient hardware implementation of one of the final round candidate of SHA-3: BLAKE. We implemented and investigated the performance of BLAKE on latest Xilinx FPGAs. We show our results in form of chip area consumption, throughput and throughput per area. We compare and contrasted these results with most recently reported implementations of BLAKE. Our design ranked highest in terms of speed, achieving throughputs of 2.47Gbps on Virtex 7 and 2.28Gbps on Virtex 5.

Jorma Skytta - One of the best experts on this subject based on the ideXlab platform.

  • hardware implementation analysis of the md5 Hash Algorithm
    Hawaii International Conference on System Sciences, 2005
    Co-Authors: Kimmo Jarvinen, Matti Tommiska, Jorma Skytta
    Abstract:

    Hardware implementation aspects of the MD5 Hash Algorithm are discussed in this paper. A general architecture for MD5 is proposed and several implementations are presented. An extensive study of effects of pipelining on delay, area requirements and throughput is performed, and finally certain architectures are recommended and compared to other published MD5 designs. The designs were implemented on a Xilinx Virtex-II XC2V4000-6 FPGA and a throughput of 586 Mbps was achieved with logic requirements of only 647 slices and 2 BlockRAMs. Methods to increase the throughput to gigabit-level were also studied and an implementation of parallel MD5 blocks achieving a throughput of over 5.8 Gbps was introduced. At least to the authors' knowledge, MD5 designs presented in this paper are the fastest published FPGA-based architectures at the time of writing.

Ramzi Guesmi - One of the best experts on this subject based on the ideXlab platform.

  • A novel chaos-based image encryption using DNA sequence operation and Secure Hash Algorithm SHA-2
    Nonlinear Dynamics, 2016
    Co-Authors: Ramzi Guesmi, Abdennaceur Kachouri, M. A. B. Farah, M. Samet
    Abstract:

    In this paper, we propose a novel image encryption Algorithm based on a hybrid model of deoxyribonucleic acid (DNA) masking, a Secure Hash Algorithm SHA-2 and the Lorenz system. Our study uses DNA sequences and operations and the chaotic Lorenz system to strengthen the cryptosystem. The significant advantages of this approach are improving the information entropy which is the most important feature of randomness, resisting against various typical attacks and getting good experimental results. The theoretical analysis and experimental results show that the Algorithm improves the encoding efficiency, enhances the security of the ciphertext and has a large key space and a high key sensitivity, and it is able to resist against the statistical and exhaustive attacks.