The Experts below are selected from a list of 33 Experts worldwide ranked by ideXlab platform

Emmanouil Kalligeros - One of the best experts on this subject based on the ideXlab platform.

  • ICECS - Optimization and hardware implementation of image watermarking for low cost applications
    2017 24th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2017
    Co-Authors: Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros
    Abstract:

    In many resource/power constrained applications (e.g., in wireless-network nodes) there is a need for low cost hardware implementations of digital image watermarking techniques. However, to end up with such an implementation, a proper selection of a watermarking technique, based on performance and cost criteria, is not enough. For that reason, in this paper we introduce computation optimizations of the implemented algorithm to keep the Integer Portion of arithmetic operations at optimal size, and, hence, arithmetic units as small as possible. Additionally, the proposed architecture reutilizes those units in different computation steps, to further reduce implementation cost. The proposed design compares favorably with the already existing implementations, in terms of area, power and performance.

  • Optimization and hardware implementation of image watermarking for low cost applications
    2017 24th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2017
    Co-Authors: Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros
    Abstract:

    In many resource/power constrained applications (e.g., in wireless-network nodes) there is a need for low cost hardware implementations of digital image watermarking techniques. However, to end up with such an implementation, a proper selection of a watermarking technique, based on performance and cost criteria, is not enough. For that reason, in this paper we introduce computation optimizations of the implemented algorithm to keep the Integer Portion of arithmetic operations at optimal size, and, hence, arithmetic units as small as possible. Additionally, the proposed architecture reutilizes those units in different computation steps, to further reduce implementation cost. The proposed design compares favorably with the already existing implementations, in terms of area, power and performance.

Konstantinos Pexaras - One of the best experts on this subject based on the ideXlab platform.

  • ICECS - Optimization and hardware implementation of image watermarking for low cost applications
    2017 24th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2017
    Co-Authors: Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros
    Abstract:

    In many resource/power constrained applications (e.g., in wireless-network nodes) there is a need for low cost hardware implementations of digital image watermarking techniques. However, to end up with such an implementation, a proper selection of a watermarking technique, based on performance and cost criteria, is not enough. For that reason, in this paper we introduce computation optimizations of the implemented algorithm to keep the Integer Portion of arithmetic operations at optimal size, and, hence, arithmetic units as small as possible. Additionally, the proposed architecture reutilizes those units in different computation steps, to further reduce implementation cost. The proposed design compares favorably with the already existing implementations, in terms of area, power and performance.

  • Optimization and hardware implementation of image watermarking for low cost applications
    2017 24th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2017
    Co-Authors: Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros
    Abstract:

    In many resource/power constrained applications (e.g., in wireless-network nodes) there is a need for low cost hardware implementations of digital image watermarking techniques. However, to end up with such an implementation, a proper selection of a watermarking technique, based on performance and cost criteria, is not enough. For that reason, in this paper we introduce computation optimizations of the implemented algorithm to keep the Integer Portion of arithmetic operations at optimal size, and, hence, arithmetic units as small as possible. Additionally, the proposed architecture reutilizes those units in different computation steps, to further reduce implementation cost. The proposed design compares favorably with the already existing implementations, in terms of area, power and performance.

Fu-pen Chiang - One of the best experts on this subject based on the ideXlab platform.

  • Photoelastic method to quantitatively visualise the evolution of whole-field stress in 3D printed models subject to continuous loading processes
    Optics and Lasers in Engineering, 2018
    Co-Authors: Yang Ju, Zhangyu Ren, Lingtao Mao, Li Wang, Fu-pen Chiang
    Abstract:

    The combination of three-dimensional (3D) printing techniques and photoelastic testing is a promising way to quantitatively determine the continuous whole-field stress distributions in solids that are characterized by complex structures. However, photoelastic testing produces wrapped isoclinic and isochromatic phase maps, and unwrapping these maps has always been a significant challenge. To realize the visualization and transparentization of the stress fields in complex structures, we report a new approach to quantify the continuous evolution of the whole-field stress in photosensitive material that is applicable to the fabrication of complex structures using 3D printing technology. The stress fringe orders are determined by analyzing a series of continuous frames extracted from a video recording of the fringe changes over the entire loading process. The Integer Portion of the fringe orders at a specific point on the model can be determined by counting the valleys of the light intensity change curve over the whole loading process, and the fractional Portion can be calculated based on the cosine function between the light intensity and retardation. This method allows the fringe orders to be determined from the video itself, which significantly improves characterization accuracy and simplifies the experimental operation over the entire processes. To validate the proposed method, we compare the results of the theoretical calculations to those of experiments based on the diametric compression of a circular disc prepared by a 3D printer with photosensitive resin. The results indicate that the method can accurately determine the stress fringe order, except for points where the deformation is too large to differentiate the fringes pertaining to photoplasticity.

Christos Tsiourakis - One of the best experts on this subject based on the ideXlab platform.

  • ICECS - Optimization and hardware implementation of image watermarking for low cost applications
    2017 24th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2017
    Co-Authors: Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros
    Abstract:

    In many resource/power constrained applications (e.g., in wireless-network nodes) there is a need for low cost hardware implementations of digital image watermarking techniques. However, to end up with such an implementation, a proper selection of a watermarking technique, based on performance and cost criteria, is not enough. For that reason, in this paper we introduce computation optimizations of the implemented algorithm to keep the Integer Portion of arithmetic operations at optimal size, and, hence, arithmetic units as small as possible. Additionally, the proposed architecture reutilizes those units in different computation steps, to further reduce implementation cost. The proposed design compares favorably with the already existing implementations, in terms of area, power and performance.

  • Optimization and hardware implementation of image watermarking for low cost applications
    2017 24th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2017
    Co-Authors: Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros
    Abstract:

    In many resource/power constrained applications (e.g., in wireless-network nodes) there is a need for low cost hardware implementations of digital image watermarking techniques. However, to end up with such an implementation, a proper selection of a watermarking technique, based on performance and cost criteria, is not enough. For that reason, in this paper we introduce computation optimizations of the implemented algorithm to keep the Integer Portion of arithmetic operations at optimal size, and, hence, arithmetic units as small as possible. Additionally, the proposed architecture reutilizes those units in different computation steps, to further reduce implementation cost. The proposed design compares favorably with the already existing implementations, in terms of area, power and performance.

Irene G. Karybali - One of the best experts on this subject based on the ideXlab platform.

  • ICECS - Optimization and hardware implementation of image watermarking for low cost applications
    2017 24th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2017
    Co-Authors: Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros
    Abstract:

    In many resource/power constrained applications (e.g., in wireless-network nodes) there is a need for low cost hardware implementations of digital image watermarking techniques. However, to end up with such an implementation, a proper selection of a watermarking technique, based on performance and cost criteria, is not enough. For that reason, in this paper we introduce computation optimizations of the implemented algorithm to keep the Integer Portion of arithmetic operations at optimal size, and, hence, arithmetic units as small as possible. Additionally, the proposed architecture reutilizes those units in different computation steps, to further reduce implementation cost. The proposed design compares favorably with the already existing implementations, in terms of area, power and performance.

  • Optimization and hardware implementation of image watermarking for low cost applications
    2017 24th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2017
    Co-Authors: Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros
    Abstract:

    In many resource/power constrained applications (e.g., in wireless-network nodes) there is a need for low cost hardware implementations of digital image watermarking techniques. However, to end up with such an implementation, a proper selection of a watermarking technique, based on performance and cost criteria, is not enough. For that reason, in this paper we introduce computation optimizations of the implemented algorithm to keep the Integer Portion of arithmetic operations at optimal size, and, hence, arithmetic units as small as possible. Additionally, the proposed architecture reutilizes those units in different computation steps, to further reduce implementation cost. The proposed design compares favorably with the already existing implementations, in terms of area, power and performance.