The Experts below are selected from a list of 72 Experts worldwide ranked by ideXlab platform
Fahim Arif - One of the best experts on this subject based on the ideXlab platform.
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formal verification of time constrains sysml Internal Block Diagram using prism
International Conference on Computational Science and Its Applications, 2015Co-Authors: Sajjad Ali, Muhammad Abdul Basiturrahim, Fahim ArifAbstract:System Modeling Language (SysML) is a standardized profile of Object Management Group (OMG) and it is used for the purpose of graphical modeling a system engineering application. The embedded system is graphically modeled using an Internal Block Diagram of SysML. For formal verification of graphical model, a methodology is proposed which maps the SysML's Internal Block Diagram to input language of PRISM model checker using CTMC (Continuous Time Markov Chain) model for developing more reliable real-time application. The functionality of the system is graphically modeled using an Internal Block Diagram of SysML that is further translated to input language of PRISM. The user requirements are specified using CSL (Continuous Stochastic Logic) which are further verified against the functionality of the system. The timed and untimed properties are presented and verified against the CTMC model. The timed properties involve continuous time as it is critical in embedded system and its verification is necessary. We demonstrate our methodology by applying it on a case study of liquid fertilizer mixing plant and the methodology presents more accurate results.
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formal verification of Internal Block Diagram of sysml for modeling real time system
Software Engineering Artificial Intelligence Networking and Parallel Distributed Computing, 2015Co-Authors: Sajjad Ali, Muhammad Abdul Basiturrahim, Fahim ArifAbstract:SysML is a graphical modeling language that is mostly used for the graphical representation of real-time systems, complex systems, safely critical systems, and embedded systems. In this paper, we present a methodology based on model checking tool for the correction and verification of SysML Internal Block Diagram with discrete time constraint. We describe the mapping of SysML Internal Block Diagram to PRISM input language and use Probabilistic Computational Tree Logic (PCTL) for the verification of properties. The methodology provides more reliable and quick results for the development of real time systems as PRISM supports parallel composition of components. Finally, we present the effectiveness of our approach with the help of a case study of real-time system. The discrete time factor is included in the case study to evaluate the performance characteristics of system functionality.
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SNPD - Formal verification of Internal Block Diagram of SysML for modeling real-time system
2015 IEEE ACIS 16th International Conference on Software Engineering Artificial Intelligence Networking and Parallel Distributed Computing (SNPD), 2015Co-Authors: Sajjad Ali, Muhammad Abdul Basit-ur-rahim, Fahim ArifAbstract:SysML is a graphical modeling language that is mostly used for the graphical representation of real-time systems, complex systems, safely critical systems, and embedded systems. In this paper, we present a methodology based on model checking tool for the correction and verification of SysML Internal Block Diagram with discrete time constraint. We describe the mapping of SysML Internal Block Diagram to PRISM input language and use Probabilistic Computational Tree Logic (PCTL) for the verification of properties. The methodology provides more reliable and quick results for the development of real time systems as PRISM supports parallel composition of components. Finally, we present the effectiveness of our approach with the help of a case study of real-time system. The discrete time factor is included in the case study to evaluate the performance characteristics of system functionality.
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ICCSA (Short Papers/poster papers/PhD student showcase works) - Formal Verification of Time Constrains SysML Internal Block Diagram Using PRISM
2015 15th International Conference on Computational Science and Its Applications, 2015Co-Authors: Sajjad Ali, Muhammad Abdul Basit-ur-rahim, Fahim ArifAbstract:System Modeling Language (SysML) is a standardized profile of Object Management Group (OMG) and it is used for the purpose of graphical modeling a system engineering application. The embedded system is graphically modeled using an Internal Block Diagram of SysML. For formal verification of graphical model, a methodology is proposed which maps the SysML's Internal Block Diagram to input language of PRISM model checker using CTMC (Continuous Time Markov Chain) model for developing more reliable real-time application. The functionality of the system is graphically modeled using an Internal Block Diagram of SysML that is further translated to input language of PRISM. The user requirements are specified using CSL (Continuous Stochastic Logic) which are further verified against the functionality of the system. The timed and untimed properties are presented and verified against the CTMC model. The timed properties involve continuous time as it is critical in embedded system and its verification is necessary. We demonstrate our methodology by applying it on a case study of liquid fertilizer mixing plant and the methodology presents more accurate results.
Sajjad Ali - One of the best experts on this subject based on the ideXlab platform.
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formal verification of time constrains sysml Internal Block Diagram using prism
International Conference on Computational Science and Its Applications, 2015Co-Authors: Sajjad Ali, Muhammad Abdul Basiturrahim, Fahim ArifAbstract:System Modeling Language (SysML) is a standardized profile of Object Management Group (OMG) and it is used for the purpose of graphical modeling a system engineering application. The embedded system is graphically modeled using an Internal Block Diagram of SysML. For formal verification of graphical model, a methodology is proposed which maps the SysML's Internal Block Diagram to input language of PRISM model checker using CTMC (Continuous Time Markov Chain) model for developing more reliable real-time application. The functionality of the system is graphically modeled using an Internal Block Diagram of SysML that is further translated to input language of PRISM. The user requirements are specified using CSL (Continuous Stochastic Logic) which are further verified against the functionality of the system. The timed and untimed properties are presented and verified against the CTMC model. The timed properties involve continuous time as it is critical in embedded system and its verification is necessary. We demonstrate our methodology by applying it on a case study of liquid fertilizer mixing plant and the methodology presents more accurate results.
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formal verification of Internal Block Diagram of sysml for modeling real time system
Software Engineering Artificial Intelligence Networking and Parallel Distributed Computing, 2015Co-Authors: Sajjad Ali, Muhammad Abdul Basiturrahim, Fahim ArifAbstract:SysML is a graphical modeling language that is mostly used for the graphical representation of real-time systems, complex systems, safely critical systems, and embedded systems. In this paper, we present a methodology based on model checking tool for the correction and verification of SysML Internal Block Diagram with discrete time constraint. We describe the mapping of SysML Internal Block Diagram to PRISM input language and use Probabilistic Computational Tree Logic (PCTL) for the verification of properties. The methodology provides more reliable and quick results for the development of real time systems as PRISM supports parallel composition of components. Finally, we present the effectiveness of our approach with the help of a case study of real-time system. The discrete time factor is included in the case study to evaluate the performance characteristics of system functionality.
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SNPD - Formal verification of Internal Block Diagram of SysML for modeling real-time system
2015 IEEE ACIS 16th International Conference on Software Engineering Artificial Intelligence Networking and Parallel Distributed Computing (SNPD), 2015Co-Authors: Sajjad Ali, Muhammad Abdul Basit-ur-rahim, Fahim ArifAbstract:SysML is a graphical modeling language that is mostly used for the graphical representation of real-time systems, complex systems, safely critical systems, and embedded systems. In this paper, we present a methodology based on model checking tool for the correction and verification of SysML Internal Block Diagram with discrete time constraint. We describe the mapping of SysML Internal Block Diagram to PRISM input language and use Probabilistic Computational Tree Logic (PCTL) for the verification of properties. The methodology provides more reliable and quick results for the development of real time systems as PRISM supports parallel composition of components. Finally, we present the effectiveness of our approach with the help of a case study of real-time system. The discrete time factor is included in the case study to evaluate the performance characteristics of system functionality.
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ICCSA (Short Papers/poster papers/PhD student showcase works) - Formal Verification of Time Constrains SysML Internal Block Diagram Using PRISM
2015 15th International Conference on Computational Science and Its Applications, 2015Co-Authors: Sajjad Ali, Muhammad Abdul Basit-ur-rahim, Fahim ArifAbstract:System Modeling Language (SysML) is a standardized profile of Object Management Group (OMG) and it is used for the purpose of graphical modeling a system engineering application. The embedded system is graphically modeled using an Internal Block Diagram of SysML. For formal verification of graphical model, a methodology is proposed which maps the SysML's Internal Block Diagram to input language of PRISM model checker using CTMC (Continuous Time Markov Chain) model for developing more reliable real-time application. The functionality of the system is graphically modeled using an Internal Block Diagram of SysML that is further translated to input language of PRISM. The user requirements are specified using CSL (Continuous Stochastic Logic) which are further verified against the functionality of the system. The timed and untimed properties are presented and verified against the CTMC model. The timed properties involve continuous time as it is critical in embedded system and its verification is necessary. We demonstrate our methodology by applying it on a case study of liquid fertilizer mixing plant and the methodology presents more accurate results.
Melo, Marcel Da Silva - One of the best experts on this subject based on the ideXlab platform.
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Transformação de modelos SysML para UML usando a linguagem ATL
Universidade Federal de Uberlândia, 2014Co-Authors: Melo, Marcel Da SilvaAbstract:Devido ao grande aumento da complexidade no desenvolvimento de software nos últimos anos, academia e organizações criaram uma solução racional na engenharia de software, chamada de Engenharia Dirigida por Modelos, que busca suportar o gerenciamento de tal complexidade. A Engenharia Dirigida por Modelos é uma abordagem que move o foco do desenvolvimento de software de código para modelos. A UML é atualmente a linguagem mais utilizada para modelagem de software. Apesar do seu uso intenso em vários domínios de aplicação, a UML apresenta deciências na modelagem em alguns domínios, como por exemplo Software-Intensive Systems, onde a modelagem de elementos que não são software é de grande importância. Uma das grandes vantagens da UML é a sua ampla capacidade de extensão e adaptação aos diferentes domínios de aplicação usando proles, como é o caso da SysML. A SysML é um prole UML e representa uma linguagem de propósito geral usada no domínio de Engenharia de Sistemas. Uma operação importante na Engenharia Dirigida por Modelos é a transformação de modelos, que consiste em um processo automatizado de conversão de um modelo origem para modelo destino. A construção de novas transformações, e o reuso das existentes, representam pontos-chave para a popularização da Engenharia dirigida por modelos. Este trabalho tem como objetivo apresentar os relacionamentos e as transformações automatizadas entre Diagramas da SysML e Diagramas da UML. Os relacionamentos são apresentados por meio de mapeamento entre metamodelos que apresentam as relações entre os elementos dos Diagramas estudados. Os Diagramas escolhidos para estudo foram o Diagrama de Blocos e Diagramas de Blocos Internos da SysML que são transformados em Diagrama de Classes e Diagrama de Atividades da UML, respectivamente. Uma abordagem orientada a modelos é usada para implementar essas relações como transformações de modelos automáticas. Para implementação destas transformações é usada a linguagem de transformação ATL. Dois estudos de casos reais, um para cada transformação implementada, são usados para validar as transformações.Due to the large increase of complexity in software development in recent years, academia and organizations have a rational solution in software engineering, called Model- Driven Engineering, that seeks to support managing this complexity. Model-Driven Engineering is an approach that moves the focus of the development of software from code to models. The UML is currently the most widely used language for software modeling. Despite its extensive use in various application domains, UML is awed in some domains, such as Software-Intensive Systems, where modeling elements that are not software are of great importance. A major advantage of UML is its wide extensibility and adaptation to dierent application domains using proles, such as SysML. SysML is a UML prole and represents a general purpose language used in Systems Engineering domain. One important operation in Model-Driven Engineering is model transformation, which consists of an automated process of converting a source model to target model. The construction of new transformations, and the reuse of existing ones, represent key points for popularization of Model-Driven Engineering. This work has objectives to present relationships and automated transformations between SysML Diagrams and UML Diagrams. Relationships are presented by means of metamodels that show relationships between elements of the Diagrams studied. Diagrams chosen in the study were the Block Diagram and Internal Block Diagram of SysML that are transformed to Class Diagram and Activity Diagram of UML, respectively. A model-driven approach is used to implement these relationships as automatic model transformations. To implement these transformations the ATL transformation language is used. Two real case studies, one for each implemented transformation, are used to validate model transformations
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Transformação de modelos SysML para UML usando a linguagem ATL
'EDUFU - Editora da Universidade Federal de Uberlandia', 2014Co-Authors: Melo, Marcel Da SilvaAbstract:Due to the large increase of complexity in software development in recent years, academia and organizations have a rational solution in software engineering, called Model- Driven Engineering, that seeks to support managing this complexity. Model-Driven Engineering is an approach that moves the focus of the development of software from code to models. The UML is currently the most widely used language for software modeling. Despite its extensive use in various application domains, UML is awed in some domains, such as Software-Intensive Systems, where modeling elements that are not software are of great importance. A major advantage of UML is its wide extensibility and adaptation to dierent application domains using proles, such as SysML. SysML is a UML prole and represents a general purpose language used in Systems Engineering domain. One important operation in Model-Driven Engineering is model transformation, which consists of an automated process of converting a source model to target model. The construction of new transformations, and the reuse of existing ones, represent key points for popularization of Model-Driven Engineering. This work has objectives to present relationships and automated transformations between SysML Diagrams and UML Diagrams. Relationships are presented by means of metamodels that show relationships between elements of the Diagrams studied. Diagrams chosen in the study were the Block Diagram and Internal Block Diagram of SysML that are transformed to Class Diagram and Activity Diagram of UML, respectively. A model-driven approach is used to implement these relationships as automatic model transformations. To implement these transformations the ATL transformation language is used. Two real case studies, one for each implemented transformation, are used to validate model transformations.Mestre em Ciência da ComputaçãoDevido ao grande aumento da complexidade no desenvolvimento de software nos últimos anos, academia e organizações criaram uma solução racional na engenharia de software, chamada de Engenharia Dirigida por Modelos, que busca suportar o gerenciamento de tal complexidade. A Engenharia Dirigida por Modelos é uma abordagem que move o foco do desenvolvimento de software de código para modelos. A UML é atualmente a linguagem mais utilizada para modelagem de software. Apesar do seu uso intenso em vários domínios de aplicação, a UML apresenta deciências na modelagem em alguns domínios, como por exemplo Software-Intensive Systems, onde a modelagem de elementos que não são software é de grande importância. Uma das grandes vantagens da UML é a sua ampla capacidade de extensão e adaptação aos diferentes domínios de aplicação usando proles, como é o caso da SysML. A SysML é um prole UML e representa uma linguagem de propósito geral usada no domínio de Engenharia de Sistemas. Uma operação importante na Engenharia Dirigida por Modelos é a transformação de modelos, que consiste em um processo automatizado de conversão de um modelo origem para modelo destino. A construção de novas transformações, e o reuso das existentes, representam pontos-chave para a popularização da Engenharia dirigida por modelos. Este trabalho tem como objetivo apresentar os relacionamentos e as transformações automatizadas entre Diagramas da SysML e Diagramas da UML. Os relacionamentos são apresentados por meio de mapeamento entre metamodelos que apresentam as relações entre os elementos dos Diagramas estudados. Os Diagramas escolhidos para estudo foram o Diagrama de Blocos e Diagramas de Blocos Internos da SysML que são transformados em Diagrama de Classes e Diagrama de Atividades da UML, respectivamente. Uma abordagem orientada a modelos é usada para implementar essas relações como transformações de modelos automáticas. Para implementação destas transformações é usada a linguagem de transformação ATL. Dois estudos de casos reais, um para cada transformação implementada, são usados para validar as transformações
Alan Grigg - One of the best experts on this subject based on the ideXlab platform.
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Model-based systems product line engineering with physical design variability for aircraft systems
2016 11th System of Systems Engineering Conference (SoSE), 2016Co-Authors: Mole Li, Lin Guan, Charles Dickerson, Alan GriggAbstract:Software Product Line Engineering (SPLE) has drawn large amounts of attention during the last two decades as it offers the benefits of reducing cost and time to market by reusing requirements and components. Recently, more and more large scale industries start to implement SPLE in their domains (combining SPLE with model-based modelling methods). However, the problem of how to combine SPLE with Model-Based System Engineering is still a challenge, as systems are much broader than the software domain. Unlike software engineering, system engineering has to consider the physical resources aspect. This paper classifies typical types of physical variability and provides general modelling solutions for each type of physical variation at the system design stage. Specifically, this approach combines a variability model with a SysML Block Definition Diagram and an Internal Block Diagram to model the contextual variability, architectural variability, connector variability, instance number variability, component variability, location variability and evolutional variability of physical designs. Variability is modelled separately to help reduce the complexity of design models. Last but not least, the proposed method is illustrated by an aircraft system case study.
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SoSE - Model-based systems product line engineering with physical design variability for aircraft systems
2016 11th System of Systems Engineering Conference (SoSE), 2016Co-Authors: Lin Guan, Charles E. Dickerson, Alan GriggAbstract:Software Product Line Engineering (SPLE) has drawn large amounts of attention during the last two decades as it offers the benefits of reducing cost and time to market by reusing requirements and components. Recently, more and more large scale industries start to implement SPLE in their domains (combining SPLE with model-based modelling methods). However, the problem of how to combine SPLE with Model-Based System Engineering is still a challenge, as systems are much broader than the software domain. Unlike software engineering, system engineering has to consider the physical resources aspect. This paper classifies typical types of physical variability and provides general modelling solutions for each type of physical variation at the system design stage. Specifically, this approach combines a variability model with a SysML Block Definition Diagram and an Internal Block Diagram to model the contextual variability, architectural variability, connector variability, instance number variability, component variability, location variability and evolutional variability of physical designs. Variability is modelled separately to help reduce the complexity of design models. Last but not least, the proposed method is illustrated by an aircraft system case study.
Lin Guan - One of the best experts on this subject based on the ideXlab platform.
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Model-based systems product line engineering with physical design variability for aircraft systems
2016 11th System of Systems Engineering Conference (SoSE), 2016Co-Authors: Mole Li, Lin Guan, Charles Dickerson, Alan GriggAbstract:Software Product Line Engineering (SPLE) has drawn large amounts of attention during the last two decades as it offers the benefits of reducing cost and time to market by reusing requirements and components. Recently, more and more large scale industries start to implement SPLE in their domains (combining SPLE with model-based modelling methods). However, the problem of how to combine SPLE with Model-Based System Engineering is still a challenge, as systems are much broader than the software domain. Unlike software engineering, system engineering has to consider the physical resources aspect. This paper classifies typical types of physical variability and provides general modelling solutions for each type of physical variation at the system design stage. Specifically, this approach combines a variability model with a SysML Block Definition Diagram and an Internal Block Diagram to model the contextual variability, architectural variability, connector variability, instance number variability, component variability, location variability and evolutional variability of physical designs. Variability is modelled separately to help reduce the complexity of design models. Last but not least, the proposed method is illustrated by an aircraft system case study.
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SoSE - Model-based systems product line engineering with physical design variability for aircraft systems
2016 11th System of Systems Engineering Conference (SoSE), 2016Co-Authors: Lin Guan, Charles E. Dickerson, Alan GriggAbstract:Software Product Line Engineering (SPLE) has drawn large amounts of attention during the last two decades as it offers the benefits of reducing cost and time to market by reusing requirements and components. Recently, more and more large scale industries start to implement SPLE in their domains (combining SPLE with model-based modelling methods). However, the problem of how to combine SPLE with Model-Based System Engineering is still a challenge, as systems are much broader than the software domain. Unlike software engineering, system engineering has to consider the physical resources aspect. This paper classifies typical types of physical variability and provides general modelling solutions for each type of physical variation at the system design stage. Specifically, this approach combines a variability model with a SysML Block Definition Diagram and an Internal Block Diagram to model the contextual variability, architectural variability, connector variability, instance number variability, component variability, location variability and evolutional variability of physical designs. Variability is modelled separately to help reduce the complexity of design models. Last but not least, the proposed method is illustrated by an aircraft system case study.