The Experts below are selected from a list of 23199 Experts worldwide ranked by ideXlab platform
Shen-iuan Liu - One of the best experts on this subject based on the ideXlab platform.
-
A Bang Bang Phase-Locked Loop Using Automatic Loop Gain Control and Loop Latency Reduction Techniques
IEEE Journal of Solid-State Circuits, 2016Co-Authors: Ting-kuei Kuan, Shen-iuan LiuAbstract:This paper presents a digital bang–bang phase-locked loop (DBPLL) that employs automatic loop gain control and loop Latency Reduction techniques to enhance the jitter performance. Due to noise filtering properties, a DBPLL has an optimal loop gain which gives rise to the best jitter performance, taking into account external and internal noise sources. By using the automatic loop gain control technique, the DBPLL can automatically attain this loop gain in background to minimize the jitter. This paper also exploits time-series analysis to analyze the DBPLL. In particular, the closed-form gain of a bang–bang phase detector (BBPD) is first derived, taking into account reference clock noise and oscillator noise simultaneously. The chip was fabricated in a 40 nm CMOS process. This DBPLL achieves $ fs integrated rms jitter and $ dBc reference spurs. It consumes 3.8 mW from a 1.1 V supply while operating at 3.96 GHz. This translates to an figure-of-merit (FOM) of $- 245$ dB.
-
a digital bang bang phase locked loop with automatic loop gain control and loop Latency Reduction
Symposium on VLSI Circuits, 2015Co-Authors: Ting-kuei Kuan, Shen-iuan LiuAbstract:This paper presents a digital bang-bang phase-locked loop that employs automatic loop gain control and loop Latency Reduction techniques to enhance the jitter performance. The chip is fabricated in a 40nm CMOS process. This bang-bang phase-locked loop achieves 290fs rms integrated jitter and reference spurs <-72.89dBc. It consumes 3.8mW from a 1.1V supply while operating at 3.96GHz. This translates to an FOM of −245dB.
Ting-kuei Kuan - One of the best experts on this subject based on the ideXlab platform.
-
A Bang Bang Phase-Locked Loop Using Automatic Loop Gain Control and Loop Latency Reduction Techniques
IEEE Journal of Solid-State Circuits, 2016Co-Authors: Ting-kuei Kuan, Shen-iuan LiuAbstract:This paper presents a digital bang–bang phase-locked loop (DBPLL) that employs automatic loop gain control and loop Latency Reduction techniques to enhance the jitter performance. Due to noise filtering properties, a DBPLL has an optimal loop gain which gives rise to the best jitter performance, taking into account external and internal noise sources. By using the automatic loop gain control technique, the DBPLL can automatically attain this loop gain in background to minimize the jitter. This paper also exploits time-series analysis to analyze the DBPLL. In particular, the closed-form gain of a bang–bang phase detector (BBPD) is first derived, taking into account reference clock noise and oscillator noise simultaneously. The chip was fabricated in a 40 nm CMOS process. This DBPLL achieves $ fs integrated rms jitter and $ dBc reference spurs. It consumes 3.8 mW from a 1.1 V supply while operating at 3.96 GHz. This translates to an figure-of-merit (FOM) of $- 245$ dB.
-
a digital bang bang phase locked loop with automatic loop gain control and loop Latency Reduction
Symposium on VLSI Circuits, 2015Co-Authors: Ting-kuei Kuan, Shen-iuan LiuAbstract:This paper presents a digital bang-bang phase-locked loop that employs automatic loop gain control and loop Latency Reduction techniques to enhance the jitter performance. The chip is fabricated in a 40nm CMOS process. This bang-bang phase-locked loop achieves 290fs rms integrated jitter and reference spurs <-72.89dBc. It consumes 3.8mW from a 1.1V supply while operating at 3.96GHz. This translates to an FOM of −245dB.
Kaibin Huang - One of the best experts on this subject based on the ideXlab platform.
-
broadband analog aggregation for low Latency federated edge learning
IEEE Transactions on Wireless Communications, 2020Co-Authors: Guangxu Zhu, Yong Wang, Kaibin HuangAbstract:To leverage rich data distributed at the network edge, a new machine-learning paradigm, called edge learning, has emerged where learning algorithms are deployed at the edge for providing intelligent services to mobile users. While computing speeds are advancing rapidly, the communication Latency is becoming the bottleneck of fast edge learning. To address this issue, this work is focused on designing a low-Latency multi-access scheme for edge learning. To this end, we consider a popular privacy-preserving framework, federated edge learning (FEEL), where a global AI-model at an edge-server is updated by aggregating (averaging) local models trained at edge devices. It is proposed that the updates simultaneously transmitted by devices over broadband channels should be analog aggregated “over-the-air” by exploiting the waveform-superposition property of a multi-access channel. Such broadband analog aggregation (BAA) results in dramatical communication-Latency Reduction compared with the conventional orthogonal access (i.e., OFDMA). In this work, the effects of BAA on learning performance are quantified targeting a single-cell random network. First, we derive two tradeoffs between communication-and-learning metrics, which are useful for network planning and optimization. The power control (“truncated channel inversion”) required for BAA results in a tradeoff between the update-reliability [as measured by the receive signal-to-noise ratio (SNR)] and the expected update-truncation ratio. Consider the scheduling of cell-interior devices to constrain path loss. This gives rise to the other tradeoff between the receive SNR and fraction of data exploited in learning. Next, the Latency-Reduction ratio of the proposed BAA with respect to the traditional OFDMA scheme is proved to scale almost linearly with the device population. Experiments based on a neural network and a real dataset are conducted for corroborating the theoretical results.
-
broadband analog aggregation for low Latency federated edge learning
2018Co-Authors: Guangxu Zhu, Yong Wang, Kaibin HuangAbstract:The popularity of mobile devices results in the availability of enormous data and computational resources at the network edge. To leverage the data and resources, a new machine learning paradigm, called edge learning, has emerged where learning algorithms are deployed at the edge for providing fast and intelligent services to mobile users. While computing speeds are advancing rapidly, the communication Latency is becoming the bottleneck of fast edge learning. To address this issue, this work is focused on designing a low Latency multi-access scheme for edge learning. We consider a popular framework, federated edge learning (FEEL), where edge-server and on-device learning are synchronized to train a model without violating user-data privacy. It is proposed that model updates simultaneously transmitted by devices over broadband channels should be analog aggregated "over-the-air" by exploiting the superposition property of a multi-access channel. Thereby, "interference" is harnessed to provide fast implementation of the model aggregation. This results in dramatical Latency Reduction compared with the traditional orthogonal access (i.e., OFDMA). In this work, the performance of FEEL is characterized targeting a single-cell random network. First, due to power alignment between devices as required for aggregation, a fundamental tradeoff is shown to exist between the update-reliability and the expected update-truncation ratio. This motivates the design of an opportunistic scheduling scheme for FEEL that selects devices within a distance threshold. This scheme is shown using real datasets to yield satisfactory learning performance in the presence of high mobility. Second, both the multi-access Latency of the proposed analog aggregation and the OFDMA scheme are analyzed. Their ratio, which quantifies the Latency Reduction of the former, is proved to scale almost linearly with device population.
Guangxu Zhu - One of the best experts on this subject based on the ideXlab platform.
-
broadband analog aggregation for low Latency federated edge learning
IEEE Transactions on Wireless Communications, 2020Co-Authors: Guangxu Zhu, Yong Wang, Kaibin HuangAbstract:To leverage rich data distributed at the network edge, a new machine-learning paradigm, called edge learning, has emerged where learning algorithms are deployed at the edge for providing intelligent services to mobile users. While computing speeds are advancing rapidly, the communication Latency is becoming the bottleneck of fast edge learning. To address this issue, this work is focused on designing a low-Latency multi-access scheme for edge learning. To this end, we consider a popular privacy-preserving framework, federated edge learning (FEEL), where a global AI-model at an edge-server is updated by aggregating (averaging) local models trained at edge devices. It is proposed that the updates simultaneously transmitted by devices over broadband channels should be analog aggregated “over-the-air” by exploiting the waveform-superposition property of a multi-access channel. Such broadband analog aggregation (BAA) results in dramatical communication-Latency Reduction compared with the conventional orthogonal access (i.e., OFDMA). In this work, the effects of BAA on learning performance are quantified targeting a single-cell random network. First, we derive two tradeoffs between communication-and-learning metrics, which are useful for network planning and optimization. The power control (“truncated channel inversion”) required for BAA results in a tradeoff between the update-reliability [as measured by the receive signal-to-noise ratio (SNR)] and the expected update-truncation ratio. Consider the scheduling of cell-interior devices to constrain path loss. This gives rise to the other tradeoff between the receive SNR and fraction of data exploited in learning. Next, the Latency-Reduction ratio of the proposed BAA with respect to the traditional OFDMA scheme is proved to scale almost linearly with the device population. Experiments based on a neural network and a real dataset are conducted for corroborating the theoretical results.
-
broadband analog aggregation for low Latency federated edge learning
2018Co-Authors: Guangxu Zhu, Yong Wang, Kaibin HuangAbstract:The popularity of mobile devices results in the availability of enormous data and computational resources at the network edge. To leverage the data and resources, a new machine learning paradigm, called edge learning, has emerged where learning algorithms are deployed at the edge for providing fast and intelligent services to mobile users. While computing speeds are advancing rapidly, the communication Latency is becoming the bottleneck of fast edge learning. To address this issue, this work is focused on designing a low Latency multi-access scheme for edge learning. We consider a popular framework, federated edge learning (FEEL), where edge-server and on-device learning are synchronized to train a model without violating user-data privacy. It is proposed that model updates simultaneously transmitted by devices over broadband channels should be analog aggregated "over-the-air" by exploiting the superposition property of a multi-access channel. Thereby, "interference" is harnessed to provide fast implementation of the model aggregation. This results in dramatical Latency Reduction compared with the traditional orthogonal access (i.e., OFDMA). In this work, the performance of FEEL is characterized targeting a single-cell random network. First, due to power alignment between devices as required for aggregation, a fundamental tradeoff is shown to exist between the update-reliability and the expected update-truncation ratio. This motivates the design of an opportunistic scheduling scheme for FEEL that selects devices within a distance threshold. This scheme is shown using real datasets to yield satisfactory learning performance in the presence of high mobility. Second, both the multi-access Latency of the proposed analog aggregation and the OFDMA scheme are analyzed. Their ratio, which quantifies the Latency Reduction of the former, is proved to scale almost linearly with device population.
Andrea Goldsmith - One of the best experts on this subject based on the ideXlab platform.
-
Sublinear Latency for Simplified Successive Cancellation Decoding of Polar Codes
IEEE Transactions on Wireless Communications, 2021Co-Authors: Marco Mondelli, Seyyed Ali Hashemi, Andrea GoldsmithAbstract:This work analyzes the Latency of the simplified successive cancellation (SSC) decoding scheme for polar codes proposed by Alamdar-Yazdi and Kschischang. It is shown that, unlike conventional successive cancellation decoding, where Latency is linear in the block length, the Latency of SSC decoding is sublinear. More specifically, the Latency of SSC decoding is O(N1-1/μ), where N is the block length and μ is the scaling exponent of the channel, which captures the speed of convergence of the rate to capacity. Numerical results demonstrate the tightness of the bound and show that most of the Latency Reduction arises from the parallel decoding of subcodes of rate 0 or 1.
-
Simplified Successive Cancellation Decoding of Polar Codes Has Sublinear Latency
2020 IEEE International Symposium on Information Theory (ISIT), 2020Co-Authors: Marco Mondelli, John Cioffi, Seyyed Ali Hashemi, Andrea GoldsmithAbstract:This work analyzes the Latency of the simplified successive cancellation (SSC) decoding scheme for polar codes proposed by Alamdar-Yazdi and Kschischang. It is shown that, unlike conventional successive cancellation decoding, where Latency is linear in the block length, the Latency of SSC decoding is sublinear. More specifically, the Latency of SSC decoding is O(N1-1/μ), where N is the block length and μ is the scaling exponent of the channel, which captures the speed of convergence of the rate to capacity. Numerical results demonstrate the tightness of the bound and show that most of the Latency Reduction arises from the parallel decoding of subcodes of rate 0 and 1.
