Logarithmic Domain

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Xiaozhen Zheng - One of the best experts on this subject based on the ideXlab platform.

  • a high throughput and low complexity decoding scheme based on Logarithmic Domain
    Journal of Signal Processing Systems, 2017
    Co-Authors: Jianhua Zheng, Xiaozhen Zheng, Yaocheng Rong
    Abstract:

    This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs.

  • correction to an efficient adaptive binary arithmetic coder based on Logarithmic Domain
    IEEE Transactions on Image Processing, 2016
    Co-Authors: Ping Yang, Jianhua Zheng, Xiaozhen Zheng
    Abstract:

    For the above-named work, a missing sentence that should have been included in the first footnote is provided.

  • high throughput and low complexity binary arithmetic decoder based on Logarithmic Domain
    International Conference on Image Processing, 2015
    Co-Authors: Xiaozhen Zheng, Jianhua Zheng, Dadong Wang, Junyou Chen
    Abstract:

    This paper proposes a low-complexity and high-throughput decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). The proposed D_LBAC has high throughput and low complexity. It does not use multiplication and division operations nor look up tables (LUTs). The proposed D_LBAC is a simple algorithm structure and only requires additions and shift operations. Experimental results show it can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve the high symbol processing capability and the low hardware costs.

  • an efficient adaptive binary arithmetic coder based on Logarithmic Domain
    IEEE Transactions on Image Processing, 2015
    Co-Authors: Ping Yang, Jianhua Zheng, Xiaozhen Zheng
    Abstract:

    This paper proposes an efficient adaptive binary arithmetic coder based on a Logarithmic Domain (LBAC) and a probability estimation based on the LBAC (P-LBAC). Both the LBAC and the P-LBAC achieve a high data-compression ratio with low complexity and a hardware-efficient structure. They introduce a mapping mechanism between the Logarithmic Domain and the original Domain for both the coding process and the probability estimation. The proposed schemes have high accuracy and constitute an efficient BAC. The proposed LBAC and P-LBAC do not use either multiplication and division operations or lookup tables, and only addition and shifting operations are required. The proposed LBAC is designed to favor the coding of multiple symbols and has high throughput. The proposed P-LBAC achieves a good tradeoff between accuracy and speed in probability estimation through a single parameter. When the proposed algorithms are implemented on H.265/HEVC platforms, and they achieve a compression efficiency equivalent to that of CABAC.

  • A new efficient bypass coding scheme based on Logarithmic Domain
    2015 Picture Coding Symposium (PCS), 2015
    Co-Authors: Quanhe Yu, Jianhua Zheng, Xiaozhen Zheng, Yun He, Wei Yu, Dadong Wang, Junyou Chen, Yangyang Xu
    Abstract:

    This paper proposes a new efficient bypass coding scheme (EBCS) based on Logarithmic Binary Arithmetic Coding (LBAC). The bypass coding model is used to encode a symbol which has equal probability (0.5). The percentage of the bypass coding model is about 25 in CABAC of H.265/HEVC. The proposed EBCS provides a hardware-efficient design that can significantly increase the processing speed, and it has a simple algorithm structure. Experimental results show that the EBCS can reduce bypass coding time by 60% roughly. For a hardware implementation in this paper, the overall processing speed is improved by about 96%, and the hardware cost is low.

Jianhua Zheng - One of the best experts on this subject based on the ideXlab platform.

  • a high throughput and low complexity decoding scheme based on Logarithmic Domain
    Journal of Signal Processing Systems, 2017
    Co-Authors: Jianhua Zheng, Xiaozhen Zheng, Yaocheng Rong
    Abstract:

    This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs.

  • correction to an efficient adaptive binary arithmetic coder based on Logarithmic Domain
    IEEE Transactions on Image Processing, 2016
    Co-Authors: Ping Yang, Jianhua Zheng, Xiaozhen Zheng
    Abstract:

    For the above-named work, a missing sentence that should have been included in the first footnote is provided.

  • high throughput and low complexity binary arithmetic decoder based on Logarithmic Domain
    International Conference on Image Processing, 2015
    Co-Authors: Xiaozhen Zheng, Jianhua Zheng, Dadong Wang, Junyou Chen
    Abstract:

    This paper proposes a low-complexity and high-throughput decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). The proposed D_LBAC has high throughput and low complexity. It does not use multiplication and division operations nor look up tables (LUTs). The proposed D_LBAC is a simple algorithm structure and only requires additions and shift operations. Experimental results show it can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve the high symbol processing capability and the low hardware costs.

  • an efficient adaptive binary arithmetic coder based on Logarithmic Domain
    IEEE Transactions on Image Processing, 2015
    Co-Authors: Ping Yang, Jianhua Zheng, Xiaozhen Zheng
    Abstract:

    This paper proposes an efficient adaptive binary arithmetic coder based on a Logarithmic Domain (LBAC) and a probability estimation based on the LBAC (P-LBAC). Both the LBAC and the P-LBAC achieve a high data-compression ratio with low complexity and a hardware-efficient structure. They introduce a mapping mechanism between the Logarithmic Domain and the original Domain for both the coding process and the probability estimation. The proposed schemes have high accuracy and constitute an efficient BAC. The proposed LBAC and P-LBAC do not use either multiplication and division operations or lookup tables, and only addition and shifting operations are required. The proposed LBAC is designed to favor the coding of multiple symbols and has high throughput. The proposed P-LBAC achieves a good tradeoff between accuracy and speed in probability estimation through a single parameter. When the proposed algorithms are implemented on H.265/HEVC platforms, and they achieve a compression efficiency equivalent to that of CABAC.

  • A new efficient bypass coding scheme based on Logarithmic Domain
    2015 Picture Coding Symposium (PCS), 2015
    Co-Authors: Quanhe Yu, Jianhua Zheng, Xiaozhen Zheng, Yun He, Wei Yu, Dadong Wang, Junyou Chen, Yangyang Xu
    Abstract:

    This paper proposes a new efficient bypass coding scheme (EBCS) based on Logarithmic Binary Arithmetic Coding (LBAC). The bypass coding model is used to encode a symbol which has equal probability (0.5). The percentage of the bypass coding model is about 25 in CABAC of H.265/HEVC. The proposed EBCS provides a hardware-efficient design that can significantly increase the processing speed, and it has a simple algorithm structure. Experimental results show that the EBCS can reduce bypass coding time by 60% roughly. For a hardware implementation in this paper, the overall processing speed is improved by about 96%, and the hardware cost is low.

Oscar Gustafsson - One of the best experts on this subject based on the ideXlab platform.

  • approximate floating point operations with integer units by processing in the Logarithmic Domain
    Symposium on Computer Arithmetic, 2021
    Co-Authors: Oscar Gustafsson, Noah Hellman
    Abstract:

    Floating-point numbers represented using a hidden one can readily be approximately converted to the Logarithmic Domain using Mitchell's approximation. Once in the Logarithmic Domain, several arithmetic operations including multiplication, division, and square-root can be easily computed using the integer arithmetic unit. This has earlier been used in fast reciprocal square-root algorithms, sometimes referred to as magic number algorithms. The proposed approximate operations are realized by performing an integer operation using an integer unit on floating-point data and adding an integer constant to obtain the approximate floating-point result. In this work, we derive easy to use equations and constants for multiple floating-point formats and operations.

  • massive machine type communication pilot hopping sequence detection architectures based on non negative least squares for grant free random access
    IEEE Open Journal of Circuits and Systems, 2021
    Co-Authors: Narges Mohammadi Sarband, Ema Becirovic, Mattias Krysander, Erik G Larsson, Oscar Gustafsson
    Abstract:

    User activity detection in grant-free random access massive machine type communication (mMTC) using pilot-hopping sequences can be formulated as solving a non-negative least squares (NNLS) problem. In this work, two architectures using different algorithms to solve the NNLS problem is proposed. The algorithms are implemented using a fully parallel approach and fixed-point arithmetic, leading to high detection rates and low power consumption. The first algorithm, fast projected gradients, converges faster to the optimal value. The second algorithm, multiplicative updates, is partially implemented in the Logarithmic Domain, and provides a smaller chip area and lower power consumption. For a detection rate of about one million detections per second, the chip area for the fast algorithm is about 0.7 mm2 compared to about 0.5 mm2 for the multiplicative algorithm when implemented in a 28 nm FD-SOI standard cell process at 1 V power supply voltage. The energy consumption is about 300 nJ/detection for the fast projected gradient algorithm using 256 iterations, leading to a convergence close to the theoretical. With 128 iterations, about 250 nJ/detection is required, with a detection performance on par with 192 iterations of the multiplicative algorithm for which about 100 nJ/detection is required.

  • design of finite word length linear phase fir filters in the Logarithmic number system Domain
    Vlsi Design, 2014
    Co-Authors: Syed Asad Alam, Oscar Gustafsson
    Abstract:

    Logarithmic number system (LNS) is an attractive alternative to realize finite-length impulse response filters because of multiplication in the linear Domain being only addition in the Logarithmic Domain. In the literature, linear coefficients are directly replaced by the Logarithmic equivalent. In this paper, an approach to directly optimize the finite word length coefficients in the LNS Domain is proposed. This branch and bound algorithm is implemented based on LNS integers and several different branching strategies are proposed and evaluated. Optimal coefficients in the minimax sense are obtained and compared with the traditional finite word length representation in the linear Domain as well as using rounding. Results show that the proposed method naturally provides smaller approximation error compared to rounding. Furthermore, they provide insights into finite word length properties of FIR filters coefficients in the LNS Domain and show that LNS FIR filters typically provide a better approximation error compared to a standard FIR filter.

Jongwha Chong - One of the best experts on this subject based on the ideXlab platform.

Ping Yang - One of the best experts on this subject based on the ideXlab platform.

  • correction to an efficient adaptive binary arithmetic coder based on Logarithmic Domain
    IEEE Transactions on Image Processing, 2016
    Co-Authors: Ping Yang, Jianhua Zheng, Xiaozhen Zheng
    Abstract:

    For the above-named work, a missing sentence that should have been included in the first footnote is provided.

  • an efficient adaptive binary arithmetic coder based on Logarithmic Domain
    IEEE Transactions on Image Processing, 2015
    Co-Authors: Ping Yang, Jianhua Zheng, Xiaozhen Zheng
    Abstract:

    This paper proposes an efficient adaptive binary arithmetic coder based on a Logarithmic Domain (LBAC) and a probability estimation based on the LBAC (P-LBAC). Both the LBAC and the P-LBAC achieve a high data-compression ratio with low complexity and a hardware-efficient structure. They introduce a mapping mechanism between the Logarithmic Domain and the original Domain for both the coding process and the probability estimation. The proposed schemes have high accuracy and constitute an efficient BAC. The proposed LBAC and P-LBAC do not use either multiplication and division operations or lookup tables, and only addition and shifting operations are required. The proposed LBAC is designed to favor the coding of multiple symbols and has high throughput. The proposed P-LBAC achieves a good tradeoff between accuracy and speed in probability estimation through a single parameter. When the proposed algorithms are implemented on H.265/HEVC platforms, and they achieve a compression efficiency equivalent to that of CABAC.