CHAPTER 11 – Exception Programming

Publisher Summary This chapter discusses the usage and scope of Cortex™-M3 processor, the interrupt controller Nested Vectored Interrupt Controller that handles a number of processing tasks. It explores the Stack setup—using the Main Stack Pointer for the whole program—the vector table, and the programmable priority of all exceptions, which, by default, are in the priority level 0. For hard fault exceptions and the non-maskable interrupt, the priority levels are -1 and -2, respectively. In the Cortex-M3, interrupt handlers can be programmed completely in C, whereas in ARM7, an assembly handler is commonly used to ensure that all registers are saved. In most cases, some of the interrupts are unused and can be used as software interrupts. Software interrupts can work similar to supervisor call (SVC), allowing accesses to system services. SVC is a common way to allow user applications to access the application programming interface in an OS. However, it has its problems as well. If the SVC handler is to be developed in C, a simple assembly wrapper code can be used to obtain the Stacked register location and pass it on to the SVC handler.