The Experts below are selected from a list of 4314 Experts worldwide ranked by ideXlab platform
Hironori Nakajo - One of the best experts on this subject based on the ideXlab platform.
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network interface architecture for scalable Message Queue processing
International Conference on Parallel and Distributed Systems, 2009Co-Authors: Noboru Tanabe, Atsushi Ohta, Pulung Waskito, Hironori NakajoAbstract:Most of scientists except computer scientists do not want to make efforts for performance tuning with rewriting their MPI applications. In addition, the number of processing elements which can be used by them is increasing year by year. On large-scale parallel systems, the number of accumulated Messages on a Message buffer tends to increase in some of their applications. Since searching Message Queue in MPI is time-consuming, system side scalable acceleration is needed for those systems. In this paper, a support function named LHS (Limited-length Head Separation) is proposed. Its performance in searching Message buffer and hardware cost are evaluated. LHS accelerates searching Message buffer by means of switching location to store limited-length heads of Messages. It uses the effects such as increasing hit rate of cache on host with partial off-loading to hardware. Searching speed of Message buffer when the order of Message reception is different from the receiver's expectation is accelerated 14.3 times with LHS on FPGA-based network interface card (NIC) named DIMMnet-2. This absolute performance is 38.5 times higher than that of IBM BlueGene/P although the frequency is 8.5times slower than BlueGene/P. Hardware cost of LHS is significantly lower than that of ALPU, which is a hardware accelerator for searching Message buffer. LHS has higher scalability than ALPU in the performance per frequency. Therefore, LHS is more suitable for larger parallel systems.
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ICPADS - Network Interface Architecture for Scalable Message Queue Processing
2009 15th International Conference on Parallel and Distributed Systems, 2009Co-Authors: Noboru Tanabe, Atsushi Ohta, Pulung Waskito, Hironori NakajoAbstract:Most of scientists except computer scientists do not want to make efforts for performance tuning with rewriting their MPI applications. In addition, the number of processing elements which can be used by them is increasing year by year. On large-scale parallel systems, the number of accumulated Messages on a Message buffer tends to increase in some of their applications. Since searching Message Queue in MPI is time-consuming, system side scalable acceleration is needed for those systems. In this paper, a support function named LHS (Limited-length Head Separation) is proposed. Its performance in searching Message buffer and hardware cost are evaluated. LHS accelerates searching Message buffer by means of switching location to store limited-length heads of Messages. It uses the effects such as increasing hit rate of cache on host with partial off-loading to hardware. Searching speed of Message buffer when the order of Message reception is different from the receiver's expectation is accelerated 14.3 times with LHS on FPGA-based network interface card (NIC) named DIMMnet-2. This absolute performance is 38.5 times higher than that of IBM BlueGene/P although the frequency is 8.5times slower than BlueGene/P. Hardware cost of LHS is significantly lower than that of ALPU, which is a hardware accelerator for searching Message buffer. LHS has higher scalability than ALPU in the performance per frequency. Therefore, LHS is more suitable for larger parallel systems.
Noboru Tanabe - One of the best experts on this subject based on the ideXlab platform.
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network interface architecture for scalable Message Queue processing
International Conference on Parallel and Distributed Systems, 2009Co-Authors: Noboru Tanabe, Atsushi Ohta, Pulung Waskito, Hironori NakajoAbstract:Most of scientists except computer scientists do not want to make efforts for performance tuning with rewriting their MPI applications. In addition, the number of processing elements which can be used by them is increasing year by year. On large-scale parallel systems, the number of accumulated Messages on a Message buffer tends to increase in some of their applications. Since searching Message Queue in MPI is time-consuming, system side scalable acceleration is needed for those systems. In this paper, a support function named LHS (Limited-length Head Separation) is proposed. Its performance in searching Message buffer and hardware cost are evaluated. LHS accelerates searching Message buffer by means of switching location to store limited-length heads of Messages. It uses the effects such as increasing hit rate of cache on host with partial off-loading to hardware. Searching speed of Message buffer when the order of Message reception is different from the receiver's expectation is accelerated 14.3 times with LHS on FPGA-based network interface card (NIC) named DIMMnet-2. This absolute performance is 38.5 times higher than that of IBM BlueGene/P although the frequency is 8.5times slower than BlueGene/P. Hardware cost of LHS is significantly lower than that of ALPU, which is a hardware accelerator for searching Message buffer. LHS has higher scalability than ALPU in the performance per frequency. Therefore, LHS is more suitable for larger parallel systems.
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ICPADS - Network Interface Architecture for Scalable Message Queue Processing
2009 15th International Conference on Parallel and Distributed Systems, 2009Co-Authors: Noboru Tanabe, Atsushi Ohta, Pulung Waskito, Hironori NakajoAbstract:Most of scientists except computer scientists do not want to make efforts for performance tuning with rewriting their MPI applications. In addition, the number of processing elements which can be used by them is increasing year by year. On large-scale parallel systems, the number of accumulated Messages on a Message buffer tends to increase in some of their applications. Since searching Message Queue in MPI is time-consuming, system side scalable acceleration is needed for those systems. In this paper, a support function named LHS (Limited-length Head Separation) is proposed. Its performance in searching Message buffer and hardware cost are evaluated. LHS accelerates searching Message buffer by means of switching location to store limited-length heads of Messages. It uses the effects such as increasing hit rate of cache on host with partial off-loading to hardware. Searching speed of Message buffer when the order of Message reception is different from the receiver's expectation is accelerated 14.3 times with LHS on FPGA-based network interface card (NIC) named DIMMnet-2. This absolute performance is 38.5 times higher than that of IBM BlueGene/P although the frequency is 8.5times slower than BlueGene/P. Hardware cost of LHS is significantly lower than that of ALPU, which is a hardware accelerator for searching Message buffer. LHS has higher scalability than ALPU in the performance per frequency. Therefore, LHS is more suitable for larger parallel systems.
Peppino Fazio - One of the best experts on this subject based on the ideXlab platform.
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energy aware dynamic internet of things security system based on elliptic curve cryptography and Message Queue telemetry transport protocol for mitigating replay attacks
Pervasive and Mobile Computing, 2020Co-Authors: Floriano De Rango, Giuseppe Potrino, Mauro Tropea, Peppino FazioAbstract:Abstract Security in the context of Internet of Things (IoT) is a critical challenge. The purpose of this work is to model and evaluate a dynamic IoT security system based on a generic IoT edge network in which nodes exchange Messages through the Message Queue Telemetry Transport (MQTT) protocol. This work aims to increase MQTT security by mitigating data tampering, eavesdropping and Replay attacks by using the Elliptic Curve Cryptography (ECC), timestamps and wake up patterns, with the purpose of preserving node energy. The evaluated results will show that it is possible to increase the system lifetime by linking security levels and energy.
Ahmad Afsahi - One of the best experts on this subject based on the ideXlab platform.
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A fast and resource-conscious MPI Message Queue mechanism for large-scale jobs
Future Generation Computer Systems, 2014Co-Authors: Judicael A. Zounmevo, Ahmad AfsahiAbstract:The Message Passing Interface (MPI) Message Queues have been shown to grow proportionately to the job size for many applications. With such a behaviour and knowing that Message Queues are used very frequently, ensuring fast Queue operations at large scales is of paramount importance in the current and the upcoming exascale computing eras. Scalability, however, is two-fold. With the growing processor core density per node, and the expected smaller memory density per core at larger scales, a Queue mechanism that is blind on memory requirements poses another scalability issue even if it solves the speed of operation problem. In this work we propose a multidimensional Queue management mechanism whose operation time and memory overhead grow sub-linearly with the job size. We show why a novel approach is justified in spite of the existence of well-known and fast data structures such as binary search trees. We compare our proposal with a linked list-based approach which is not scalable in terms of speed of operation, and with an array-based method which is not scalable in terms of memory consumption. Our proposed multidimensional approach yields Queue operation time speedups that translate to up to 4-fold execution time improvement over the linked list design for the applications studied in this work. It also shows a consistent lower memory footprint compared to the array-based design. Finally, compared to the linked list-based Queue, our proposed design yields cache miss rate improvements which are on average on par with the array-based design. A new MPI Message Queue design tailored for very large-scale jobs.A design based on a 4-D data container that exploits process rank decomposition.The effect of job size on Message Queue operations is mitigated.Infructuous Message Queue searches are optimized via early detection.Scalability is provided for both execution speed and memory consumption.
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an efficient mpi Message Queue mechanism for large scale jobs
International Conference on Parallel and Distributed Systems, 2012Co-Authors: Judicael A. Zounmevo, Ahmad AfsahiAbstract:The Message Passing Interface (MPI) Message Queues have been shown to grow proportionately to the job size for many applications. With such a behaviour and knowing that Message Queues are used very frequently, ensuring fast Queue operations at large scales is of paramount importance in the current and the upcoming exascale computing eras. Scalability, however, is two-fold. With the growing processor core density per node, and the expected smaller memory density per core at larger scales, a Queue mechanism that is blind on memory requirements poses another scalability issue even if it solves the speed of operation problem. In this work we propose a multidimensional Queue traversal mechanism whose operation time and memory overhead grow sub-linearly with the job size. We compare our proposal with a linked list-based approach which is not scalable in terms of speed of operation, and with an array-based method which is not scalable in terms of memory consumption. Our proposed multidimensional approach yields Queue operation time speedups that translate to up to 4-fold execution time improvement over the linked list design for the applications studied in this work. It also shows a consistent lower memory footprint compared to the array-based design.
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ICPADS - An Efficient MPI Message Queue Mechanism for Large-scale Jobs
2012 IEEE 18th International Conference on Parallel and Distributed Systems, 2012Co-Authors: Judicael A. Zounmevo, Ahmad AfsahiAbstract:The Message Passing Interface (MPI) Message Queues have been shown to grow proportionately to the job size for many applications. With such a behaviour and knowing that Message Queues are used very frequently, ensuring fast Queue operations at large scales is of paramount importance in the current and the upcoming exascale computing eras. Scalability, however, is two-fold. With the growing processor core density per node, and the expected smaller memory density per core at larger scales, a Queue mechanism that is blind on memory requirements poses another scalability issue even if it solves the speed of operation problem. In this work we propose a multidimensional Queue traversal mechanism whose operation time and memory overhead grow sub-linearly with the job size. We compare our proposal with a linked list-based approach which is not scalable in terms of speed of operation, and with an array-based method which is not scalable in terms of memory consumption. Our proposed multidimensional approach yields Queue operation time speedups that translate to up to 4-fold execution time improvement over the linked list design for the applications studied in this work. It also shows a consistent lower memory footprint compared to the array-based design.
Liu Ruihong - One of the best experts on this subject based on the ideXlab platform.
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Research and Implementation of Asynchronous Web Service Based on WSE and Message Queue
Computer Engineering, 2007Co-Authors: Liu RuihongAbstract:Aiming at the problem that the way of RPC realizing the asynchronous Web service is difficult.This paper proposes one kind new asynchronous Web service solution,namely under the WSE architecture,through bindings between SOAP protocol and Message Queue,achieves the SOAP Messages asynchronous transmission,thus realizes Web service asynchronous invoking.