The Experts below are selected from a list of 8286 Experts worldwide ranked by ideXlab platform

Hiroshi Fujisaki - One of the best experts on this subject based on the ideXlab platform.

  • Modular Arithmetic Erasure Channels and Their Multilevel Channel Polarization
    IEEE Transactions on Information Theory, 2020
    Co-Authors: Yuta Sakai, Kenichi Iwata, Hiroshi Fujisaki
    Abstract:

    This study proposes Modular Arithmetic erasure channels (MAECs), a novel class of erasure-like channels with an input alphabet that need not be binary. This class contains the binary erasure channel (BEC) and some other known erasure-like channels as special cases. For MAECs, we provide recursive formulas of Arikan-like polar transform to simulate channel polarization. In other words, we show that the synthetic channels of MAECs are equivalent to other MAECs. This is a generalization of well-known recursive formulas of the polar transform for BECs. Using our recursive formulas, we also show that a recursive application of the polar transform for MAECs results in multilevel channel polarization, which is an asymptotic phenomenon that is characteristic of non-binary polar codes. Specifically, we establish a method to calculate the limiting proportions of the partially noiseless and noisy channels that are generated as a result of multilevel channel polarization for MAECs. In the particular case of MAECs, this calculation method solves an open problem posed by Nasser (2017) in the study of non-binary polar codes.

  • Modular Arithmetic erasure channels and their multilevel channel polarization
    arXiv: Information Theory, 2018
    Co-Authors: Yuta Sakai, Kenichi Iwata, Hiroshi Fujisaki
    Abstract:

    This study proposes a novel channel model called the Modular Arithmetic erasure channel, which is a general type of arbitrary input erasure-like channels containing the binary erasure channel (BEC) and some other previously-known erasure-like channels. For this channel model, we give recursive formulas of Ar{\i}kan-like polar transforms to simulate its channel polarization easily. In other words, similar to the polar transforms for BECs, we show that the synthetic channels of Modular Arithmetic erasure channels are again equivalent to the same channel models with certain transition probabilities, which can be easily calculated by explicit recursive formulas. We also show that Ar{\i}kan-like polar transforms for Modular Arithmetic erasure channels behave multilevel channel polarization, which is a phenomenon appeared in the study of non-binary polar codes, and thus, Modular Arithmetic erasure channels are informative toy problems of multilevel channel polarization. Furthermore, as a solution of an open problem in non-binary polar codes for special cases, we solve exactly and algorithmically the limiting proportions of partially noiseless synthetic channels, called the asymptotic distribution of multilevel channel polarization, for Modular Arithmetic erasure channels.

Xuan Yang - One of the best experts on this subject based on the ideXlab platform.

  • APPT - Design and implementation of a high-speed reconfigurable Modular Arithmetic unit
    Lecture Notes in Computer Science, 1
    Co-Authors: Zibin Dai, Tao Chen, Tao Meng, Xuan Yang
    Abstract:

    A high-performance and dynamic reconfigurable Modular Arithmetic unit is presented, which provides full support to modulo 28/216/232 addition and modulo 232/216+1/232-1 multiplication operation. To save the hardware cost, we have adopted sharing technique to implement Modular multiplication operation, and then optimized each critical block. The design has been realized using Altera's FPGA. Synthesis, placement and routing of reconfigurable design have accomplished on 0.18µm SMIC process. The result proves that the propagation time of the critical path is 6.04ns. Compared with other designs, the reconfigurable Modular Arithmetic unit not only supports for diverse Modular Arithmetic in the block ciphers, but also provides IP Core for reconfigurable cryptographic system.

Tao Chen - One of the best experts on this subject based on the ideXlab platform.

  • A reconfigurable Modular Arithmetic unit for public-key Cryptography
    2007 7th International Conference on ASIC, 2007
    Co-Authors: Tao Chen, Bin Yu, Jin-hai Su
    Abstract:

    This paper analyzes the reconfigurable design principles of public-key cryptography and the characteristics of Modular Arithmetic iteration process. According to the analysis results, a structure-adaptive reconfigurable Modular Arithmetic unit for Public-key cryptography is implemented, which architecture is able to support both RSA and ECC(Fp) algorithms security parameters dynamic arbitrary changing. Based on 0.18 micrometer standard cell-library, the area of the chip is only 42000 mum2. Simulation results of post-synthesis indicate that the maximum operating clock frequency is 103.8 MHz, the 1024-bit RSA Modular exponential operation period is about 45 ms, and the 192-bit ECC(Fp) point multiplication period is 17 ms on average.

  • APPT - Design and implementation of a high-speed reconfigurable Modular Arithmetic unit
    Lecture Notes in Computer Science, 1
    Co-Authors: Zibin Dai, Tao Chen, Tao Meng, Xuan Yang
    Abstract:

    A high-performance and dynamic reconfigurable Modular Arithmetic unit is presented, which provides full support to modulo 28/216/232 addition and modulo 232/216+1/232-1 multiplication operation. To save the hardware cost, we have adopted sharing technique to implement Modular multiplication operation, and then optimized each critical block. The design has been realized using Altera's FPGA. Synthesis, placement and routing of reconfigurable design have accomplished on 0.18µm SMIC process. The result proves that the propagation time of the critical path is 6.04ns. Compared with other designs, the reconfigurable Modular Arithmetic unit not only supports for diverse Modular Arithmetic in the block ciphers, but also provides IP Core for reconfigurable cryptographic system.

Yuta Sakai - One of the best experts on this subject based on the ideXlab platform.

  • Modular Arithmetic Erasure Channels and Their Multilevel Channel Polarization
    IEEE Transactions on Information Theory, 2020
    Co-Authors: Yuta Sakai, Kenichi Iwata, Hiroshi Fujisaki
    Abstract:

    This study proposes Modular Arithmetic erasure channels (MAECs), a novel class of erasure-like channels with an input alphabet that need not be binary. This class contains the binary erasure channel (BEC) and some other known erasure-like channels as special cases. For MAECs, we provide recursive formulas of Arikan-like polar transform to simulate channel polarization. In other words, we show that the synthetic channels of MAECs are equivalent to other MAECs. This is a generalization of well-known recursive formulas of the polar transform for BECs. Using our recursive formulas, we also show that a recursive application of the polar transform for MAECs results in multilevel channel polarization, which is an asymptotic phenomenon that is characteristic of non-binary polar codes. Specifically, we establish a method to calculate the limiting proportions of the partially noiseless and noisy channels that are generated as a result of multilevel channel polarization for MAECs. In the particular case of MAECs, this calculation method solves an open problem posed by Nasser (2017) in the study of non-binary polar codes.

  • Modular Arithmetic erasure channels and their multilevel channel polarization
    arXiv: Information Theory, 2018
    Co-Authors: Yuta Sakai, Kenichi Iwata, Hiroshi Fujisaki
    Abstract:

    This study proposes a novel channel model called the Modular Arithmetic erasure channel, which is a general type of arbitrary input erasure-like channels containing the binary erasure channel (BEC) and some other previously-known erasure-like channels. For this channel model, we give recursive formulas of Ar{\i}kan-like polar transforms to simulate its channel polarization easily. In other words, similar to the polar transforms for BECs, we show that the synthetic channels of Modular Arithmetic erasure channels are again equivalent to the same channel models with certain transition probabilities, which can be easily calculated by explicit recursive formulas. We also show that Ar{\i}kan-like polar transforms for Modular Arithmetic erasure channels behave multilevel channel polarization, which is a phenomenon appeared in the study of non-binary polar codes, and thus, Modular Arithmetic erasure channels are informative toy problems of multilevel channel polarization. Furthermore, as a solution of an open problem in non-binary polar codes for special cases, we solve exactly and algorithmically the limiting proportions of partially noiseless synthetic channels, called the asymptotic distribution of multilevel channel polarization, for Modular Arithmetic erasure channels.

Zibin Dai - One of the best experts on this subject based on the ideXlab platform.

  • APPT - Design and implementation of a high-speed reconfigurable Modular Arithmetic unit
    Lecture Notes in Computer Science, 1
    Co-Authors: Zibin Dai, Tao Chen, Tao Meng, Xuan Yang
    Abstract:

    A high-performance and dynamic reconfigurable Modular Arithmetic unit is presented, which provides full support to modulo 28/216/232 addition and modulo 232/216+1/232-1 multiplication operation. To save the hardware cost, we have adopted sharing technique to implement Modular multiplication operation, and then optimized each critical block. The design has been realized using Altera's FPGA. Synthesis, placement and routing of reconfigurable design have accomplished on 0.18µm SMIC process. The result proves that the propagation time of the critical path is 6.04ns. Compared with other designs, the reconfigurable Modular Arithmetic unit not only supports for diverse Modular Arithmetic in the block ciphers, but also provides IP Core for reconfigurable cryptographic system.