The Experts below are selected from a list of 33 Experts worldwide ranked by ideXlab platform

D.t. Rover - One of the best experts on this subject based on the ideXlab platform.

  • MASCOTS - A performance analysis framework for a system lifespan
    Proceedings 8th International Symposium on Modeling Analysis and Simulation of Computer and Telecommunication Systems (Cat. No.PR00728), 2000
    Co-Authors: D.b. Pierce, D.t. Rover
    Abstract:

    Assessing the performance of complex systems is important but difficult for all users in every phase of a system lifespan. Current performance analysis tools have proven successful but have not been widely used outside the laboratory. Laboratory-oriented analyses, queries and views, and rigid, insufficiently documented tool architectures create this situation. This paper presents a framework for addressing these limitations, including Multiple Abstraction Level analysis and an open software architecture to address these limitations. An examination of this framework illustrates its capabilities for varied analysis environments and users.

  • A performance analysis framework for a system lifespan
    Proceedings 8th International Symposium on Modeling Analysis and Simulation of Computer and Telecommunication Systems (Cat. No.PR00728), 2000
    Co-Authors: D.b. Pierce, D.t. Rover
    Abstract:

    Assessing the performance of complex systems is important but difficult for all users in every phase of a system lifespan. Current performance analysis tools have proven successful but have not been widely used outside the laboratory. Laboratory-oriented analyses, queries and views, and rigid, insufficiently documented tool architectures create this situation. This paper presents a framework for addressing these limitations, including Multiple Abstraction Level analysis and an open software architecture to address these limitations. An examination of this framework illustrates its capabilities for varied analysis environments and users.

Fawnizu Azmadi Hussin - One of the best experts on this subject based on the ideXlab platform.

  • ATS - Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level
    2019 IEEE 28th Asian Test Symposium (ATS), 2019
    Co-Authors: Hau Sim Choo, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Sreedharan Baskara Dass, Fawnizu Azmadi Hussin
    Abstract:

    Hardware Trojan refers to a malicious modification of an integrated circuit (IC). To eliminate the complications arising from designing an IC which includes a Trojan, it is suggested to apply Trojan detection as early as at register-transfer Level (RTL). In this paper, we propose a hardware Trojan detection framework which consists of both RTL and gate-Level classification using machine learning approaches to detect hardware Trojan inserted at RTL. In the experiment, all Trojan benchmarks were successfully identified without false positive detection on non-Trojan benchmark.

  • Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level
    2019 IEEE 28th Asian Test Symposium (ATS), 2019
    Co-Authors: Hau Sim Choo, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Sreedharan Baskara Dass, Fawnizu Azmadi Hussin
    Abstract:

    Hardware Trojan refers to a malicious modification of an integrated circuit (IC). To eliminate the complications arising from designing an IC which includes a Trojan, it is suggested to apply Trojan detection as early as at register-transfer Level (RTL). In this paper, we propose a hardware Trojan detection framework which consists of both RTL and gate-Level classification using machine learning approaches to detect hardware Trojan inserted at RTL. In the experiment, all Trojan benchmarks were successfully identified without false positive detection on non-Trojan benchmark.

D.b. Pierce - One of the best experts on this subject based on the ideXlab platform.

  • MASCOTS - A performance analysis framework for a system lifespan
    Proceedings 8th International Symposium on Modeling Analysis and Simulation of Computer and Telecommunication Systems (Cat. No.PR00728), 2000
    Co-Authors: D.b. Pierce, D.t. Rover
    Abstract:

    Assessing the performance of complex systems is important but difficult for all users in every phase of a system lifespan. Current performance analysis tools have proven successful but have not been widely used outside the laboratory. Laboratory-oriented analyses, queries and views, and rigid, insufficiently documented tool architectures create this situation. This paper presents a framework for addressing these limitations, including Multiple Abstraction Level analysis and an open software architecture to address these limitations. An examination of this framework illustrates its capabilities for varied analysis environments and users.

  • A performance analysis framework for a system lifespan
    Proceedings 8th International Symposium on Modeling Analysis and Simulation of Computer and Telecommunication Systems (Cat. No.PR00728), 2000
    Co-Authors: D.b. Pierce, D.t. Rover
    Abstract:

    Assessing the performance of complex systems is important but difficult for all users in every phase of a system lifespan. Current performance analysis tools have proven successful but have not been widely used outside the laboratory. Laboratory-oriented analyses, queries and views, and rigid, insufficiently documented tool architectures create this situation. This paper presents a framework for addressing these limitations, including Multiple Abstraction Level analysis and an open software architecture to address these limitations. An examination of this framework illustrates its capabilities for varied analysis environments and users.

Hau Sim Choo - One of the best experts on this subject based on the ideXlab platform.

  • ATS - Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level
    2019 IEEE 28th Asian Test Symposium (ATS), 2019
    Co-Authors: Hau Sim Choo, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Sreedharan Baskara Dass, Fawnizu Azmadi Hussin
    Abstract:

    Hardware Trojan refers to a malicious modification of an integrated circuit (IC). To eliminate the complications arising from designing an IC which includes a Trojan, it is suggested to apply Trojan detection as early as at register-transfer Level (RTL). In this paper, we propose a hardware Trojan detection framework which consists of both RTL and gate-Level classification using machine learning approaches to detect hardware Trojan inserted at RTL. In the experiment, all Trojan benchmarks were successfully identified without false positive detection on non-Trojan benchmark.

  • Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level
    2019 IEEE 28th Asian Test Symposium (ATS), 2019
    Co-Authors: Hau Sim Choo, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Sreedharan Baskara Dass, Fawnizu Azmadi Hussin
    Abstract:

    Hardware Trojan refers to a malicious modification of an integrated circuit (IC). To eliminate the complications arising from designing an IC which includes a Trojan, it is suggested to apply Trojan detection as early as at register-transfer Level (RTL). In this paper, we propose a hardware Trojan detection framework which consists of both RTL and gate-Level classification using machine learning approaches to detect hardware Trojan inserted at RTL. In the experiment, all Trojan benchmarks were successfully identified without false positive detection on non-Trojan benchmark.

Mehrdad Moghbel - One of the best experts on this subject based on the ideXlab platform.

  • ATS - Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level
    2019 IEEE 28th Asian Test Symposium (ATS), 2019
    Co-Authors: Hau Sim Choo, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Sreedharan Baskara Dass, Fawnizu Azmadi Hussin
    Abstract:

    Hardware Trojan refers to a malicious modification of an integrated circuit (IC). To eliminate the complications arising from designing an IC which includes a Trojan, it is suggested to apply Trojan detection as early as at register-transfer Level (RTL). In this paper, we propose a hardware Trojan detection framework which consists of both RTL and gate-Level classification using machine learning approaches to detect hardware Trojan inserted at RTL. In the experiment, all Trojan benchmarks were successfully identified without false positive detection on non-Trojan benchmark.

  • Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level
    2019 IEEE 28th Asian Test Symposium (ATS), 2019
    Co-Authors: Hau Sim Choo, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Sreedharan Baskara Dass, Fawnizu Azmadi Hussin
    Abstract:

    Hardware Trojan refers to a malicious modification of an integrated circuit (IC). To eliminate the complications arising from designing an IC which includes a Trojan, it is suggested to apply Trojan detection as early as at register-transfer Level (RTL). In this paper, we propose a hardware Trojan detection framework which consists of both RTL and gate-Level classification using machine learning approaches to detect hardware Trojan inserted at RTL. In the experiment, all Trojan benchmarks were successfully identified without false positive detection on non-Trojan benchmark.