The Experts below are selected from a list of 3 Experts worldwide ranked by ideXlab platform
Yuzi Kanazawa - One of the best experts on this subject based on the ideXlab platform.
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generation of yield embedded pareto front for simultaneous optimization of yield and performances
Design Automation Conference, 2010Co-Authors: Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya, Yuzi KanazawaAbstract:As the variations of shrunk processes increasing at rapid rate, the performances of analog/mixed-signal chips remarkably fluctuate. It is necessary to take the yield as a Design Objective in Design optimization. This paper presents a novel method to generate yield-embedded Pareto-front to simultaneously optimize both the yield and performances. Unlike the traditional approaches which generate the yield-aware Pareto-front to optimize performances for the fixed yield, this work embeds the yield as an Objective of the optimization and evolutionarily optimizes both yield and performances by the so-called yield-embedded NSGA. The experiments demonstrate the gradual evolutions and global searching for the better performances and higher yields under PVT variations. The generation accelerated by parallel computations gains 4.8x speedup with 80% efficiency.
Masato Yoshioka - One of the best experts on this subject based on the ideXlab platform.
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generation of yield embedded pareto front for simultaneous optimization of yield and performances
Design Automation Conference, 2010Co-Authors: Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya, Yuzi KanazawaAbstract:As the variations of shrunk processes increasing at rapid rate, the performances of analog/mixed-signal chips remarkably fluctuate. It is necessary to take the yield as a Design Objective in Design optimization. This paper presents a novel method to generate yield-embedded Pareto-front to simultaneously optimize both the yield and performances. Unlike the traditional approaches which generate the yield-aware Pareto-front to optimize performances for the fixed yield, this work embeds the yield as an Objective of the optimization and evolutionarily optimizes both yield and performances by the so-called yield-embedded NSGA. The experiments demonstrate the gradual evolutions and global searching for the better performances and higher yields under PVT variations. The generation accelerated by parallel computations gains 4.8x speedup with 80% efficiency.
Katsumi Homma - One of the best experts on this subject based on the ideXlab platform.
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generation of yield embedded pareto front for simultaneous optimization of yield and performances
Design Automation Conference, 2010Co-Authors: Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya, Yuzi KanazawaAbstract:As the variations of shrunk processes increasing at rapid rate, the performances of analog/mixed-signal chips remarkably fluctuate. It is necessary to take the yield as a Design Objective in Design optimization. This paper presents a novel method to generate yield-embedded Pareto-front to simultaneously optimize both the yield and performances. Unlike the traditional approaches which generate the yield-aware Pareto-front to optimize performances for the fixed yield, this work embeds the yield as an Objective of the optimization and evolutionarily optimizes both yield and performances by the so-called yield-embedded NSGA. The experiments demonstrate the gradual evolutions and global searching for the better performances and higher yields under PVT variations. The generation accelerated by parallel computations gains 4.8x speedup with 80% efficiency.
Toshiyuki Shibuya - One of the best experts on this subject based on the ideXlab platform.
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generation of yield embedded pareto front for simultaneous optimization of yield and performances
Design Automation Conference, 2010Co-Authors: Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya, Yuzi KanazawaAbstract:As the variations of shrunk processes increasing at rapid rate, the performances of analog/mixed-signal chips remarkably fluctuate. It is necessary to take the yield as a Design Objective in Design optimization. This paper presents a novel method to generate yield-embedded Pareto-front to simultaneously optimize both the yield and performances. Unlike the traditional approaches which generate the yield-aware Pareto-front to optimize performances for the fixed yield, this work embeds the yield as an Objective of the optimization and evolutionarily optimizes both yield and performances by the so-called yield-embedded NSGA. The experiments demonstrate the gradual evolutions and global searching for the better performances and higher yields under PVT variations. The generation accelerated by parallel computations gains 4.8x speedup with 80% efficiency.