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Balaji Prabhakar - One of the best experts on this subject based on the ideXlab platform.
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On the speedup required for combined input- and Output-Queued switching
Automatica, 1999Co-Authors: Balaji Prabhakar, Nick MckeownAbstract:Architectures based on a non-blocking fabric, such as a crosspoint switch, are attractive for use in high-speed LAN switches, IP routers, and ATM switches. When operating at the highest speed, memory bandwidth limitations dictate that queues be placed at the input of the switch. But it is well known that input-queueing can lead to low throughput, and does not allow the control of latency through the switch. This is in contrast to Output-Queueing which maximizes throughput and permits the accurate control of packet latency through scheduling. We ask the question: Can a switch with combined input and output queueing be designed to behave identically to an Output-Queued switch? In this paper, we prove that if the switch uses virtual output queueing and has an internal speedup of just four, it is possible for it to behave identically to an Output-Queued switch, regardless of the nature of the arriving traffic. Our proof is based on a novel scheduling algorithm, called Most Urgent Cell First. We find that with a speedup of four the most urgent cell first algorithm (or MUCFA) enables perfect emulation of a FIFO Output-Queued switch, i.e. one in which packets depart in the same order that they arrived. We extend this result to show that with a small modification, the MUCFA algorithm enables perfect emulation of a variety of output scheduling policies, including strict priorities and weighted fair-queueing. This result makes possible switches that perform as if they were Output-Queued, yet use memories that run more slowly.
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Matching output queueing with a combined input/Output-Queued switch
IEEE Journal on Selected Areas in Communications, 1999Co-Authors: Shang-tse Chuang, Nick Mckeown, Ashish Goel, Balaji PrabhakarAbstract:The Internet is facing two problems simultaneously: there is a need for a faster switching/routing infrastructure and a need to introduce guaranteed qualities-of-service (QoS). Each problem can be solved independently: switches and routers can be made faster by using input-queued crossbars instead of shared memory systems; QoS can be provided using weighted-fair queueing (WFQ)-based packet scheduling. Until now, however, the two solutions have been mutually exclusive-all of the work on WFQ-based scheduling algorithms has required that switches/routers use Output-Queueing or centralized shared memory. This paper demonstrates that a combined input/Output-Queueing (CIOQ) switch running twice as fast as an input-queued switch can provide precise emulation of a broad class of packet-scheduling algorithms, including WFQ and strict priorities. More precisely, we show that for an N/spl times/N switch, a "speedup" of 2-1/N is necessary, and a speedup of two is sufficient for this exact emulation. Perhaps most interestingly, this result holds for all traffic arrival patterns. On its own, the result is primarily a theoretical observation; it shows that it is possible to emulate purely OQ switches with CIOQ switches running at approximately twice the line rate. To make the result more practical, we introduce several scheduling algorithms that with a speedup of two can emulate an OQ switch. We focus our attention on the simplest of these algorithms, critical cells first (CCF), and consider its running time and implementation complexity. We conclude that additional techniques are required to make the scheduling algorithms implementable at a high speed and propose two specific strategies.
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INFOCOM - Matching output queueing with a combined input output queued switch
IEEE INFOCOM '99. Conference on Computer Communications. Proceedings. Eighteenth Annual Joint Conference of the IEEE Computer and Communications Socie, 1999Co-Authors: Shang-tse Chuang, Nick Mckeown, Ashish Goel, Balaji PrabhakarAbstract:The Internet is facing two problems simultaneously: there is a need for a faster switching/routing infrastructure, and a need to introduce guaranteed qualities of service (QoS). Each problem can be solved independently: switches and routers can be made faster by using input-queued crossbars, instead of shared memory systems; and QoS can be provided using WFQ-based packet scheduling. However, until now, the two solutions have been mutually exclusive-all of the work on WFQ-based scheduling algorithms has required that switches/routers use Output-Queueing, or centralized shared memory. This paper demonstrates that a combined input output queueing (CIOQ) switch running twice as fast as an input-queued switch can provide precise emulation of a broad class of packet scheduling algorithms, including WFQ and strict priorities. More precisely, we show that a "speedup" of 2 is sufficient, and a speedup of 2-1/N is necessary, for this exact emulation. We introduce a variety of algorithms that configure the crossbar so that emulation is achieved with a speedup of two, and consider their running time and implementation complexity. An interesting feature of our work is that the exact emulation holds for all input traffic patterns. We believe that, in the future, these results will make possible the support of QoS in very high bandwidth routers.
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Stochastic analysis of stable marriages in combined input output queued switches
Proceedings of the 38th IEEE Conference on Decision and Control (Cat. No.99CH36304), 1Co-Authors: Ashish Goel, Balaji PrabhakarAbstract:Output queued switches with N input and output ports require up to N serial memory operations per time slot (taken to be the time between packet arrivals at an input). Given the high and increasing processor/memory gap, it is important to shift the bottleneck from memory to processor in order to obtain scalable architectures. It has recently been demonstrated that most output queued switches can be emulated using combined input output queued switches which require O(N) processor operations and a small, constant number of memory operations, thus moving the performance bottleneck from memory to processor. These bounds hold against all, even adversarial, traffic patterns. We analyze the scheduling algorithms used by Chuang et al. (1999) and Prabhakar et al. to obtain the above results when the input traffic is stochastic. We prove that if the queue size at each output port in the output queued switch being emulated has an exponential tail, then the above algorithms need just O(logN) processor operations with high probability.
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On the speedup required for combined input and output queued switching
Proceedings. 1998 IEEE International Symposium on Information Theory (Cat. No.98CH36252), 1Co-Authors: Balaji Prabhakar, Nick MckeownAbstract:Architectures based on a non-blocking fabric, such as a crosspoint switch, are attractive for use in high-speed LAN switches, ATM switches and IP routers. These fabrics, coupled with memory bandwidth limitations, dictate that queues be placed at the input of the switch. But it is well known that input-queueing can lead to low throughput, and does not allow the control of latency through the switch. This is in contrast to Output-Queueing, which maximizes throughput, and permits the accurate control of packet latency through scheduling. We ask the question: can a switch with combined input and output queueing be designed to behave identically to an Output-Queued switch? In this paper, we prove that if the switch uses virtual output queueing, and has an internal speedup of just four, it is possible for it to behave identically to an output queued switch, regardless of the nature of the arriving traffic. Our proof is based on a novel scheduling algorithm, known as most urgent cell first. This result makes possible switches that perform as if they were Output-Queued, yet use memories that run more slowly.
Nick Mckeown - One of the best experts on this subject based on the ideXlab platform.
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the islip scheduling algorithm for input queued switches
IEEE ACM Transactions on Networking, 1999Co-Authors: Nick MckeownAbstract:An increasing number of high performance internetworking protocol routers, LAN and asynchronous transfer mode (ATM) switches use a switched backplane based on a crossbar switch. Most often, these systems use input queues to hold packets waiting to traverse the switching fabric. It is well known that if simple first in first out (FIFO) input queues are used to hold packets then, even under benign conditions, head-of-line (HOL) blocking limits the achievable bandwidth to approximately 58.6% of the maximum. HOL blocking can be overcome by the use of virtual output queueing, which is described in this paper. A scheduling algorithm is used to configure the crossbar switch, deciding the order in which packets will be served. Previous results have shown that with a suitable scheduling algorithm, 100% throughput can be achieved. In this paper, we present a scheduling algorithm called iSLIP. An iterative, round-robin algorithm, iSLIP can achieve 100% throughput for uniform traffic, yet is simple to implement in hardware. Iterative and noniterative versions of the algorithms are presented, along with modified versions for prioritized traffic. Simulation results are presented to indicate the performance of iSLIP under benign and bursty traffic conditions. Prototype and commercial implementations of iSLIP exist in systems with aggregate bandwidths ranging from 50 to 500 Gb/s. When the traffic is nonuniform, iSLIP quickly adapts to a fair scheduling policy that is guaranteed never to starve an input queue. Finally, we describe the implementation complexity of iSLIP. Based on a two-dimensional (2-D) array of priority encoders, single-chip schedulers have been built supporting up to 32 ports, and making approximately 100 million scheduling decisions per second.
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On the speedup required for combined input- and Output-Queued switching
Automatica, 1999Co-Authors: Balaji Prabhakar, Nick MckeownAbstract:Architectures based on a non-blocking fabric, such as a crosspoint switch, are attractive for use in high-speed LAN switches, IP routers, and ATM switches. When operating at the highest speed, memory bandwidth limitations dictate that queues be placed at the input of the switch. But it is well known that input-queueing can lead to low throughput, and does not allow the control of latency through the switch. This is in contrast to Output-Queueing which maximizes throughput and permits the accurate control of packet latency through scheduling. We ask the question: Can a switch with combined input and output queueing be designed to behave identically to an Output-Queued switch? In this paper, we prove that if the switch uses virtual output queueing and has an internal speedup of just four, it is possible for it to behave identically to an Output-Queued switch, regardless of the nature of the arriving traffic. Our proof is based on a novel scheduling algorithm, called Most Urgent Cell First. We find that with a speedup of four the most urgent cell first algorithm (or MUCFA) enables perfect emulation of a FIFO Output-Queued switch, i.e. one in which packets depart in the same order that they arrived. We extend this result to show that with a small modification, the MUCFA algorithm enables perfect emulation of a variety of output scheduling policies, including strict priorities and weighted fair-queueing. This result makes possible switches that perform as if they were Output-Queued, yet use memories that run more slowly.
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Matching output queueing with a combined input/Output-Queued switch
IEEE Journal on Selected Areas in Communications, 1999Co-Authors: Shang-tse Chuang, Nick Mckeown, Ashish Goel, Balaji PrabhakarAbstract:The Internet is facing two problems simultaneously: there is a need for a faster switching/routing infrastructure and a need to introduce guaranteed qualities-of-service (QoS). Each problem can be solved independently: switches and routers can be made faster by using input-queued crossbars instead of shared memory systems; QoS can be provided using weighted-fair queueing (WFQ)-based packet scheduling. Until now, however, the two solutions have been mutually exclusive-all of the work on WFQ-based scheduling algorithms has required that switches/routers use Output-Queueing or centralized shared memory. This paper demonstrates that a combined input/Output-Queueing (CIOQ) switch running twice as fast as an input-queued switch can provide precise emulation of a broad class of packet-scheduling algorithms, including WFQ and strict priorities. More precisely, we show that for an N/spl times/N switch, a "speedup" of 2-1/N is necessary, and a speedup of two is sufficient for this exact emulation. Perhaps most interestingly, this result holds for all traffic arrival patterns. On its own, the result is primarily a theoretical observation; it shows that it is possible to emulate purely OQ switches with CIOQ switches running at approximately twice the line rate. To make the result more practical, we introduce several scheduling algorithms that with a speedup of two can emulate an OQ switch. We focus our attention on the simplest of these algorithms, critical cells first (CCF), and consider its running time and implementation complexity. We conclude that additional techniques are required to make the scheduling algorithms implementable at a high speed and propose two specific strategies.
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INFOCOM - Matching output queueing with a combined input output queued switch
IEEE INFOCOM '99. Conference on Computer Communications. Proceedings. Eighteenth Annual Joint Conference of the IEEE Computer and Communications Socie, 1999Co-Authors: Shang-tse Chuang, Nick Mckeown, Ashish Goel, Balaji PrabhakarAbstract:The Internet is facing two problems simultaneously: there is a need for a faster switching/routing infrastructure, and a need to introduce guaranteed qualities of service (QoS). Each problem can be solved independently: switches and routers can be made faster by using input-queued crossbars, instead of shared memory systems; and QoS can be provided using WFQ-based packet scheduling. However, until now, the two solutions have been mutually exclusive-all of the work on WFQ-based scheduling algorithms has required that switches/routers use Output-Queueing, or centralized shared memory. This paper demonstrates that a combined input output queueing (CIOQ) switch running twice as fast as an input-queued switch can provide precise emulation of a broad class of packet scheduling algorithms, including WFQ and strict priorities. More precisely, we show that a "speedup" of 2 is sufficient, and a speedup of 2-1/N is necessary, for this exact emulation. We introduce a variety of algorithms that configure the crossbar so that emulation is achieved with a speedup of two, and consider their running time and implementation complexity. An interesting feature of our work is that the exact emulation holds for all input traffic patterns. We believe that, in the future, these results will make possible the support of QoS in very high bandwidth routers.
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a practical scheduling algorithm to achieve 100 throughput in input queued switches
International Conference on Computer Communications, 1998Co-Authors: Adisak Mekkittikul, Nick MckeownAbstract:Input queueing is becoming increasingly used for high-bandwidth switches and routers. In previous work, it was proved that it is possible to achieve 100% throughput for input-queued switches using a combination of virtual output queueing and a scheduling algorithm called LQF However, this is only a theoretical result: LQF is too complex to implement in hardware. We introduce a new algorithm called longest port first (LPF), which is designed to overcome the complexity problems of LQF, and can be implemented in hardware at high speed. By giving preferential service based on queue lengths, we prove that LPF can achieve 100% throughput.
I. Elhanany - One of the best experts on this subject based on the ideXlab platform.
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On the performance of output queued cell switches with non-uniformly distributed bursty arrivals
IEE Proceedings - Communications, 2006Co-Authors: I. Elhanany, B. MatthewsAbstract:A novel performance analysis of output queued cell switches that are introduced with general independent heterogeneous traffic is presented. Random arbitration is employed whereby non-empty queues compete equally for service within each switching interval. In particular, the case of bursty two-state Markov-modulated arrivals is studied in which input ports generate bursty streams that are non-uniformly distributed. Under the assumption of a memoryless server, the probability generating function of the interarrival process is utilised to derive an approximation for the queue size distribution. The methodology established forms a flexible tool in obtaining bounds on the behaviour and expected performance characteristics of output queued switches under a wide range of correlated traffic scenarios. The validity of the analytical inference is established through simulation results.
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Analysis of non-uniform cell destination distribution in virtual output queueing systems
IEEE Communications Letters, 2002Co-Authors: I. Elhanany, Dan SadotAbstract:We develop a discrete-time analytical queueing model for studying the performance of input-queued switches with non-uniform cell destination distribution. Virtual output queues are assumed at the ingress ports where cell arrivals are geometrically distributed and the service process is based on a work conserving random selection scheme. We consider the conditions for stability as basis for deriving closed-form expressions for the stationary queue size distributions from which the mean queue sizes and mean cell latencies are derived. We show that a very good agreement is obtained between simulation and analytical results.
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GLOBECOM - Analysis of output queued cell switches with random arbitration and generic arrival processes
GLOBECOM '03. IEEE Global Telecommunications Conference (IEEE Cat. No.03CH37489), 1Co-Authors: I. ElhananyAbstract:The paper presents an analysis of output queued cell switches which are introduced with generic non-uniformly distributed traffic. Random arbitration is employed whereby non-empty queues compete equally for service within each switching interval. In particular, we study the case of two-state Markov-modulated arrivals in which input ports generate bursty streams that are non-uniformly distributed. Under the assumption of a memoryless server, the probability generating function of the interarrival process is utilized to derive closed-form expressions for the queue size distribution. The methodology established forms a flexible tool in determining bounds on the behavior and expected performance of output queued switches under a range of traffic scenarios. The validity of the analytical inference is established through simulation results.
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A performance study of virtual output queued switches with heterogeneous bursty traffic
Workshop on High Performance Switching and Routing 2003 HPSR., 1Co-Authors: I. Elhanany, M. Kahane, Dan SadotAbstract:Virtual output queueing (VOQ) is a widely deployed buffering scheme in high-performance input-queued switches and routers. While there has been extensive investigation of the performance of switch architectures employing VOQ, the majority of the work addresses traffic that is uncorrelated and uniformly distributed among the outputs. The paper presents analysis for discrete-time virtual output queued switches with incoming traffic governed by a Markov modulated ON/OFF process, whereby bursts are non-uniformly distributed among the various destinations. Under the assumption of geometrically distributed interservice times, we utilize the probability generating functions of the interarrival times to obtain per-queue closed-form expressions for the mean queue occupancy and mean delay. The validity of the analytical inference is established through simulation results.
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ICC - On uniformly distributed on/off arrivals in virtual output queued switches with geometric service times
IEEE International Conference on Communications 2003. ICC '03., 1Co-Authors: I. Elhanany, M. Kahane, Dan SadotAbstract:Virtual queueing is commonly deployed as a buffering technique in high-performance input-queued switch architectures. This paper presents the analysis for discrete-time virtual output queued switches with incoming traffic governed by a uniformly distributed Markov modulated on/off process, and geometrically distributed service times. We utilize the k-step first-passage time probability matrix to derive the probability generating function of the inter-arrival times distribution. Based on the latter, closed-form expressions for the queue size distribution and mean delay are obtained. The validity of the analysis is established through computer simulations.
Ashish Goel - One of the best experts on this subject based on the ideXlab platform.
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INFOCOM - Matching output queueing with a combined input output queued switch
IEEE INFOCOM '99. Conference on Computer Communications. Proceedings. Eighteenth Annual Joint Conference of the IEEE Computer and Communications Socie, 1999Co-Authors: Shang-tse Chuang, Nick Mckeown, Ashish Goel, Balaji PrabhakarAbstract:The Internet is facing two problems simultaneously: there is a need for a faster switching/routing infrastructure, and a need to introduce guaranteed qualities of service (QoS). Each problem can be solved independently: switches and routers can be made faster by using input-queued crossbars, instead of shared memory systems; and QoS can be provided using WFQ-based packet scheduling. However, until now, the two solutions have been mutually exclusive-all of the work on WFQ-based scheduling algorithms has required that switches/routers use Output-Queueing, or centralized shared memory. This paper demonstrates that a combined input output queueing (CIOQ) switch running twice as fast as an input-queued switch can provide precise emulation of a broad class of packet scheduling algorithms, including WFQ and strict priorities. More precisely, we show that a "speedup" of 2 is sufficient, and a speedup of 2-1/N is necessary, for this exact emulation. We introduce a variety of algorithms that configure the crossbar so that emulation is achieved with a speedup of two, and consider their running time and implementation complexity. An interesting feature of our work is that the exact emulation holds for all input traffic patterns. We believe that, in the future, these results will make possible the support of QoS in very high bandwidth routers.
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Matching output queueing with a combined input/Output-Queued switch
IEEE Journal on Selected Areas in Communications, 1999Co-Authors: Shang-tse Chuang, Nick Mckeown, Ashish Goel, Balaji PrabhakarAbstract:The Internet is facing two problems simultaneously: there is a need for a faster switching/routing infrastructure and a need to introduce guaranteed qualities-of-service (QoS). Each problem can be solved independently: switches and routers can be made faster by using input-queued crossbars instead of shared memory systems; QoS can be provided using weighted-fair queueing (WFQ)-based packet scheduling. Until now, however, the two solutions have been mutually exclusive-all of the work on WFQ-based scheduling algorithms has required that switches/routers use Output-Queueing or centralized shared memory. This paper demonstrates that a combined input/Output-Queueing (CIOQ) switch running twice as fast as an input-queued switch can provide precise emulation of a broad class of packet-scheduling algorithms, including WFQ and strict priorities. More precisely, we show that for an N/spl times/N switch, a "speedup" of 2-1/N is necessary, and a speedup of two is sufficient for this exact emulation. Perhaps most interestingly, this result holds for all traffic arrival patterns. On its own, the result is primarily a theoretical observation; it shows that it is possible to emulate purely OQ switches with CIOQ switches running at approximately twice the line rate. To make the result more practical, we introduce several scheduling algorithms that with a speedup of two can emulate an OQ switch. We focus our attention on the simplest of these algorithms, critical cells first (CCF), and consider its running time and implementation complexity. We conclude that additional techniques are required to make the scheduling algorithms implementable at a high speed and propose two specific strategies.
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Stochastic analysis of stable marriages in combined input output queued switches
Proceedings of the 38th IEEE Conference on Decision and Control (Cat. No.99CH36304), 1Co-Authors: Ashish Goel, Balaji PrabhakarAbstract:Output queued switches with N input and output ports require up to N serial memory operations per time slot (taken to be the time between packet arrivals at an input). Given the high and increasing processor/memory gap, it is important to shift the bottleneck from memory to processor in order to obtain scalable architectures. It has recently been demonstrated that most output queued switches can be emulated using combined input output queued switches which require O(N) processor operations and a small, constant number of memory operations, thus moving the performance bottleneck from memory to processor. These bounds hold against all, even adversarial, traffic patterns. We analyze the scheduling algorithms used by Chuang et al. (1999) and Prabhakar et al. to obtain the above results when the input traffic is stochastic. We prove that if the queue size at each output port in the output queued switch being emulated has an exponential tail, then the above algorithms need just O(logN) processor operations with high probability.
Seung-woo Seo - One of the best experts on this subject based on the ideXlab platform.
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Matching output queueing with a multiple input/Output-Queued switch
IEEE ACM Transactions on Networking, 2006Co-Authors: Hyoung-ii Lee, Seung-woo SeoAbstract:We have previously proposed an efficient switch architecture called multiple input/Output-Queued (MIOQ) switch and showed that the MIOQ switch can match the performance of an Output-Queued switch statistically. In this paper, we prove theoretically that the MIOQ switch can match the output queueing exactly, not statistically, with no speedup of any component. More specifically, we show that the MIOQ switch with two parallel switches (which we call a parallel MIOQ (PMIOQ) switch in this paper) can provide exact emulation of an Output-Queued switch with a broad class of service scheduling algorithms including FIFO, weighted fair queueing (WFQ) and strict priority queueing regardless of incoming traffic pattern and switch size.To do that, we first propose the stable strategic alliance (SSA) algorithm that can produce a stable many-to-many assignment, and prove its finite, stable and deterministic properties. Next, we apply the SSA algorithm to the scheduling of a PMIOQ switch with two parallel switches, and show that the stability condition of the SSA algorithm guarantees for the PMIOQ switch to emulate an Output-Queued switch exactly. To avoid possible conflicts in a parallel switch, each input-output pair matched by the SSA algorithm must be mapped to one of two crossbar switches. For this mapping, we also propose a simple algorithm that requires at most 2N steps for all matched input-output pairs. In addition, to relieve the implementation burden of N input buffers being accessed simultaneously, we propose a buffering scheme called redundant buffering which requires two memory devices instead of N physically-separate memories. In conclusion, we demonstrate that the MIOQ switch requires two crossbar switches in parallel and two physical memories at each input and output to emulate an Output-Queued switch with no speedup of any component.
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A practical approach for statistical matching of output queueing
IEEE Journal on Selected Areas in Communications, 2003Co-Authors: Hyoung-il Lee, Seung-woo SeoAbstract:We study a practical approach to match the performance of an Output-Queued switch statistically. For this purpose, we propose a novel switching architecture called a multiple input/Output-Queued (MIOQ) switch that requires no speedup for providing sufficient switching bandwidth. To operate an MIOQ switch in a practical manner, we also propose a multitoken-based arbiter which schedules the switch at a high operation rate and a virtual first-in first-out queueing scheme which guarantees the departure order of cells belonging to the same traffic flow at output. Additionally, we show that the proposed switch can naturally provide asymmetric bandwidth for inputs and outputs, which may be important in dealing with the links with different bandwidth demands. Finally, we compare the performance of an MIOQ switch with that of an Output-Queued switch and discuss the design criteria to match the performance of an Output-Queued switch.
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ICC - A practical approach for statistical matching of output queueing
IEEE International Conference on Communications 2003. ICC '03., 1Co-Authors: Hyoung-il Lee, Seung-woo SeoAbstract:In this paper, we study a practical approach to match the performance of an Output-Queued switch statistically. For this purpose, we propose a novel switching architecture called a multiple input/Output-Queued (MIOQ) switch that requires no speedup for providing sufficient switching bandwidth. To operate an MIOQ switch in a practical manner, we also propose a multi-token-based arbiter which schedules the switch at a high operation rate and a virtual FIFO queueing scheme which guarantees the departure order of cells belonging to the same traffic flow at output. Additionally, we show that the proposed switch can naturally provide symmetric bandwidth for dealing with the links with different bandwidth demands. Finally, we compare the performance of an MIOQ switch with that of an Output-Queued switch and discuss the design criteria to match the performance of an Output-Queued switch.
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INFOCOM - Matching output queueing with a multiple input/Output-Queued switch
IEEE INFOCOM 2004, 1Co-Authors: Hyoung-ii Lee, Seung-woo SeoAbstract:We show that the multiple input/Output-Queued (MlOQ) switch proposed in our previous paper H. I. Lee and S. W. Seo (May 2003) can emulate an Output-Queued switch only with two parallel switches. The MIOQ switch requires no speedup and provides an exact emulation of an Output-Queued switch with a broad class of service scheduling algorithms including FIFO, weighted fair queueing (WFQ) and strict priority queueing regardless of incoming traffic pattern and switch size. First, we show that an N /spl times/ N MIOQ switch with a (2, 2)-dimensional crossbar fabric can exactly emulate an N /spl times/ N Output-Queued switch. For this purpose, we propose the stable strategic alliance (SSA) algorithm that can produce a stable many-to-many assignment, and then apply it to the scheduling of an MIOQ switch. Next, we prove that a (2, 2)-dimensional crossbar fabric can be implemented by two N /spl times/ N crossbar switches in parallel for an N /spl times/ N MIOQ switch. For a proper operation of two crossbar switches in parallel, each input-output pair matched by the SSA algorithm must be mapped to one of two crossbar switches. For this mapping, we propose a simple algorithm that requires at most 2N steps for all matched input-output pairs. In addition, to relieve the implementation burden of N input buffers being accessed simultaneously, we propose a buffering scheme called redundant buffering which requires two memory devices instead of N physically-separate memories.