The Experts below are selected from a list of 2805 Experts worldwide ranked by ideXlab platform
Keren Bergman - One of the best experts on this subject based on the ideXlab platform.
-
Design Space Exploration of Microring Resonators in Silicon Photonic Interconnects: Impact of the Ring Curvature
Journal of Lightwave Technology, 2018Co-Authors: Meisam Bahadori, Robert Polster, Sebastien Rumley, Mahdi Nikdast, Liang Yuan Dai, Natalie Janosik, Thomas Van Vaerenbergh, Alexander Gazman, Qixiang Cheng, Keren BergmanAbstract:A detailed analysis of fundamental tradeoffs between ring radius and coupling gap size is presented to draw realistic borders of the possible design space for microring resonators (MRRs). The coupling coefficient for the ring-waveguide structure is estimated based on an integration of the nonuniform gap between the ring and the waveguide. Combined with the supermode analysis of two coupled waveguides, this approach is further expanded into a closed-form equation that describes the coupling strength. This equation permits to evaluate how the distance separating a waveguide from a ring resonator, and the ring radius, affect coupling. The effect of ring radius on the bending loss of the ring is furthermore modeled based on the measurements for silicon MRRs with different radii. These compact models for coupling and loss are subsequently used to derive the main optical properties of MRRs, such as 3-dB optical bandwidth, extinction ratio of resonance, and insertion loss, hence identifying the design space. Our results indicate that the design space for add-drop filters in a wavelength division multiplexed link is currently limited to 5-10 μm in radius and gap sizes ranging from 120 to 210 nm. The good agreement between the results from the proposed compact model for coupling and the numerical FDTD and experimental measurements indicate the application of our approach in realizing fast and efficient design space exploration of MRRs in silicon Photonic Interconnects.
-
comprehensive design space exploration of silicon Photonic Interconnects
Journal of Lightwave Technology, 2016Co-Authors: Meisam Bahadori, Sebastien Rumley, Dessislava Nikolova, Keren BergmanAbstract:The paper presents a comprehensive physical layer design and modeling platform for silicon Photonic Interconnects. The platform is based on explicit closed-form expressions for optical power penalties, derived for both signal-dependent and signal-independent noise contexts. Our models agree well with reported experimental measurements. We show how the modeling approach is used for the design space exploration of silicon Photonic links and can be leveraged to optimize the wavelength-division multiplexed (WDM) capacity, evaluate the scalability, and study the sensitivity of the system to key device parameters. We apply the methodology to the design of microring-based silicon Photonic links, including an evaluation of the impairments associated with cascaded ring modulators, as well as the spectral distortion and crosstalk effects of demultiplexer ring arrays for nonreturn-to-zero (NRZ) ON–OFF keying (OOK) modulated WDM signals. We show that the total capacity of a chip-to-chip microring-based WDM silicon Photonic link designed with recently reported interconnect device parameters can approach 2 Tb/s realized with NRZ-OOK data modulation and 45 wavelengths each modulated at 45 Gb/s.
-
energy bandwidth design exploration of silicon Photonic Interconnects in 65nm cmos
IEEE Optical Interconnects Conference, 2016Co-Authors: Meisam Bahadori, Robert Polster, Sebastien Rumley, Yvain Thonnart, Joseluis Gonzalezjimenez, Keren BergmanAbstract:Exploration of energy-bandwidth tradeoffs is performed for a silicon Photonic link, showing a maximum capacity of 1.9 Tb/s with an energy cost of 1.54 pJ/bit at 13 Gb/s signaling rate. We conclude that 10 Gb/s yields a good trade-off between throughput and energy efficiency.
-
Photonic network on chip architectures using multilayer deposited silicon materials for high performance chip multiprocessors
ACM Journal on Emerging Technologies in Computing Systems, 2011Co-Authors: Aleksandr Biberman, Johnnie Chan, Gilbert Hendry, Kyle Preston, Nicolas Sherwooddroz, Jacob S Levy, Michal Lipson, Keren BergmanAbstract:Integrated Photonics has been slated as a revolutionary technology with the potential to mitigate the many challenges associated with on- and off-chip electrical interconnection networks. To date, all proposed chip-scale Photonic Interconnects have been based on the crystalline silicon platform for CMOS-compatible fabrication. However, maintaining CMOS compatibility does not preclude the use of other CMOS-compatible silicon materials such as silicon nitride and polycrystalline silicon. In this work, we investigate utilizing devices based on these deposited materials to design Photonic networks with multiple layers of Photonic devices. We apply rigorous device optimization and insertion loss analysis on various network architectures, demonstrating that multilayer Photonic networks can exhibit dramatically lower total insertion loss, enabling unprecedented bandwidth scalability. We show that significant improvements in waveguide propagation and waveguide crossing insertion losses resulting from using these materials enables the realization of topologies that were previously not feasible using only the single-layer crystalline silicon approaches.
-
architectural design exploration of chip scale Photonic interconnection networks using physical layer analysis
Optical Fiber Communication Conference, 2010Co-Authors: Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, Keren BergmanAbstract:Chip-scale Photonic interconnection networks have emerged as a promising technology solution that can address many of the scalability challenges facing the communication networks in next-generation high-performance multicore processors. Photonic Interconnects can offer significantly higher bandwidth density, lower latencies, and better energy efficiency. Even though Photonics exhibits these inherent advantages over electronics, the network designs that can successfully leverage these benefits cannot be straightforwardly extracted from typical electronic network methodologies and must consider the many unique physical-layer constraints of optical technologies. We conduct an architectural exploration of four chip-scale Photonic interconnection networks in a novel simulation environment, measuring insertion loss, crosstalk, and power. We also explain and demonstrate the impact of these physical-layer metrics on the scalability, performance, and realizability of each design.
Raymond G Beausoleil - One of the best experts on this subject based on the ideXlab platform.
-
energy efficiency analysis of frequency comb sources for silicon Photonic Interconnects
IEEE Optical Interconnects Conference, 2019Co-Authors: Anthony Rizzo, Marco Fiorentino, Raymond G Beausoleil, Thomas Van Vaerenbergh, Yanir London, Geza Kurczveil, Ashkan M Seyedi, Daniil A Livshits, Keren BersmanAbstract:We present a procedure for modeling the energy efficiency of frequency comb sources based on empirical device measurements. The proposed methodology allows for rapid exploration of the joint source-link design space to identify valid configurations that minimize the energy consumption of the link.
-
An Energy-Efficient Silicon Microring Resonator-Based Photonic Transmitter
2016Co-Authors: Chinhui Chen, Binhao Wang, Marco Fiorentino, Raymond G Beausoleil, Samuel PalermoAbstract:h OPTICAL CHANNELS ARE potential candidates to replace conventional electrical channels for effi-cient interchip and intrachip Interconnects due to their attractive properties: flat channel loss over a wide frequency range and strong immunity to cross-talk and electromagnetic noise. An important feature of optical Interconnects is the ability to com-bine multiple data channels on a single waveguide via wavelength division multiplexing (WDM) to greatly improve bandwidth density and amortize connector costs over high aggregate bandwidth. To take full advantage of these benefits, silicon Photonic platforms are being developed that enable tightly integrated optical Interconnects and novel Photonic network architectures. One promising pho-tonic device is the silicon microring resonator [1], [2] which can be configured either as an optical modulator or a WDM drop filter. Silicon ring resonator modulators and filters offer the advantages of small size rela-tive to Mach–Zehnder modulators (MZMs), and increased filter func-tionality relative to electro-absorption modulators. This paper presents silicon ring resonator-based Photonic transmitter prototypes that address the limited intrinsic bandwidth of carrier-injection ring mod-ulators, achieving energy-efficient high-speed opti-cal modulation in a compact silicon area suitable for on-chip WDM Interconnects. Silicon microring resonator-based Photonic WDM link Silicon microring resonator-based Photonic links provide a unique opportunity to deliver distance-independent connectivity whose pin bandwidth scales with the degree of WDM. As Figure 1 shows, multiple wavelengths generated by an off-chip continuous-wave (CW) laser are coupled into a silicon waveguide via a grating coupler. This off-chip laser can be either a distributed feedback (DFB) la-ser bank (which consists of an array of DFB laser diodes) or a comb laser [3] (which can generate multiple wavelengths simultaneously). Implement-ing a DFB laser bank for dense WDM (DWDM) Photonic Interconnects (for example, using 64 wavelengths) is quite challenging due to area and power budget constraints. A possible alternative is a single broad-spectrum comb laser source, such as an indium arsenid
-
an energy efficient silicon microring resonator based Photonic transmitter
IEEE Design & Test of Computers, 2014Co-Authors: Chinhui Chen, Samuel Palermo, Binhao Wang, Marco Fiorentino, Raymond G BeausoleilAbstract:Silicon microring resonator-based Photonic Interconnects offer an attractive substitute to conventional electrical Interconnects due to the negligible frequency-dependent channel loss and high bandwidth density offered via wavelength division multiplexing (WDM). This paper presents silicon Photonic transmitters employing ring modulators designed in a 130-nm SOI process wire bonded with CMOS drivers in a 1-V standard 65-nm CMOS technology. The transmitter circuits incorporate high-swing ( $2V_{pp}$ and $4V_{pp}$ ) drivers with nonlinear pre-emphasis to bypass the bandwidth limitation of the carrier-injection silicon ring modulator. The first-generation silicon ring modulator wire bonded with $4V_{pp}$ CMOS driver achieves 12.7-dB extinction ratio at 5 Gb/s with 4.04-mW power consumption, while the second-generation ring modulator wire bonded with $2V_{pp}$ CMOS driver achieves 9.2-dB extinction ratio at 9 Gb/s with 4.32 mW. Both of these measurements exclude the laser power.
-
silicon Photonic transceiver circuits with microring resonator bias based wavelength stabilization in 65 nm cmos
IEEE Journal of Solid-state Circuits, 2014Co-Authors: Cheng Li, Chinhui Chen, Binhao Wang, Marco Fiorentino, Raymond G Beausoleil, Ayman Shafik, Ehsan Zhian Tabasy, Geng Tang, Zhen Peng, Patrick ChiangAbstract:Photonic Interconnects are a promising technology to meet the bandwidth demands of next-generation high-performance computing systems. This paper presents silicon Photonic transceiver circuits for a microring resonator-based optical interconnect architecture in a 1 V standard 65 nm CMOS technology. The transmitter circuits incorporate high-swing ( $2{\rm V}_{{\rm pp}}$ and $4{\rm V}_{{\rm pp}})$ drivers with nonlinear pre-emphasis and automatic bias-based tuning for resonance wavelength stabilization. An optical forwarded-clock adaptive inverter-based transimpedance amplifier (TIA) receiver trades off power for varying link budgets by employing an on-die eye monitor and scaling the TIA supply for the required sensitivity. At 5 Gb/s operation, the $4{\rm V}_{{\rm pp}}$ transmitter achieves 12.7 dB extinction ratio with 4.04 mW power consumption, excluding laser power, when driving wire-bonded modulators designed in a 130 nm SOI process, while a 0.28 nm tuning range is obtained at 6.8 $\mu$ W/GHz efficiency with the bias-based tuning scheme implemented with the $2{\rm V}_{{\rm pp}}$ transmitter. When tested with a wire-bonded 150 fF p-i-n photodetector, the receiver achieves ${-}$ 9 dBm sensitivity at a ${\rm BER}=10^{-9}$ and consumes 2.2 mW at 8 Gb/s. Testing with an on-die test structure emulating a low-capacitance waveguide photodetector yields 17 $\mu$ A $_{{\rm pp}}$ sensitivity at 10 Gb/s and more than 40% power reduction with higher input current levels.
Chinhui Chen - One of the best experts on this subject based on the ideXlab platform.
-
An Energy-Efficient Silicon Microring Resonator-Based Photonic Transmitter
2016Co-Authors: Chinhui Chen, Binhao Wang, Marco Fiorentino, Raymond G Beausoleil, Samuel PalermoAbstract:h OPTICAL CHANNELS ARE potential candidates to replace conventional electrical channels for effi-cient interchip and intrachip Interconnects due to their attractive properties: flat channel loss over a wide frequency range and strong immunity to cross-talk and electromagnetic noise. An important feature of optical Interconnects is the ability to com-bine multiple data channels on a single waveguide via wavelength division multiplexing (WDM) to greatly improve bandwidth density and amortize connector costs over high aggregate bandwidth. To take full advantage of these benefits, silicon Photonic platforms are being developed that enable tightly integrated optical Interconnects and novel Photonic network architectures. One promising pho-tonic device is the silicon microring resonator [1], [2] which can be configured either as an optical modulator or a WDM drop filter. Silicon ring resonator modulators and filters offer the advantages of small size rela-tive to Mach–Zehnder modulators (MZMs), and increased filter func-tionality relative to electro-absorption modulators. This paper presents silicon ring resonator-based Photonic transmitter prototypes that address the limited intrinsic bandwidth of carrier-injection ring mod-ulators, achieving energy-efficient high-speed opti-cal modulation in a compact silicon area suitable for on-chip WDM Interconnects. Silicon microring resonator-based Photonic WDM link Silicon microring resonator-based Photonic links provide a unique opportunity to deliver distance-independent connectivity whose pin bandwidth scales with the degree of WDM. As Figure 1 shows, multiple wavelengths generated by an off-chip continuous-wave (CW) laser are coupled into a silicon waveguide via a grating coupler. This off-chip laser can be either a distributed feedback (DFB) la-ser bank (which consists of an array of DFB laser diodes) or a comb laser [3] (which can generate multiple wavelengths simultaneously). Implement-ing a DFB laser bank for dense WDM (DWDM) Photonic Interconnects (for example, using 64 wavelengths) is quite challenging due to area and power budget constraints. A possible alternative is a single broad-spectrum comb laser source, such as an indium arsenid
-
an energy efficient silicon microring resonator based Photonic transmitter
IEEE Design & Test of Computers, 2014Co-Authors: Chinhui Chen, Samuel Palermo, Binhao Wang, Marco Fiorentino, Raymond G BeausoleilAbstract:Silicon microring resonator-based Photonic Interconnects offer an attractive substitute to conventional electrical Interconnects due to the negligible frequency-dependent channel loss and high bandwidth density offered via wavelength division multiplexing (WDM). This paper presents silicon Photonic transmitters employing ring modulators designed in a 130-nm SOI process wire bonded with CMOS drivers in a 1-V standard 65-nm CMOS technology. The transmitter circuits incorporate high-swing ( $2V_{pp}$ and $4V_{pp}$ ) drivers with nonlinear pre-emphasis to bypass the bandwidth limitation of the carrier-injection silicon ring modulator. The first-generation silicon ring modulator wire bonded with $4V_{pp}$ CMOS driver achieves 12.7-dB extinction ratio at 5 Gb/s with 4.04-mW power consumption, while the second-generation ring modulator wire bonded with $2V_{pp}$ CMOS driver achieves 9.2-dB extinction ratio at 9 Gb/s with 4.32 mW. Both of these measurements exclude the laser power.
-
silicon Photonic transceiver circuits with microring resonator bias based wavelength stabilization in 65 nm cmos
IEEE Journal of Solid-state Circuits, 2014Co-Authors: Cheng Li, Chinhui Chen, Binhao Wang, Marco Fiorentino, Raymond G Beausoleil, Ayman Shafik, Ehsan Zhian Tabasy, Geng Tang, Zhen Peng, Patrick ChiangAbstract:Photonic Interconnects are a promising technology to meet the bandwidth demands of next-generation high-performance computing systems. This paper presents silicon Photonic transceiver circuits for a microring resonator-based optical interconnect architecture in a 1 V standard 65 nm CMOS technology. The transmitter circuits incorporate high-swing ( $2{\rm V}_{{\rm pp}}$ and $4{\rm V}_{{\rm pp}})$ drivers with nonlinear pre-emphasis and automatic bias-based tuning for resonance wavelength stabilization. An optical forwarded-clock adaptive inverter-based transimpedance amplifier (TIA) receiver trades off power for varying link budgets by employing an on-die eye monitor and scaling the TIA supply for the required sensitivity. At 5 Gb/s operation, the $4{\rm V}_{{\rm pp}}$ transmitter achieves 12.7 dB extinction ratio with 4.04 mW power consumption, excluding laser power, when driving wire-bonded modulators designed in a 130 nm SOI process, while a 0.28 nm tuning range is obtained at 6.8 $\mu$ W/GHz efficiency with the bias-based tuning scheme implemented with the $2{\rm V}_{{\rm pp}}$ transmitter. When tested with a wire-bonded 150 fF p-i-n photodetector, the receiver achieves ${-}$ 9 dBm sensitivity at a ${\rm BER}=10^{-9}$ and consumes 2.2 mW at 8 Gb/s. Testing with an on-die test structure emulating a low-capacitance waveguide photodetector yields 17 $\mu$ A $_{{\rm pp}}$ sensitivity at 10 Gb/s and more than 40% power reduction with higher input current levels.
Marco Fiorentino - One of the best experts on this subject based on the ideXlab platform.
-
energy efficiency analysis of frequency comb sources for silicon Photonic Interconnects
IEEE Optical Interconnects Conference, 2019Co-Authors: Anthony Rizzo, Marco Fiorentino, Raymond G Beausoleil, Thomas Van Vaerenbergh, Yanir London, Geza Kurczveil, Ashkan M Seyedi, Daniil A Livshits, Keren BersmanAbstract:We present a procedure for modeling the energy efficiency of frequency comb sources based on empirical device measurements. The proposed methodology allows for rapid exploration of the joint source-link design space to identify valid configurations that minimize the energy consumption of the link.
-
An Energy-Efficient Silicon Microring Resonator-Based Photonic Transmitter
2016Co-Authors: Chinhui Chen, Binhao Wang, Marco Fiorentino, Raymond G Beausoleil, Samuel PalermoAbstract:h OPTICAL CHANNELS ARE potential candidates to replace conventional electrical channels for effi-cient interchip and intrachip Interconnects due to their attractive properties: flat channel loss over a wide frequency range and strong immunity to cross-talk and electromagnetic noise. An important feature of optical Interconnects is the ability to com-bine multiple data channels on a single waveguide via wavelength division multiplexing (WDM) to greatly improve bandwidth density and amortize connector costs over high aggregate bandwidth. To take full advantage of these benefits, silicon Photonic platforms are being developed that enable tightly integrated optical Interconnects and novel Photonic network architectures. One promising pho-tonic device is the silicon microring resonator [1], [2] which can be configured either as an optical modulator or a WDM drop filter. Silicon ring resonator modulators and filters offer the advantages of small size rela-tive to Mach–Zehnder modulators (MZMs), and increased filter func-tionality relative to electro-absorption modulators. This paper presents silicon ring resonator-based Photonic transmitter prototypes that address the limited intrinsic bandwidth of carrier-injection ring mod-ulators, achieving energy-efficient high-speed opti-cal modulation in a compact silicon area suitable for on-chip WDM Interconnects. Silicon microring resonator-based Photonic WDM link Silicon microring resonator-based Photonic links provide a unique opportunity to deliver distance-independent connectivity whose pin bandwidth scales with the degree of WDM. As Figure 1 shows, multiple wavelengths generated by an off-chip continuous-wave (CW) laser are coupled into a silicon waveguide via a grating coupler. This off-chip laser can be either a distributed feedback (DFB) la-ser bank (which consists of an array of DFB laser diodes) or a comb laser [3] (which can generate multiple wavelengths simultaneously). Implement-ing a DFB laser bank for dense WDM (DWDM) Photonic Interconnects (for example, using 64 wavelengths) is quite challenging due to area and power budget constraints. A possible alternative is a single broad-spectrum comb laser source, such as an indium arsenid
-
an energy efficient silicon microring resonator based Photonic transmitter
IEEE Design & Test of Computers, 2014Co-Authors: Chinhui Chen, Samuel Palermo, Binhao Wang, Marco Fiorentino, Raymond G BeausoleilAbstract:Silicon microring resonator-based Photonic Interconnects offer an attractive substitute to conventional electrical Interconnects due to the negligible frequency-dependent channel loss and high bandwidth density offered via wavelength division multiplexing (WDM). This paper presents silicon Photonic transmitters employing ring modulators designed in a 130-nm SOI process wire bonded with CMOS drivers in a 1-V standard 65-nm CMOS technology. The transmitter circuits incorporate high-swing ( $2V_{pp}$ and $4V_{pp}$ ) drivers with nonlinear pre-emphasis to bypass the bandwidth limitation of the carrier-injection silicon ring modulator. The first-generation silicon ring modulator wire bonded with $4V_{pp}$ CMOS driver achieves 12.7-dB extinction ratio at 5 Gb/s with 4.04-mW power consumption, while the second-generation ring modulator wire bonded with $2V_{pp}$ CMOS driver achieves 9.2-dB extinction ratio at 9 Gb/s with 4.32 mW. Both of these measurements exclude the laser power.
-
silicon Photonic transceiver circuits with microring resonator bias based wavelength stabilization in 65 nm cmos
IEEE Journal of Solid-state Circuits, 2014Co-Authors: Cheng Li, Chinhui Chen, Binhao Wang, Marco Fiorentino, Raymond G Beausoleil, Ayman Shafik, Ehsan Zhian Tabasy, Geng Tang, Zhen Peng, Patrick ChiangAbstract:Photonic Interconnects are a promising technology to meet the bandwidth demands of next-generation high-performance computing systems. This paper presents silicon Photonic transceiver circuits for a microring resonator-based optical interconnect architecture in a 1 V standard 65 nm CMOS technology. The transmitter circuits incorporate high-swing ( $2{\rm V}_{{\rm pp}}$ and $4{\rm V}_{{\rm pp}})$ drivers with nonlinear pre-emphasis and automatic bias-based tuning for resonance wavelength stabilization. An optical forwarded-clock adaptive inverter-based transimpedance amplifier (TIA) receiver trades off power for varying link budgets by employing an on-die eye monitor and scaling the TIA supply for the required sensitivity. At 5 Gb/s operation, the $4{\rm V}_{{\rm pp}}$ transmitter achieves 12.7 dB extinction ratio with 4.04 mW power consumption, excluding laser power, when driving wire-bonded modulators designed in a 130 nm SOI process, while a 0.28 nm tuning range is obtained at 6.8 $\mu$ W/GHz efficiency with the bias-based tuning scheme implemented with the $2{\rm V}_{{\rm pp}}$ transmitter. When tested with a wire-bonded 150 fF p-i-n photodetector, the receiver achieves ${-}$ 9 dBm sensitivity at a ${\rm BER}=10^{-9}$ and consumes 2.2 mW at 8 Gb/s. Testing with an on-die test structure emulating a low-capacitance waveguide photodetector yields 17 $\mu$ A $_{{\rm pp}}$ sensitivity at 10 Gb/s and more than 40% power reduction with higher input current levels.
Binhao Wang - One of the best experts on this subject based on the ideXlab platform.
-
An Energy-Efficient Silicon Microring Resonator-Based Photonic Transmitter
2016Co-Authors: Chinhui Chen, Binhao Wang, Marco Fiorentino, Raymond G Beausoleil, Samuel PalermoAbstract:h OPTICAL CHANNELS ARE potential candidates to replace conventional electrical channels for effi-cient interchip and intrachip Interconnects due to their attractive properties: flat channel loss over a wide frequency range and strong immunity to cross-talk and electromagnetic noise. An important feature of optical Interconnects is the ability to com-bine multiple data channels on a single waveguide via wavelength division multiplexing (WDM) to greatly improve bandwidth density and amortize connector costs over high aggregate bandwidth. To take full advantage of these benefits, silicon Photonic platforms are being developed that enable tightly integrated optical Interconnects and novel Photonic network architectures. One promising pho-tonic device is the silicon microring resonator [1], [2] which can be configured either as an optical modulator or a WDM drop filter. Silicon ring resonator modulators and filters offer the advantages of small size rela-tive to Mach–Zehnder modulators (MZMs), and increased filter func-tionality relative to electro-absorption modulators. This paper presents silicon ring resonator-based Photonic transmitter prototypes that address the limited intrinsic bandwidth of carrier-injection ring mod-ulators, achieving energy-efficient high-speed opti-cal modulation in a compact silicon area suitable for on-chip WDM Interconnects. Silicon microring resonator-based Photonic WDM link Silicon microring resonator-based Photonic links provide a unique opportunity to deliver distance-independent connectivity whose pin bandwidth scales with the degree of WDM. As Figure 1 shows, multiple wavelengths generated by an off-chip continuous-wave (CW) laser are coupled into a silicon waveguide via a grating coupler. This off-chip laser can be either a distributed feedback (DFB) la-ser bank (which consists of an array of DFB laser diodes) or a comb laser [3] (which can generate multiple wavelengths simultaneously). Implement-ing a DFB laser bank for dense WDM (DWDM) Photonic Interconnects (for example, using 64 wavelengths) is quite challenging due to area and power budget constraints. A possible alternative is a single broad-spectrum comb laser source, such as an indium arsenid
-
an energy efficient silicon microring resonator based Photonic transmitter
IEEE Design & Test of Computers, 2014Co-Authors: Chinhui Chen, Samuel Palermo, Binhao Wang, Marco Fiorentino, Raymond G BeausoleilAbstract:Silicon microring resonator-based Photonic Interconnects offer an attractive substitute to conventional electrical Interconnects due to the negligible frequency-dependent channel loss and high bandwidth density offered via wavelength division multiplexing (WDM). This paper presents silicon Photonic transmitters employing ring modulators designed in a 130-nm SOI process wire bonded with CMOS drivers in a 1-V standard 65-nm CMOS technology. The transmitter circuits incorporate high-swing ( $2V_{pp}$ and $4V_{pp}$ ) drivers with nonlinear pre-emphasis to bypass the bandwidth limitation of the carrier-injection silicon ring modulator. The first-generation silicon ring modulator wire bonded with $4V_{pp}$ CMOS driver achieves 12.7-dB extinction ratio at 5 Gb/s with 4.04-mW power consumption, while the second-generation ring modulator wire bonded with $2V_{pp}$ CMOS driver achieves 9.2-dB extinction ratio at 9 Gb/s with 4.32 mW. Both of these measurements exclude the laser power.
-
silicon Photonic transceiver circuits with microring resonator bias based wavelength stabilization in 65 nm cmos
IEEE Journal of Solid-state Circuits, 2014Co-Authors: Cheng Li, Chinhui Chen, Binhao Wang, Marco Fiorentino, Raymond G Beausoleil, Ayman Shafik, Ehsan Zhian Tabasy, Geng Tang, Zhen Peng, Patrick ChiangAbstract:Photonic Interconnects are a promising technology to meet the bandwidth demands of next-generation high-performance computing systems. This paper presents silicon Photonic transceiver circuits for a microring resonator-based optical interconnect architecture in a 1 V standard 65 nm CMOS technology. The transmitter circuits incorporate high-swing ( $2{\rm V}_{{\rm pp}}$ and $4{\rm V}_{{\rm pp}})$ drivers with nonlinear pre-emphasis and automatic bias-based tuning for resonance wavelength stabilization. An optical forwarded-clock adaptive inverter-based transimpedance amplifier (TIA) receiver trades off power for varying link budgets by employing an on-die eye monitor and scaling the TIA supply for the required sensitivity. At 5 Gb/s operation, the $4{\rm V}_{{\rm pp}}$ transmitter achieves 12.7 dB extinction ratio with 4.04 mW power consumption, excluding laser power, when driving wire-bonded modulators designed in a 130 nm SOI process, while a 0.28 nm tuning range is obtained at 6.8 $\mu$ W/GHz efficiency with the bias-based tuning scheme implemented with the $2{\rm V}_{{\rm pp}}$ transmitter. When tested with a wire-bonded 150 fF p-i-n photodetector, the receiver achieves ${-}$ 9 dBm sensitivity at a ${\rm BER}=10^{-9}$ and consumes 2.2 mW at 8 Gb/s. Testing with an on-die test structure emulating a low-capacitance waveguide photodetector yields 17 $\mu$ A $_{{\rm pp}}$ sensitivity at 10 Gb/s and more than 40% power reduction with higher input current levels.