Power Budget

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Weisheng Hu - One of the best experts on this subject based on the ideXlab platform.

  • Power Budget enhancement in ng epon system employing novel twisted pam4
    Optics Communications, 2018
    Co-Authors: Longsheng Li, Meihua Bi, Yan Fu, Xin Miao, Weisheng Hu
    Abstract:

    Abstract In this paper, we firstly design a novel modulation format named Twisted-PAM4 (T-PAM4) for the high-speed NG-EPON and the PON-based digital fronthaul system. Compared to other high-order modulation formats like 4-ary pulse amplitude modulation (PAM4), T-PAM4 provides two independent sampling values in each symbol period and enables two-dimensional symbol decision, which significantly improves the receiver sensitivity and hence enlarges the system Power Budget. Based on this advantage, six types of T-PAM4 are experimentally demonstrated in 28-Gb/s/ λ NG-PON and 32-Gb/s/ λ PON-based digital fronthaul system. The experimental results show that, compared to the ordinary PAM4, the T-PAM4 can bring 5-dB and 4-dB extra Power Budget in NG-EPON and PON-based fronthaul system respectively. In addition, by experiment, it is also depicted that the T-PAM4 is remarkably robust to system nonlinearity, which would ease the linearity requirement on system components and hence reduce system cost.

  • Power Budget improvement of symmetric 40 gb s dml based twdm pon system
    Optics Express, 2014
    Co-Authors: Meihua Bi, Hao He, Jun Li, Lilin Yi, Shilin Xiao, Xuelin Yang, Weisheng Hu
    Abstract:

    We propose a symmetric 40-Gb/s time and wavelength division multiplexed passive optical network (TWDM-PON) system with directly modulated laser (DML) as both downstream and upstream transmitters. A single bi-pass delay interferometer (DI), deployed in the optical line terminal (OLT), is used to mitigate multiple channels’ signal distortions induced by laser chirp and fiber chromatic dispersion. With the help of the DI, we successfully demonstrate error-free transmission with the aggregate capacity of 40 Gb/s over different transmission distance. And in back-to-back case, by using a 0.2-nm free spectrum range (FSR) DI, ~11 dB optical Power Budget improvement is achieved at a bit error ratio of 1e-3. Owing to this high Power Budget, the maximum reach can be extended to 50 km for 1024 splits, 75 km for 256 splits, and 100 km for 64 splits. Meanwhile, the impacts of FSR of DI and laser wavelength shift on system performance are investigated in terms of receiver sensitivity. It is shown that, our system can achieve more than 43-dB Power Budget and support ± 2.5-GHz wavelength shift when the FSR is less than 0.2 nm.

  • Power Budget improvements using grouped pilot channel estimation for ofdm pon
    Asia Communications and Photonics Conference 2013 (2013) paper AF1G.5, 2013
    Co-Authors: Yuehua Tian, Meihua Bi, Hao He, Jun Li, Weisheng Hu
    Abstract:

    We present an efficient grouped pilot channel estimation algorithm (GP-CE) in OFDM-PON system. Experimental results show that the proposed algorithm achieve as much ~4dB Power Budget improvements in comparison with other common algorithms.

  • Symmetric 40-Gb/s TWDM-PON With 39-dB Power Budget
    IEEE Photonics Technology Letters, 2013
    Co-Authors: Lilin Yi, Meihua Bi, Zhengxuan Li, Weisheng Hu
    Abstract:

    Time- and wavelength-division multiplexed passive optical network (TWDM-PON) has been selected by full service access networks as a primary solution for next generation PON stage 2 in April 2012. In this letter, we propose and demonstrate a symmetric 40-Gb/s TWDM-PON with 39-dB Power Budget. A reflective semiconductor optical amplifier is used in optical network unit as a pre-amplifier to enhance the sensitivity of downstream signals. For the upstream direction, a thermally-tuned directly modulated laser with 10-Gb/s modulation rate is used as upstream colorless source, and a chirp management filter is employed in optical line terminal to mitigate chromatic dispersion therefore enabling fiber transmission. Symmetric 40-Gb/s TWDM-PON is experimentally demonstrated with a Power Budget of 39 dB, which could support 25-km fiber transmission and 1:1000 splitting ratio.

Michael J. Schulte - One of the best experts on this subject based on the ideXlab platform.

  • PACT - Workload and Power Budget partitioning for single-chip heterogeneous processors
    Proceedings of the 21st international conference on Parallel architectures and compilation techniques - PACT '12, 2012
    Co-Authors: Hao Wang, Vijay Sathish, Ripudaman Singh, Michael J. Schulte
    Abstract:

    With technology scaling, manufacturers are integrating both CPU and GPU cores in a single chip to improve the throughput of emerging applications. To maximize the throughput of a single-chip heterogeneous processor (SCHP), the chip Power Budget shared between the CPU and GPU must be effectively utilized. At the same time, the CPU and GPU in an SCHP must each satisfy its own Power constraint. Furthermore, the Power Budget allocated to the CPU and GPU impacts performance. In this paper, using a detailed cycle-level SCHP simulator, we first demonstrate that the joint optimization of workload and Power Budget partitioning between the CPU and GPU can provide 13% higher throughput than the optimization of workload partitioning alone under a fixed Power Budget allocation to the CPU and GPU. Second, we propose an effective runtime algorithm that can determine near-optimal or optimal combinations of workload and Power Budget partitioning. The algorithm exploits the runtime Power efficiencies of the workload executed on the CPU and the GPU. Using the detailed cycle-level SCHP simulator, we show that within five to eight kernel invocations the algorithm can achieve 96% of the maximum throughput obtained by an exhaustive search algorithm. Finally, we demonstrate comparable throughput improvements when we apply the algorithm to a commercial computing system with an SCHP.

  • Workload and Power Budget partitioning for single-chip heterogeneous processors
    2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT), 2012
    Co-Authors: Hao Wang, Vijay Sathish, Ripudaman Singh, Michael J. Schulte
    Abstract:

    With technology scaling, manufacturers are integrating both CPU and GPU cores in a single chip to improve the throughput of emerging applications. To maximize the throughput of a single-chip heterogeneous processor (SCHP), the chip Power Budget shared between the CPU and GPU must be effectively utilized. At the same time, the CPU and GPU in an SCHP must each satisfy its own Power constraint. Furthermore, the Power Budget allocated to the CPU and GPU impacts performance. In this paper, using a detailed cycle-level SCHP simulator, we first demonstrate that the joint optimization of workload and Power Budget partitioning between the CPU and GPU can provide 13% higher throughput than the optimization of workload partitioning alone under a fixed Power Budget allocation to the CPU and GPU. Second, we propose an effective runtime algorithm that can determine near-optimal or optimal combinations of workload and Power Budget partitioning. The algorithm exploits the runtime Power efficiencies of the workload executed on the CPU and the GPU. Using the detailed cycle-level SCHP simulator, we show that within five to eight kernel invocations the algorithm can achieve 96% of the maximum throughput obtained by an exhaustive search algorithm. Finally, we demonstrate comparable throughput improvements when we apply the algorithm to a commercial computing system with an SCHP.

Lilin Yi - One of the best experts on this subject based on the ideXlab platform.

  • Power Budget improvement of symmetric 40 gb s dml based twdm pon system
    Optics Express, 2014
    Co-Authors: Meihua Bi, Hao He, Jun Li, Lilin Yi, Shilin Xiao, Xuelin Yang, Weisheng Hu
    Abstract:

    We propose a symmetric 40-Gb/s time and wavelength division multiplexed passive optical network (TWDM-PON) system with directly modulated laser (DML) as both downstream and upstream transmitters. A single bi-pass delay interferometer (DI), deployed in the optical line terminal (OLT), is used to mitigate multiple channels’ signal distortions induced by laser chirp and fiber chromatic dispersion. With the help of the DI, we successfully demonstrate error-free transmission with the aggregate capacity of 40 Gb/s over different transmission distance. And in back-to-back case, by using a 0.2-nm free spectrum range (FSR) DI, ~11 dB optical Power Budget improvement is achieved at a bit error ratio of 1e-3. Owing to this high Power Budget, the maximum reach can be extended to 50 km for 1024 splits, 75 km for 256 splits, and 100 km for 64 splits. Meanwhile, the impacts of FSR of DI and laser wavelength shift on system performance are investigated in terms of receiver sensitivity. It is shown that, our system can achieve more than 43-dB Power Budget and support ± 2.5-GHz wavelength shift when the FSR is less than 0.2 nm.

  • Symmetric 40-Gb/s TWDM-PON With 39-dB Power Budget
    IEEE Photonics Technology Letters, 2013
    Co-Authors: Lilin Yi, Meihua Bi, Zhengxuan Li, Weisheng Hu
    Abstract:

    Time- and wavelength-division multiplexed passive optical network (TWDM-PON) has been selected by full service access networks as a primary solution for next generation PON stage 2 in April 2012. In this letter, we propose and demonstrate a symmetric 40-Gb/s TWDM-PON with 39-dB Power Budget. A reflective semiconductor optical amplifier is used in optical network unit as a pre-amplifier to enhance the sensitivity of downstream signals. For the upstream direction, a thermally-tuned directly modulated laser with 10-Gb/s modulation rate is used as upstream colorless source, and a chirp management filter is employed in optical line terminal to mitigate chromatic dispersion therefore enabling fiber transmission. Symmetric 40-Gb/s TWDM-PON is experimentally demonstrated with a Power Budget of 39 dB, which could support 25-km fiber transmission and 1:1000 splitting ratio.

Meihua Bi - One of the best experts on this subject based on the ideXlab platform.

  • Power Budget enhancement in ng epon system employing novel twisted pam4
    Optics Communications, 2018
    Co-Authors: Longsheng Li, Meihua Bi, Yan Fu, Xin Miao, Weisheng Hu
    Abstract:

    Abstract In this paper, we firstly design a novel modulation format named Twisted-PAM4 (T-PAM4) for the high-speed NG-EPON and the PON-based digital fronthaul system. Compared to other high-order modulation formats like 4-ary pulse amplitude modulation (PAM4), T-PAM4 provides two independent sampling values in each symbol period and enables two-dimensional symbol decision, which significantly improves the receiver sensitivity and hence enlarges the system Power Budget. Based on this advantage, six types of T-PAM4 are experimentally demonstrated in 28-Gb/s/ λ NG-PON and 32-Gb/s/ λ PON-based digital fronthaul system. The experimental results show that, compared to the ordinary PAM4, the T-PAM4 can bring 5-dB and 4-dB extra Power Budget in NG-EPON and PON-based fronthaul system respectively. In addition, by experiment, it is also depicted that the T-PAM4 is remarkably robust to system nonlinearity, which would ease the linearity requirement on system components and hence reduce system cost.

  • Power Budget improvement of symmetric 40 gb s dml based twdm pon system
    Optics Express, 2014
    Co-Authors: Meihua Bi, Hao He, Jun Li, Lilin Yi, Shilin Xiao, Xuelin Yang, Weisheng Hu
    Abstract:

    We propose a symmetric 40-Gb/s time and wavelength division multiplexed passive optical network (TWDM-PON) system with directly modulated laser (DML) as both downstream and upstream transmitters. A single bi-pass delay interferometer (DI), deployed in the optical line terminal (OLT), is used to mitigate multiple channels’ signal distortions induced by laser chirp and fiber chromatic dispersion. With the help of the DI, we successfully demonstrate error-free transmission with the aggregate capacity of 40 Gb/s over different transmission distance. And in back-to-back case, by using a 0.2-nm free spectrum range (FSR) DI, ~11 dB optical Power Budget improvement is achieved at a bit error ratio of 1e-3. Owing to this high Power Budget, the maximum reach can be extended to 50 km for 1024 splits, 75 km for 256 splits, and 100 km for 64 splits. Meanwhile, the impacts of FSR of DI and laser wavelength shift on system performance are investigated in terms of receiver sensitivity. It is shown that, our system can achieve more than 43-dB Power Budget and support ± 2.5-GHz wavelength shift when the FSR is less than 0.2 nm.

  • Power Budget improvements using grouped pilot channel estimation for ofdm pon
    Asia Communications and Photonics Conference 2013 (2013) paper AF1G.5, 2013
    Co-Authors: Yuehua Tian, Meihua Bi, Hao He, Jun Li, Weisheng Hu
    Abstract:

    We present an efficient grouped pilot channel estimation algorithm (GP-CE) in OFDM-PON system. Experimental results show that the proposed algorithm achieve as much ~4dB Power Budget improvements in comparison with other common algorithms.

  • Symmetric 40-Gb/s TWDM-PON With 39-dB Power Budget
    IEEE Photonics Technology Letters, 2013
    Co-Authors: Lilin Yi, Meihua Bi, Zhengxuan Li, Weisheng Hu
    Abstract:

    Time- and wavelength-division multiplexed passive optical network (TWDM-PON) has been selected by full service access networks as a primary solution for next generation PON stage 2 in April 2012. In this letter, we propose and demonstrate a symmetric 40-Gb/s TWDM-PON with 39-dB Power Budget. A reflective semiconductor optical amplifier is used in optical network unit as a pre-amplifier to enhance the sensitivity of downstream signals. For the upstream direction, a thermally-tuned directly modulated laser with 10-Gb/s modulation rate is used as upstream colorless source, and a chirp management filter is employed in optical line terminal to mitigate chromatic dispersion therefore enabling fiber transmission. Symmetric 40-Gb/s TWDM-PON is experimentally demonstrated with a Power Budget of 39 dB, which could support 25-km fiber transmission and 1:1000 splitting ratio.

Hao Wang - One of the best experts on this subject based on the ideXlab platform.

  • PACT - Workload and Power Budget partitioning for single-chip heterogeneous processors
    Proceedings of the 21st international conference on Parallel architectures and compilation techniques - PACT '12, 2012
    Co-Authors: Hao Wang, Vijay Sathish, Ripudaman Singh, Michael J. Schulte
    Abstract:

    With technology scaling, manufacturers are integrating both CPU and GPU cores in a single chip to improve the throughput of emerging applications. To maximize the throughput of a single-chip heterogeneous processor (SCHP), the chip Power Budget shared between the CPU and GPU must be effectively utilized. At the same time, the CPU and GPU in an SCHP must each satisfy its own Power constraint. Furthermore, the Power Budget allocated to the CPU and GPU impacts performance. In this paper, using a detailed cycle-level SCHP simulator, we first demonstrate that the joint optimization of workload and Power Budget partitioning between the CPU and GPU can provide 13% higher throughput than the optimization of workload partitioning alone under a fixed Power Budget allocation to the CPU and GPU. Second, we propose an effective runtime algorithm that can determine near-optimal or optimal combinations of workload and Power Budget partitioning. The algorithm exploits the runtime Power efficiencies of the workload executed on the CPU and the GPU. Using the detailed cycle-level SCHP simulator, we show that within five to eight kernel invocations the algorithm can achieve 96% of the maximum throughput obtained by an exhaustive search algorithm. Finally, we demonstrate comparable throughput improvements when we apply the algorithm to a commercial computing system with an SCHP.

  • Workload and Power Budget partitioning for single-chip heterogeneous processors
    2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT), 2012
    Co-Authors: Hao Wang, Vijay Sathish, Ripudaman Singh, Michael J. Schulte
    Abstract:

    With technology scaling, manufacturers are integrating both CPU and GPU cores in a single chip to improve the throughput of emerging applications. To maximize the throughput of a single-chip heterogeneous processor (SCHP), the chip Power Budget shared between the CPU and GPU must be effectively utilized. At the same time, the CPU and GPU in an SCHP must each satisfy its own Power constraint. Furthermore, the Power Budget allocated to the CPU and GPU impacts performance. In this paper, using a detailed cycle-level SCHP simulator, we first demonstrate that the joint optimization of workload and Power Budget partitioning between the CPU and GPU can provide 13% higher throughput than the optimization of workload partitioning alone under a fixed Power Budget allocation to the CPU and GPU. Second, we propose an effective runtime algorithm that can determine near-optimal or optimal combinations of workload and Power Budget partitioning. The algorithm exploits the runtime Power efficiencies of the workload executed on the CPU and the GPU. Using the detailed cycle-level SCHP simulator, we show that within five to eight kernel invocations the algorithm can achieve 96% of the maximum throughput obtained by an exhaustive search algorithm. Finally, we demonstrate comparable throughput improvements when we apply the algorithm to a commercial computing system with an SCHP.