The Experts below are selected from a list of 70263 Experts worldwide ranked by ideXlab platform
M.m. Eissa - One of the best experts on this subject based on the ideXlab platform.
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A new developed smart grid Protection Technique with wind farms based on positive sequence impedances and current angles
Electric Power Systems Research, 2020Co-Authors: M.m. Eissa, M.m.a. Mahfouz, G.m A. SowilamAbstract:Abstract The wind farms penetration in power systems has an adverse impact on transmission lines system Protection due to the characteristics of wind farms that are different from the conventional sources during fault occurrence. Different factors such as the distributed generation concept, the own behavior of the wind generator, variation of wind farm impedance during faults inside the farm, and varying wind speed arise different challenges regarding the behavior of the relay Protection. The paper introduces a novel Protection Technique based on total positive sequence impedance and positive sequence current angles through wide area monitoring system. A new Protection-setting contour with an efficient and capacity to identify the faulted zone during different fault conditions is developed. The proposed Protection scheme tripping action has to fulfil the fault ride through capability (FRT). The results showed a simple and robust new Protection system for such smart grid configuration system with wind farms.
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Current directional Protection Technique based on polarizing current
International Journal of Electrical Power & Energy Systems, 2013Co-Authors: M.m. EissaAbstract:Abstract A novel directional Protection Technique based on the post-fault current signal and a directional reference current signal is presented in this paper. A directional current signal is derived from the post-fault current signal, and the absolute sum of the post-fault current signal and a reference current signal. The ability to differentiate between a fault in one direction or the other is obtained using the directional current signal and the directional normal power flow before fault occurrence. No voltage signal is required to determine the direction to the fault. A variety of faults and system conditions have been simulated to evaluate the reliability and sensitivity of the proposed Technique. Results show that the new Technique is not affected by the system operating parameters.
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Protection Technique for Complex Distribution Smart Grid Using Wireless Token Ring Protocol
IEEE Transactions on Smart Grid, 2012Co-Authors: M.m. EissaAbstract:Distributed generation is expected to increase sharply as more and more renewable are integrated to power system with the realization of smart grid, consequently complex distribution smart grid is given. The traditional Protection devices cannot be able to protect complex power system configuration due to many fault current loops will feed the fault point. Relays based on standalone decisions cannot provide reliable and correct action when used on a complex distribution system. This paper proposes new Protection philosophy using wireless technology. Data sharing among relays to obtain reliable and accurate decision are introduced. Wireless Token Ring Protocol (WTRP) as a wireless local area network (LAN) protocol inspired by the IEEE 802.4 Token Bus Protocol is used for data sharing. WTRP is selected to improve efficiency by reducing the number of retransmissions due to collisions. WTRP architecture and protocol are described to verify operation. MATLAB simulation program is used to simulate the data exchange protocol between relays in a ring for a specified amount of time.
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a novel digital directional transformer Protection Technique based on wavelet packet
IEEE Transactions on Power Delivery, 2005Co-Authors: M.m. EissaAbstract:This paper presents a novel digital Technique for transformer Protection. The Technique is based on deriving a directional quantity proportional to the fault current signal and the prefault voltage signal. Standard fast wavelet transform (FWT) schemes may not be as effective for data that has chiefly oscillatory features. An effective solution to discrimination involves examining the signal in both the time and frequency domains simultaneously. The wavelet packet transform is an extension of the FWT that allows for finer characterization of signal content for both time and frequency together. A 11/132-kV transformer connected to a 132-kV power system was simulated using Alternative Transient Program/Electromagnetic Transient Program (ATP/EMTP). Results indicate that the proposed Technique is stable, reliable, and fast during the discrimination between internal and external faults, magnetizing inrush currents, and internal faults, ratio-mismatch, and saturation of current transformers (CTs).
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evaluation of a new current directional Protection Technique using field data
IEEE Transactions on Power Delivery, 2005Co-Authors: M.m. EissaAbstract:A novel current polarized directional element Technique to determine the fault direction on a transmission line is evaluated using fault data recorded in the field. The post-fault current signal and a directional reference current signal are used. A directional current element is derived from these quantities. The directional normal power flow before fault occurrence is also used. The voltage signal is excluded from the study after fault occurrence. Test results show that the new Technique is not affected by the system operating parameters. The Technique has a high degree reliability, selectivity and stability for a majority of practically encountered problems.
M Sanayepasand - One of the best experts on this subject based on the ideXlab platform.
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a traveling wave based Protection Technique using wavelet pca analysis
IEEE Transactions on Power Delivery, 2010Co-Authors: P Jafarian, M SanayepasandAbstract:This paper proposes a powerful high-speed traveling-wave-based Technique for the Protection of power transmission lines. The proposed Technique uses principal component analysis to identify the dominant pattern of the signals preprocessed by wavelet transform. The proposed Protection algorithm presents a discriminating method based on the polarity, magnitude, and time interval between the detected traveling waves at the relay location. A supplemental algorithm consisting of a high-set overcurrent relay as well as an impedance-based relay is also proposed. This is done to overcome the well-known shortcomings of traveling-wave-based Protection Techniques for the detection of very close-in faults and single-phase-to-ground faults occurring at small voltage magnitudes. The proposed Technique is evaluated for the Protection of a two-terminal transmission line. Extensive simulation studies using PSCAD/EMTDC software indicate that the proposed approach is reliable for rapid and correct identification of various fault cases. It identifies most of the internal faults very rapidly in less than 2 ms. In addition, the proposed Technique presents high noise immunity.
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a traveling wave based Protection Technique using wavelet pca analysis
IEEE Transactions on Power Delivery, 2010Co-Authors: P Jafarian, M SanayepasandAbstract:This paper proposes a powerful high-speed traveling-wave-based Technique for the Protection of power transmission lines. The proposed Technique uses principal component analysis to identify the dominant pattern of the signals preprocessed by wavelet transform. The proposed Protection algorithm presents a discriminating method based on the polarity, magnitude, and time interval between the detected traveling waves at the relay location. A supplemental algorithm consisting of a high-set overcurrent relay as well as an impedance-based relay is also proposed. This is done to overcome the well-known shortcomings of traveling-wave-based Protection Techniques for the detection of very close-in faults and single-phase-to-ground faults occurring at small voltage magnitudes. The proposed Technique is evaluated for the Protection of a two-terminal transmission line. Extensive simulation studies using PSCAD/EMTDC software indicate that the proposed approach is reliable for rapid and correct identification of various fault cases. It identifies most of the internal faults very rapidly in less than 2 ms. In addition, the proposed Technique presents high noise immunity.
Kamal El-sankary - One of the best experts on this subject based on the ideXlab platform.
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High-voltage DMOS integrated circuits using floating-gate Protection Technique
Analog Integrated Circuits and Signal Processing, 2010Co-Authors: Robert Chebli, Mohamad Sawan, Kamal El-sankary, Yvon SavariaAbstract:An efficient low power Protection scheme for thin gate oxide of high voltage (HV) DMOS transistor is presented. To prevent gate-oxide breakdown and protect HV transistor, the voltage controlling its gate must be within 5 V from the HV supply. Thus signals from the low voltage domain must be level shifted to control the gate of this transistor. Usually this level shifting involves complex circuits that reduce the speed besides requiring of large power and area. In this paper, a simple and efficient Protection Technique for gate-oxide breakdown is achieved by connecting a capacitor divider structure to the floating-gate node of HV transistor to increase its effective gate oxide thickness. Several HV circuits, including: positive and negative HV doublers and level-up shifters suitable for ultrasound sensing systems are built successfully around the proposed Technique. These circuits were implemented with 0.8 μm CMOS/DMOS HV DALSA process. Simulation and experimental results prove the good functionality of the designed HV circuits using the proposed Protection Technique for voltages up to 200 V.
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ISCAS - High-Voltage DMOS Integrated Circuits with Floating Gate Protection Technique
2007 IEEE International Symposium on Circuits and Systems, 2007Co-Authors: Robert Chebli, Mohamad Sawan, Yvon Savaria, Kamal El-sankaryAbstract:This paper presents an efficient low power Protection Technique for thin gate oxide of DMOS transistors. By connecting a capacitive divider structure to the floating gate node of a DMOS transistor, its effective gate oxide thickness is increased, and a Protection from breakdown due to high voltages (HV) applied to its gate is achieved. Several HV circuits, including: positive voltage doubler and level-up shifter suitable for ultrasound sensing systems are built successfully around this Technique. These circuits were implemented with the 0.8 mum CMOS/DMOS HV DALSA process. Experimental results prove the good functionality of the designed HV circuits using the proposed Protection Technique for voltages up to 120V.
Robert Chebli - One of the best experts on this subject based on the ideXlab platform.
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High-voltage DMOS integrated circuits using floating-gate Protection Technique
Analog Integrated Circuits and Signal Processing, 2010Co-Authors: Robert Chebli, Mohamad Sawan, Kamal El-sankary, Yvon SavariaAbstract:An efficient low power Protection scheme for thin gate oxide of high voltage (HV) DMOS transistor is presented. To prevent gate-oxide breakdown and protect HV transistor, the voltage controlling its gate must be within 5 V from the HV supply. Thus signals from the low voltage domain must be level shifted to control the gate of this transistor. Usually this level shifting involves complex circuits that reduce the speed besides requiring of large power and area. In this paper, a simple and efficient Protection Technique for gate-oxide breakdown is achieved by connecting a capacitor divider structure to the floating-gate node of HV transistor to increase its effective gate oxide thickness. Several HV circuits, including: positive and negative HV doublers and level-up shifters suitable for ultrasound sensing systems are built successfully around the proposed Technique. These circuits were implemented with 0.8 μm CMOS/DMOS HV DALSA process. Simulation and experimental results prove the good functionality of the designed HV circuits using the proposed Protection Technique for voltages up to 200 V.
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high voltage dmos integrated circuits with floating gate Protection Technique
International Symposium on Circuits and Systems, 2007Co-Authors: Robert Chebli, Mohamad Sawan, Yvon Savaria, Kamal ElsankaryAbstract:This paper presents an efficient low power Protection Technique for thin gate oxide of DMOS transistors. By connecting a capacitive divider structure to the floating gate node of a DMOS transistor, its effective gate oxide thickness is increased, and a Protection from breakdown due to high voltages (HV) applied to its gate is achieved. Several HV circuits, including: positive voltage doubler and level-up shifter suitable for ultrasound sensing systems are built successfully around this Technique. These circuits were implemented with the 0.8 mum CMOS/DMOS HV DALSA process. Experimental results prove the good functionality of the designed HV circuits using the proposed Protection Technique for voltages up to 120V.
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ISCAS - High-Voltage DMOS Integrated Circuits with Floating Gate Protection Technique
2007 IEEE International Symposium on Circuits and Systems, 2007Co-Authors: Robert Chebli, Mohamad Sawan, Yvon Savaria, Kamal El-sankaryAbstract:This paper presents an efficient low power Protection Technique for thin gate oxide of DMOS transistors. By connecting a capacitive divider structure to the floating gate node of a DMOS transistor, its effective gate oxide thickness is increased, and a Protection from breakdown due to high voltages (HV) applied to its gate is achieved. Several HV circuits, including: positive voltage doubler and level-up shifter suitable for ultrasound sensing systems are built successfully around this Technique. These circuits were implemented with the 0.8 mum CMOS/DMOS HV DALSA process. Experimental results prove the good functionality of the designed HV circuits using the proposed Protection Technique for voltages up to 120V.
P Jafarian - One of the best experts on this subject based on the ideXlab platform.
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a traveling wave based Protection Technique using wavelet pca analysis
IEEE Transactions on Power Delivery, 2010Co-Authors: P Jafarian, M SanayepasandAbstract:This paper proposes a powerful high-speed traveling-wave-based Technique for the Protection of power transmission lines. The proposed Technique uses principal component analysis to identify the dominant pattern of the signals preprocessed by wavelet transform. The proposed Protection algorithm presents a discriminating method based on the polarity, magnitude, and time interval between the detected traveling waves at the relay location. A supplemental algorithm consisting of a high-set overcurrent relay as well as an impedance-based relay is also proposed. This is done to overcome the well-known shortcomings of traveling-wave-based Protection Techniques for the detection of very close-in faults and single-phase-to-ground faults occurring at small voltage magnitudes. The proposed Technique is evaluated for the Protection of a two-terminal transmission line. Extensive simulation studies using PSCAD/EMTDC software indicate that the proposed approach is reliable for rapid and correct identification of various fault cases. It identifies most of the internal faults very rapidly in less than 2 ms. In addition, the proposed Technique presents high noise immunity.
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a traveling wave based Protection Technique using wavelet pca analysis
IEEE Transactions on Power Delivery, 2010Co-Authors: P Jafarian, M SanayepasandAbstract:This paper proposes a powerful high-speed traveling-wave-based Technique for the Protection of power transmission lines. The proposed Technique uses principal component analysis to identify the dominant pattern of the signals preprocessed by wavelet transform. The proposed Protection algorithm presents a discriminating method based on the polarity, magnitude, and time interval between the detected traveling waves at the relay location. A supplemental algorithm consisting of a high-set overcurrent relay as well as an impedance-based relay is also proposed. This is done to overcome the well-known shortcomings of traveling-wave-based Protection Techniques for the detection of very close-in faults and single-phase-to-ground faults occurring at small voltage magnitudes. The proposed Technique is evaluated for the Protection of a two-terminal transmission line. Extensive simulation studies using PSCAD/EMTDC software indicate that the proposed approach is reliable for rapid and correct identification of various fault cases. It identifies most of the internal faults very rapidly in less than 2 ms. In addition, the proposed Technique presents high noise immunity.
