The Experts below are selected from a list of 6147 Experts worldwide ranked by ideXlab platform

Torsten Hoefler - One of the best experts on this subject based on the ideXlab platform.

  • Fault Tolerance for Remote Memory Access Programming Models.
    arXiv: Distributed Parallel and Cluster Computing, 2020
    Co-Authors: Maciej Besta, Torsten Hoefler
    Abstract:

    Remote Memory Access (RMA) is an emerging mechanism for programming high-performance computers and datacenters. However, little work exists on resilience schemes for RMA-based applications and systems. In this paper we analyze fault tolerance for RMA and show that it is fundamentally different from resilience mechanisms targeting the message passing (MP) model. We design a model for reasoning about fault tolerance for RMA, addressing both flat and hierarchical hardware. We use this model to construct several highly-scalable mechanisms that provide efficient low-overhead in-Memory checkpointing, transparent logging of Remote Memory Accesses, and a scheme for transparent recovery of failed processes. Our protocols take into account diminishing amounts of Memory per core, one of major features of future exascale machines. The implementation of our fault-tolerance scheme entails negligible additional overheads. Our reliability model shows that in-Memory checkpointing and logging provide high resilience. This study enables highly-scalable resilience mechanisms for RMA and fills a research gap between fault tolerance and emerging RMA programming models.

  • Enabling highly scalable Remote Memory Access programming with MPI-3 one sided
    Communications of the ACM, 2018
    Co-Authors: Robert Gerstenberger, Maciej Besta, Torsten Hoefler
    Abstract:

    Modern high-performance networks offer Remote direct Memory Access (RDMA) that exposes a process' virtual address space to other processes in the network. The Message Passing Interface (MPI) specification has recently been extended with a programming interface called MPI-3 Remote Memory Access (MPI-3 RMA) for efficiently exploiting state-of-the-art RDMA features. MPI-3 RMA enables a powerful programming model that alleviates many message passing downsides. In this work, we design and develop bufferless protocols that demonstrate how to implement this interface and support scaling to millions of cores with negligible Memory consumption while providing highest performance and minimal overheads. To arm programmers, we provide a spectrum of performance models for RMA functions that enable rigorous mathematical analysis of application performance and facilitate the development of codes that solve given tasks within specified time and energy budgets. We validate the usability of our library and models with several application studies with up to half a million processes. In a wider sense, our work illustrates how to use RMA principles to accelerate computation- and data-intensive codes.

  • OOPSLA - Modeling and analysis of Remote Memory Access programming
    Proceedings of the 2016 ACM SIGPLAN International Conference on Object-Oriented Programming Systems Languages and Applications, 2016
    Co-Authors: Andrei Marian Dan, Torsten Hoefler, Patrick Lam, Martin Vechev
    Abstract:

    Recent advances in networking hardware have led to a new generation of Remote Memory Access (RMA) networks in which processors from different machines can communicate directly, bypassing the operating system and allowing higher performance. Researchers and practitioners have proposed libraries and programming models for RMA to enable the development of applications running on these networks, However, the Memory models implied by these RMA libraries and languages are often loosely specified, poorly understood, and differ depending on the underlying network architecture and other factors. Hence, it is difficult to precisely reason about the semantics of RMA programs or how changes in the network architecture affect them. We address this problem with the following contributions: (i) a coreRMA language which serves as a common foundation, formalizing the essential characteristics of RMA programming; (ii) complete axiomatic semantics for that language; (iii) integration of our semantics with an existing constraint solver, enabling us to exhaustively generate coreRMA programs (litmus tests) up to a specified bound and check whether the tests satisfy their specification; and (iv) extensive validation of our semantics on real-world RMA systems. We generated and ran 7441 litmus tests using each of the low-level RMA network APIs: DMAPP, VPI Verbs, and Portals 4. Our results confirmed that our model successfully captures behaviors exhibited by these networks. Moreover, we found RMA programs that behave inconsistently with existing documentation, confirmed by network experts. Our work provides an important step towards understanding existing RMA networks, thus influencing the design of future RMA interfaces and hardware.

  • Notified Access: Extending Remote Memory Access Programming Models for Producer-Consumer Synchronization
    2016
    Co-Authors: Roberto Belli, Torsten Hoefler
    Abstract:

    Abstract—Remote Memory Access (RMA) programming enables direct Access to low-level hardware features to achieve high performance for distributed-Memory programs. However, the design of RMA programming schemes focuses on the Memory Access and less on process synchronization. For exam-ple, in contemporary RMA programming systems, the widely used producer-consumer pattern can only be implemented inefficiently, incurring the overhead of an additional round-trip message. We propose Notified Access, a scheme where the target process of an Access can receive a completion notification. This scheme enables direct and efficient synchronization with a minimum number of messages. We implement our scheme in an open source MPI-3 RMA library and demonstrate lower overheads (two cache misses) than other point-to-point syn-chronization mechanisms. We also evaluate our implementation on three real-world benchmarks: a stencil computation, a tree computation, and a Cholesky factorization implemented with tasks. Our scheme always performs better than traditional message passing and other existing RMA synchronization schemes, providing up to 50 % speedup on small messages. Our analysis shows that Notified Access is a valuable primitive for any RMA system. Furthermore, we provide guidance for the design of low-level network interfaces to support Notified Access efficiently. Keywords-RMA; synchronization; notification; MP

  • Remote Memory Access Programming in MPI-3
    ACM Transactions on Parallel Computing, 2015
    Co-Authors: Torsten Hoefler, James Dinan, Rajeev Thakur, Brian W. Barrett, Pavan Balaji, William Gropp, Keith D. Underwood
    Abstract:

    The Message Passing Interface (MPI) 3.0 standard, introduced in September 2012, includes a significant update to the one-sided communication interface, also known as Remote Memory Access (RMA). In particular, the interface has been extended to better support popular one-sided and global-address-space parallel programming models to provide better Access to hardware performance features and enable new data-Access modes. We present the new RMA interface and specify formal axiomatic models for data consistency and Access semantics. Such models can help users reason about details of the semantics that are hard to extract from the English prose in the standard. It also fosters the development of tools and compilers, enabling them to automatically analyze, optimize, and debug RMA programs.

Vinod Tipparaju - One of the best experts on this subject based on the ideXlab platform.

  • IPDPS - Evaluation of Remote Memory Access Communication on the Cray XT3
    2007 IEEE International Parallel and Distributed Processing Symposium, 2007
    Co-Authors: Vinod Tipparaju, M.t. Bruggencate, Jarek Nieplocha, Nikos Chrisochoides
    Abstract:

    This paper evaluates Remote Memory Access (RMA) communication capabilities and performance on the Cray XT3. We discuss properties of the network hardware and portals networking software layer and corresponding implementation issues for SHMEM and ARMCI portable RMA interfaces. The performance of these interfaces is studied and compared to MPI performance.

  • IPDPS - Evaluation of Remote Memory Access Communication on the Cray XT3
    2007 IEEE International Parallel and Distributed Processing Symposium, 2007
    Co-Authors: Vinod Tipparaju, M.t. Bruggencate, J. Nieplocha, Nikos Chrisochoides
    Abstract:

    This paper evaluates Remote Memory Access (RMA) communication capabilities and performance on the Cray XT3. We discuss properties of the network hardware and portals networking software layer and corresponding implementation issues for SHMEM and ARMCI portable RMA interfaces. The performance of these interfaces is studied and compared to MPI performance.

  • High Performance Remote Memory Access Communication: The Armci Approach
    The International Journal of High Performance Computing Applications, 2006
    Co-Authors: J. Nieplocha, Vinod Tipparaju, Manojkumar Krishnan, Dhabaleswar K. Panda
    Abstract:

    This paper describes the Aggregate Remote Memory Copy Interface (ARMCI), a portable high performance Remote Memory Access communication interface, developed oriinally under the U.S. Department of Energy (DOE) Advanced Computational Testing and Simulation Toolkit project and currently used and advanced as a part of the run-time layer of the DOE project, Programming Models for Scalble Parallel Computing. The paper discusses the model, addresses challenges of portable implementations, and demonstrates that ARMCI delivers high performance on a variety of platforms. Special emphasis is placed on the latency hiding mechanisms and ability to optimize noncotiguous data transfers.

  • Euro-Par - Symmetric data objects and Remote Memory Access communication for fortran-95 applications
    Euro-Par 2005 Parallel Processing, 2005
    Co-Authors: Jarek Nieplocha, Vinod Tipparaju, Doug Baxter, Craig Rasmunssen, Robert W. Numrich
    Abstract:

    Symmetric data objects have been introduced by Cray Inc. in context of SHMEM Remote Memory Access communication on Cray T3D/E systems and later adopted by SGI for their Origin servers. Symmetric data objects greatly simplify parallel programming by allowing programmers to reference Remote instance of a data structure by specifying address of the local counterpart. The current paper describes how symmetric data objects and Remote Memory Access communication could be implemented in Fortran-95 without requiring specialized hardware or compiler support. NAS Multi-Grid parallel benchmark was used as an application example and demonstrated competitive performance to the standard MPI implementation.

  • Optimizing strided Remote Memory Access operations on the Quadrics QsNetII network interconnect
    Eighth International Conference on High-Performance Computing in Asia-Pacific Region (HPCASIA'05), 2005
    Co-Authors: J. Nieplocha, Vinod Tipparaju, Manojkumar Krishnan
    Abstract:

    This paper describes and evaluates protocols for optimizing strided noncontiguous communication on the Quadrics QsNetII high-performance network interconnect. Most of previous related studies focused primarily on NIC-based or host-based protocols. This paper discusses merits for using both approaches and tries to determine types and data sizes in the communication operations for which these protocols should be used. We focus on the Quadrics QsNetll network, which offers powerful communication processors on the network interface card (NIC) and practical and flexible opportunities for exploiting them in context of the user. Furthermore, the paper focuses on noncontiguous data Remote Memory Access (RMA) transfers and performs the evaluation in context of standalone communication and application microbenchmarks. In comparison to the vendor provided noncontiguous interfaces, proposed approach achieved significant performance improvement in context of microbenchmarks as well as application kernels; dense matrix multiplication, and the Co-Array Fortran version of the NAS BT parallel benchmark. For example, for NAS BT Class B, 54 % improvement in overall communication time and a 42% improvement in matrix multiplication was achieved for 64 processes

Michael L Scott - One of the best experts on this subject based on the ideXlab platform.

  • vm based shared Memory on low latency Remote Memory Access networks
    International Symposium on Computer Architecture, 1997
    Co-Authors: Leonidas Kontothanassis, Galen C Hunt, Robert Stets, Nikolaos Hardavellas, Michal Cierniak, Srinivasan Parthasarathy, Wagner Meira, Sandhya Dwarkadas, Michael L Scott
    Abstract:

    Recent technological advances have produced network interfaces that provide users with very low-latency Access to the Memory of Remote machines. We examine the impact of such networks on the implementation and performance of software DSM. Specifically, we compare two DSM systems---Cashmere and TreadMarks---on a 32-processor DEC Alpha cluster connected by a Memory Channel network.Both Cashmere and TreadMarks use virtual Memory to maintain coherence on pages, and both use lazy, multi-writer release consistency. The systems differ dramatically, however, in the mechanisms used to track sharing information and to collect and merge concurrent updates to a page, with the result that Cashmere communicates much more frequently, and at a much finer grain.Our principal conclusion is that low-latency networks make DSM based on fine-grain communication competitive with more coarse-grain approaches, but that further hardware improvements will be needed before such systems can provide consistently superior performance. In our experiments, Cashmere scales slightly better than TreadMarks for applications with false sharing. At the same time, it is severely constrained by limitations of the current Memory Channel hardware. In general, performance is better for TreadMarks.

  • ISCA - VM-based shared Memory on low-latency, Remote-Memory-Access networks
    Proceedings of the 24th annual international symposium on Computer architecture - ISCA '97, 1997
    Co-Authors: Leonidas Kontothanassis, Galen C Hunt, Robert Stets, Nikolaos Hardavellas, Michal Cierniak, Srinivasan Parthasarathy, Wagner Meira, Sandhya Dwarkadas, Michael L Scott
    Abstract:

    Recent technological advances have produced network interfaces that provide users with very low-latency Access to the Memory of Remote machines. We examine the impact of such networks on the implementation and performance of software DSM. Specifically, we compare two DSM systems---Cashmere and TreadMarks---on a 32-processor DEC Alpha cluster connected by a Memory Channel network.Both Cashmere and TreadMarks use virtual Memory to maintain coherence on pages, and both use lazy, multi-writer release consistency. The systems differ dramatically, however, in the mechanisms used to track sharing information and to collect and merge concurrent updates to a page, with the result that Cashmere communicates much more frequently, and at a much finer grain.Our principal conclusion is that low-latency networks make DSM based on fine-grain communication competitive with more coarse-grain approaches, but that further hardware improvements will be needed before such systems can provide consistently superior performance. In our experiments, Cashmere scales slightly better than TreadMarks for applications with false sharing. At the same time, it is severely constrained by limitations of the current Memory Channel hardware. In general, performance is better for TreadMarks.

  • vm based shared Memory on low latency Remote Memory Access networks
    VM-Based Shared Memory on Low-Latency Remote-Memory-Access Networks, 1996
    Co-Authors: Leonidas Kontothanassis, Galen C Hunt, Robert Stets, Nikolaos Hardavellas, Michal Cierniak, Srinivasan Parthasarathy, Wagner Meira, Sandhya Dwarkadas, Michael L Scott
    Abstract:

    Recent technological advances have produced network interfaces that provide users with very low-latency Access to the Memory of Remote machines. We examine the impact of such networks on the implementation and performance of software DSM. Specifically, we compare two DSM systems---Cashmere and TreadMarks---on a 32-processor DEC Alpha cluster connected by a Memory Channel network. .pp Both Cashmere and TreadMarks use virtual Memory to maintain coherence on pages, and both use lazy, multi-writer release consistency. The systems differ dramatically, however, in the mechanisms used to track sharing information and to collect and merge concurrent updates to a page, with the result that Cashmere communicates much more frequently, and at a much finer grain. .pp Our principal conclusion is that low-latency networks make DSM based on fine-grain communication competitive with more coarse-grain approaches, but that further hardware improvements will be needed before such systems can provide consistently superior performance. In our experiments, Cashmere scales slightly better than TreadMarks for applications with fine-grain interleaving of Accesses to shared data. At the same time, it is severely constrained by limitations of the current Memory Channel hardware. On average, performance is better for TreadMarks. Because most of its messages require Remote processing, TreadMarks depends critically on the latency of interrupts: performance improves greatly when processors poll for messages.

  • Kernel‐Kernel communication in a shared‐Memory multiprocessor
    Concurrency: Practice and Experience, 1993
    Co-Authors: Eliseu M. Chaves, Prakash Ch. Das, Thomas J. Leblanc, Brian D. Marsh, Michael L Scott
    Abstract:

    SUMMARY In the standard kernel organization on a bus-based multiprocessor, all processors share the code and data of the operating system; explicit synchronization is used to control Access to kernel data structures. Distributed-Memory multicomputers use an alternative approach, in which each instance of the kernel performs local operations directly and uses Remote invocation to perform Remote operations. Either approach to interkernel communication can be used in a large-scale shared-Memory multiprocessor. In the paper we discuss the issues and architectural features that must be considered when choosing between Remote Memory Access and Remote invocation. We focus in particular on experience with the Psyche multiprocessor operating system on the BBN Butterfly Plus. We find that the Butterfly architecture is biased towards the use of Remote Invocation for kernel operations that perform a significant number of Memory references, and that current architectural trends are likely to increase this bias in future machines. This conclusion suggests that straightforward parallelization of existing kernels (e.g. by using semaphores to protect shared data) is unlikely in the future to yield acceptable performance. We note, however, that Remote Memory Access is useful for small, frequently-executed operations, and is likely to remain so.

Manojkumar Krishnan - One of the best experts on this subject based on the ideXlab platform.

  • Optimizing performance on massively parallel computers using a Remote Memory Access programming model
    2010
    Co-Authors: Robert R. Lewis, Manojkumar Krishnan
    Abstract:

    Parallel programming models are of paramount importance because they affect both the performance delivered by massively parallel systems and the productivity of the programmer seeking that performance. Advancements in networks, multicore chips, and related technology continue to improve the efficiency of modern supercomputers. However, the average application efficiency is a small fraction of the peak system efficiency. This research proposes techniques for optimizing application performance on supercomputers using Remote Memory Access (RMA) parallel programming model. The growing gaps between CPU-network and CPU-Memory timescales are fundamental problems that require attention in the design of communication models as well as scalable parallel algorithms. This research validates the RMA model because of its simplicity, its good hardware support on modern networks, and its posession of certain characteristics important for reducing the performance gap between system peak and application performance. The effectiveness of these optimizations is evaluated in the context of parallel linear algebra kernels. The current approach differs from the other linear algebra algorithms by the explicit use of shared Memory and Remote Memory Access communication rather than message passing. It is suitable for clusters and scalable shared Memory systems. The experimental results on large scale systems (Linux-Infiniband cluster, Cray XT) demonstrate consistent performance advantages over the ScaLAPACK suite, the leading implementation of parallel linear algebra algorithms used today.

  • ICPP Workshops - Scaling Linear Algebra Kernels Using Remote Memory Access
    2010 39th International Conference on Parallel Processing Workshops, 2010
    Co-Authors: Manojkumar Krishnan, Robert R. Lewis, Abhinav Vishnu
    Abstract:

    This paper describes the scalability of linear algebra kernels based on Remote Memory Access approach. The current approach differs from the other linear algebra algorithms by the explicit use of shared Memory and Remote Memory Access (RMA) communication rather than message passing. It is suitable for clusters and scalable shared Memory systems. The experimental results on large scale systems (Linux-Infiniband cluster, Cray XT) demonstrate consistent performance advantages over ScaLAPACK suite, the leading implementation of parallel linear algebra algorithms used today. For example, on a Cray XT4 for a matrix size of 102400, our RMA-based matrix multiplication achieved over 55 tera???ops while ScaLAPACK’s pdgemm measured close to 42 tera???ops on 10000 processes.

  • evaluation of Remote Memory Access communication on the ibm blue gene p supercomputer
    International Conference on Parallel Processing, 2008
    Co-Authors: Manojkumar Krishnan, J. Nieplocha, Michael A Blocksome, Brian E Smith
    Abstract:

    This paper evaluates the performance of Remote Memory Access (RMA) communication and its capabilities on the blue gene/P supercomputer. This study includes the high performance implementation and performance of global arrays (GA) and its runtime system, aggregate Remote Memory copy interface (ARMCI). Our implementation of GA/ARMCI on blue gene/P is on top of the IBM deep computing messaging framework (DCMF), a communication runtime designed for the Blue Gene/P machine to easily support several programming paradigms such as message passing interface (MPI) and Remote Memory Access (e.g. GA/ARMCI). The performance of DCMF, ARMCI, and GA are studied and compared to MPI performance.

  • ICPP Workshops - Evaluation of Remote Memory Access Communication on the IBM Blue Gene/P Supercomputer
    2008 International Conference on Parallel Processing - Workshops, 2008
    Co-Authors: Manojkumar Krishnan, J. Nieplocha, Michael A Blocksome, Brian E Smith
    Abstract:

    This paper evaluates the performance of Remote Memory Access (RMA) communication and its capabilities on the blue gene/P supercomputer. This study includes the high performance implementation and performance of global arrays (GA) and its runtime system, aggregate Remote Memory copy interface (ARMCI). Our implementation of GA/ARMCI on blue gene/P is on top of the IBM deep computing messaging framework (DCMF), a communication runtime designed for the Blue Gene/P machine to easily support several programming paradigms such as message passing interface (MPI) and Remote Memory Access (e.g. GA/ARMCI). The performance of DCMF, ARMCI, and GA are studied and compared to MPI performance.

  • High Performance Remote Memory Access Communication: The Armci Approach
    The International Journal of High Performance Computing Applications, 2006
    Co-Authors: J. Nieplocha, Vinod Tipparaju, Manojkumar Krishnan, Dhabaleswar K. Panda
    Abstract:

    This paper describes the Aggregate Remote Memory Copy Interface (ARMCI), a portable high performance Remote Memory Access communication interface, developed oriinally under the U.S. Department of Energy (DOE) Advanced Computational Testing and Simulation Toolkit project and currently used and advanced as a part of the run-time layer of the DOE project, Programming Models for Scalble Parallel Computing. The paper discusses the model, addresses challenges of portable implementations, and demonstrates that ARMCI delivers high performance on a variety of platforms. Special emphasis is placed on the latency hiding mechanisms and ability to optimize noncotiguous data transfers.

J. Nieplocha - One of the best experts on this subject based on the ideXlab platform.

  • evaluation of Remote Memory Access communication on the ibm blue gene p supercomputer
    International Conference on Parallel Processing, 2008
    Co-Authors: Manojkumar Krishnan, J. Nieplocha, Michael A Blocksome, Brian E Smith
    Abstract:

    This paper evaluates the performance of Remote Memory Access (RMA) communication and its capabilities on the blue gene/P supercomputer. This study includes the high performance implementation and performance of global arrays (GA) and its runtime system, aggregate Remote Memory copy interface (ARMCI). Our implementation of GA/ARMCI on blue gene/P is on top of the IBM deep computing messaging framework (DCMF), a communication runtime designed for the Blue Gene/P machine to easily support several programming paradigms such as message passing interface (MPI) and Remote Memory Access (e.g. GA/ARMCI). The performance of DCMF, ARMCI, and GA are studied and compared to MPI performance.

  • ICPP Workshops - Evaluation of Remote Memory Access Communication on the IBM Blue Gene/P Supercomputer
    2008 International Conference on Parallel Processing - Workshops, 2008
    Co-Authors: Manojkumar Krishnan, J. Nieplocha, Michael A Blocksome, Brian E Smith
    Abstract:

    This paper evaluates the performance of Remote Memory Access (RMA) communication and its capabilities on the blue gene/P supercomputer. This study includes the high performance implementation and performance of global arrays (GA) and its runtime system, aggregate Remote Memory copy interface (ARMCI). Our implementation of GA/ARMCI on blue gene/P is on top of the IBM deep computing messaging framework (DCMF), a communication runtime designed for the Blue Gene/P machine to easily support several programming paradigms such as message passing interface (MPI) and Remote Memory Access (e.g. GA/ARMCI). The performance of DCMF, ARMCI, and GA are studied and compared to MPI performance.

  • IPDPS - Evaluation of Remote Memory Access Communication on the Cray XT3
    2007 IEEE International Parallel and Distributed Processing Symposium, 2007
    Co-Authors: Vinod Tipparaju, M.t. Bruggencate, J. Nieplocha, Nikos Chrisochoides
    Abstract:

    This paper evaluates Remote Memory Access (RMA) communication capabilities and performance on the Cray XT3. We discuss properties of the network hardware and portals networking software layer and corresponding implementation issues for SHMEM and ARMCI portable RMA interfaces. The performance of these interfaces is studied and compared to MPI performance.

  • High Performance Remote Memory Access Communication: The Armci Approach
    The International Journal of High Performance Computing Applications, 2006
    Co-Authors: J. Nieplocha, Vinod Tipparaju, Manojkumar Krishnan, Dhabaleswar K. Panda
    Abstract:

    This paper describes the Aggregate Remote Memory Copy Interface (ARMCI), a portable high performance Remote Memory Access communication interface, developed oriinally under the U.S. Department of Energy (DOE) Advanced Computational Testing and Simulation Toolkit project and currently used and advanced as a part of the run-time layer of the DOE project, Programming Models for Scalble Parallel Computing. The paper discusses the model, addresses challenges of portable implementations, and demonstrates that ARMCI delivers high performance on a variety of platforms. Special emphasis is placed on the latency hiding mechanisms and ability to optimize noncotiguous data transfers.

  • Optimizing strided Remote Memory Access operations on the Quadrics QsNetII network interconnect
    Eighth International Conference on High-Performance Computing in Asia-Pacific Region (HPCASIA'05), 2005
    Co-Authors: J. Nieplocha, Vinod Tipparaju, Manojkumar Krishnan
    Abstract:

    This paper describes and evaluates protocols for optimizing strided noncontiguous communication on the Quadrics QsNetII high-performance network interconnect. Most of previous related studies focused primarily on NIC-based or host-based protocols. This paper discusses merits for using both approaches and tries to determine types and data sizes in the communication operations for which these protocols should be used. We focus on the Quadrics QsNetll network, which offers powerful communication processors on the network interface card (NIC) and practical and flexible opportunities for exploiting them in context of the user. Furthermore, the paper focuses on noncontiguous data Remote Memory Access (RMA) transfers and performs the evaluation in context of standalone communication and application microbenchmarks. In comparison to the vendor provided noncontiguous interfaces, proposed approach achieved significant performance improvement in context of microbenchmarks as well as application kernels; dense matrix multiplication, and the Co-Array Fortran version of the NAS BT parallel benchmark. For example, for NAS BT Class B, 54 % improvement in overall communication time and a 42% improvement in matrix multiplication was achieved for 64 processes