The Experts below are selected from a list of 7875 Experts worldwide ranked by ideXlab platform
Vern Solberg - One of the best experts on this subject based on the ideXlab platform.
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High density substrate solution for complex high pin count flip-chip applications
2010 IEEE CPMT Symposium Japan, 2010Co-Authors: Vern SolbergAbstract:There are a number of factors to consider when selecting an optimal semiconductor Package configuration for the newer generations of high density controllers and processors; I/O Requirement, Package footprint, form factor, thermal dissipation, electrical performance, and cost. The more advanced microprocessor and ASIC semiconductor packaging currently require several thousand I/O contacts and they are expected to expand contact I/O by 30% in the very near future. This paper will detail the development of a unique raised contact substrate fabrication process that enables semiconductor developers to significantly reduce the contact pitch on the die without reducing pad size. The flip-chip to substrate assembly process yield is significantly higher as well because the conventional solder bumped die can be placed directly onto the raised contact features (eliminating the need for solder printing on the Package substrate). Mounting the bumped die element on this planer topography solves fundamental issues associated with electro-migration and it avoids many of the current assembly process related defects. This is because the solid copper contact profile furnishes a consistent standoff height that enables a uniform and void free Package interconnect as well as improving underfill flow control (even with low temperature solders).
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Improving Package assembly process yield for complex high density flip chip applications
2009 11th Electronics Packaging Technology Conference, 2009Co-Authors: Vern Solberg, Vage OganesianAbstract:The more advanced microprocessor and ASIC semiconductor packaging currently require several thousand I/O contacts and they are expected to expand contact I/O by 30% in the very near future. Consistent die-to-substrate interface, however, remains the most critical barrier in achieving optimum assembly process yield. Semiconductor suppliers have abandoned the traditional wirebond Package assembly for many of these higher I/O products, opting for the more compact die face-down flip-chip attachment methodology. This face-down, direct attachment method significantly reduces the semiconductors Package size as well as enhancing product performance. While wire-bond interface may remain the preference for many applications, face-down direct chip attachment has gained popularity for the higher-speed processor and ASIC products. There are a number of factors to consider when selecting an optimal semiconductor Package configuration for the newer generations of high density controllers and processors; I/O Requirement, Package footprint, form factor, thermal dissipation, electrical performance, and cost. This paper will describe a new interconnect solution developed to provide a very uniform array of raised solid copper contact features integrated onto the substrate interposer for mounting very fine pitch bumped flip-chip semiconductor die. This unique raised contact substrate enables semiconductor developers to significantly reduce contact pitch on the die without reducing pad size. Solder bumped die are placed directly onto the raised contact features eliminating the need for solder printing on the Package substrate. Mounting the bumped die element on this planer topography solves fundamental issues associated with electro-migration and avoids many of the current assembly process related defects. This is because the raised contact features provide a uniform Package interconnect that furnishes a consistent standoff height for improving underfill flow control even with low melt solders.
Vage Oganesian - One of the best experts on this subject based on the ideXlab platform.
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Improving Package assembly process yield for complex high density flip chip applications
2009 11th Electronics Packaging Technology Conference, 2009Co-Authors: Vern Solberg, Vage OganesianAbstract:The more advanced microprocessor and ASIC semiconductor packaging currently require several thousand I/O contacts and they are expected to expand contact I/O by 30% in the very near future. Consistent die-to-substrate interface, however, remains the most critical barrier in achieving optimum assembly process yield. Semiconductor suppliers have abandoned the traditional wirebond Package assembly for many of these higher I/O products, opting for the more compact die face-down flip-chip attachment methodology. This face-down, direct attachment method significantly reduces the semiconductors Package size as well as enhancing product performance. While wire-bond interface may remain the preference for many applications, face-down direct chip attachment has gained popularity for the higher-speed processor and ASIC products. There are a number of factors to consider when selecting an optimal semiconductor Package configuration for the newer generations of high density controllers and processors; I/O Requirement, Package footprint, form factor, thermal dissipation, electrical performance, and cost. This paper will describe a new interconnect solution developed to provide a very uniform array of raised solid copper contact features integrated onto the substrate interposer for mounting very fine pitch bumped flip-chip semiconductor die. This unique raised contact substrate enables semiconductor developers to significantly reduce contact pitch on the die without reducing pad size. Solder bumped die are placed directly onto the raised contact features eliminating the need for solder printing on the Package substrate. Mounting the bumped die element on this planer topography solves fundamental issues associated with electro-migration and avoids many of the current assembly process related defects. This is because the raised contact features provide a uniform Package interconnect that furnishes a consistent standoff height for improving underfill flow control even with low melt solders.
Ludmila Peņicina - One of the best experts on this subject based on the ideXlab platform.
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Towards a Method for Integrated Semi-Automated Business Process and Regulations Compliance Management for Continuous Requirements Engineering
2015Co-Authors: Ilze Gramste, Māris Darģis, Ludmila PeņicinaAbstract:Continuous change of Requirements poses a challenge for every modern organization. Especially, ever changing regulatory Requirements that affect business processes and, if not fulfilled, can cause an organization even legal problems. Also there is increased pressure on regulatory institutions when it comes to maintaining integrity and coherence of Requirement Package. By regulatory Requirements we mean legislation, regulations of municipalities, external regulatory Requirements and also internal organizational policies. The purpose of this paper is twofold, first, we briefly discuss existing limitations in existing business process modelling solution in the context of compliance management, and, second, we propose a high-level method to support organizations stay compliant with regulatory Requirements in the changing environment.
G. Singaravel - One of the best experts on this subject based on the ideXlab platform.
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Reducing Efforts on Software Project Management using Software Package Reusability
2009 IEEE International Advance Computing Conference, 2009Co-Authors: R. Kamalraj, B. G. Geetha, G. SingaravelAbstract:In Software Development Process Model, the reusability of elements can help to reduce the efforts of the project management for developing systems in a very short period. This paper focuses on the consecutive tasks like 'Domain Analysis', 'Package Analysis;' and 'System Analysis' for reusability to minimize the required technical efforts in development area. Domain analysis has various methods for verifying the project domains for getting the knowledge about the previous developed projects to match with the current project Requirement. Package Analysis is depending upon the result of 'Domain Analysis' when existing domain is similar to the current domain problem. In Package Analysis, the team has to find the components or Packages those can be reusable to satisfy any of the Requirements in the new problem domain. When specific Package(s) is selected for reusing that should be undergone various levels of Integration Testing to verify whether that Package(s) will not violate the non-functional Requirements are given by customer. When these 3 analysis phase are completed and got the results positively then the reusable Packages and related deliverables can use in the current development of system
Ilze Gramste - One of the best experts on this subject based on the ideXlab platform.
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Towards a Method for Integrated Semi-Automated Business Process and Regulations Compliance Management for Continuous Requirements Engineering
2015Co-Authors: Ilze Gramste, Māris Darģis, Ludmila PeņicinaAbstract:Continuous change of Requirements poses a challenge for every modern organization. Especially, ever changing regulatory Requirements that affect business processes and, if not fulfilled, can cause an organization even legal problems. Also there is increased pressure on regulatory institutions when it comes to maintaining integrity and coherence of Requirement Package. By regulatory Requirements we mean legislation, regulations of municipalities, external regulatory Requirements and also internal organizational policies. The purpose of this paper is twofold, first, we briefly discuss existing limitations in existing business process modelling solution in the context of compliance management, and, second, we propose a high-level method to support organizations stay compliant with regulatory Requirements in the changing environment.