The Experts below are selected from a list of 4752 Experts worldwide ranked by ideXlab platform
Amrita Deshpande - One of the best experts on this subject based on the ideXlab platform.
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programming parallel i2c slave devices from a single i2c data stream
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc Irazabal, Stephen Blozis, Paul BoogaardsAbstract:Consistent with one example embodiment, communications systems (100,300), using a serial data transfer bus having a serial data line (110) and a clock line (120) used to implement a communications protocol, incorporate programming of parallel slave devices (320,330,340,350) concurrently using an I2C serial bus. At least two slave devices are coupled in parallel on the data transfer bus and configured to load serial data over the serial data line using the communications protocol. Each slave device includes a programmable configuration register configured to be programmed, using the communications protocol, to select one of a plurality of selectable slave device configurations. One of the selectable slave device configurations causes the at least two slave devices to load the serial data in parallel, and another of the selectable slave device configurations causes the at least two slave devices to be loaded one at a time.
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dynamic i2c slave device address decoder
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc IrazabalAbstract:Consistent with one example embodiment, a communications system uses an I2C serial data transfer bus that has a serial data line (110) and a clock line (120) used to implement a communications protocol. The communications system includes a slave device having address pins (400), each coupled to the serial data line, clock line, power line, or ground. Communications circuitry communicates with a master device in accordance with the communications protocol over the data transfer bus. Decoding circuitry detects a first state of the address pins (410), detects a second state of the address pins (420) subsequent to the detection of the first state, wherein one or more logic values of the address pins differ between the first state and the second state, and decodes a slave device address (430) as a functional relationship between the first state and the second state of the address pins.
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i2c slave master interface enhancement using state machines
2006Co-Authors: Amrita DeshpandeAbstract:Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate enhanced slave/master interfacing on an I2C bus using state machines. The communications system includes a first and second state-machine responsive to the rising edge of the clock signal, and a third state-machine, distinctly operational from the first and second state-machine, responsive to the falling edge of the clock signal. One of the first state-machine and the second state-machine conform to write states of the communications protocol, and the other of the first state-machine and the second state-machine conform to read states of the communications protocol.
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simultaneous control of multiple i o banks in an i2c slave device
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc Irazabal, Stephen Blozis, Paul BoogaardsAbstract:Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate programmable loading of a logic value into parallel slave device registers. The communications system includes a slave device having two or more registers, each register having two or more bits, each register configured to load data therein received in accordance with the communications protocol over the data transfer bus in a first configuration, and to load a single logic value into the plurality of bits in a second configuration. A programmable configuration register is configured to be programmed, in accordance with the communications protocol over the data transfer bus, to select two or more of the registers for loading of the single logic value into the two or more of bits of the selected registers in the second configuration.
Jeanmarc Irazabal - One of the best experts on this subject based on the ideXlab platform.
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programming parallel i2c slave devices from a single i2c data stream
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc Irazabal, Stephen Blozis, Paul BoogaardsAbstract:Consistent with one example embodiment, communications systems (100,300), using a serial data transfer bus having a serial data line (110) and a clock line (120) used to implement a communications protocol, incorporate programming of parallel slave devices (320,330,340,350) concurrently using an I2C serial bus. At least two slave devices are coupled in parallel on the data transfer bus and configured to load serial data over the serial data line using the communications protocol. Each slave device includes a programmable configuration register configured to be programmed, using the communications protocol, to select one of a plurality of selectable slave device configurations. One of the selectable slave device configurations causes the at least two slave devices to load the serial data in parallel, and another of the selectable slave device configurations causes the at least two slave devices to be loaded one at a time.
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dynamic i2c slave device address decoder
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc IrazabalAbstract:Consistent with one example embodiment, a communications system uses an I2C serial data transfer bus that has a serial data line (110) and a clock line (120) used to implement a communications protocol. The communications system includes a slave device having address pins (400), each coupled to the serial data line, clock line, power line, or ground. Communications circuitry communicates with a master device in accordance with the communications protocol over the data transfer bus. Decoding circuitry detects a first state of the address pins (410), detects a second state of the address pins (420) subsequent to the detection of the first state, wherein one or more logic values of the address pins differ between the first state and the second state, and decodes a slave device address (430) as a functional relationship between the first state and the second state of the address pins.
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simultaneous control of multiple i o banks in an i2c slave device
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc Irazabal, Stephen Blozis, Paul BoogaardsAbstract:Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate programmable loading of a logic value into parallel slave device registers. The communications system includes a slave device having two or more registers, each register having two or more bits, each register configured to load data therein received in accordance with the communications protocol over the data transfer bus in a first configuration, and to load a single logic value into the plurality of bits in a second configuration. A programmable configuration register is configured to be programmed, in accordance with the communications protocol over the data transfer bus, to select two or more of the registers for loading of the single logic value into the two or more of bits of the selected registers in the second configuration.
Paul Boogaards - One of the best experts on this subject based on the ideXlab platform.
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programming parallel i2c slave devices from a single i2c data stream
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc Irazabal, Stephen Blozis, Paul BoogaardsAbstract:Consistent with one example embodiment, communications systems (100,300), using a serial data transfer bus having a serial data line (110) and a clock line (120) used to implement a communications protocol, incorporate programming of parallel slave devices (320,330,340,350) concurrently using an I2C serial bus. At least two slave devices are coupled in parallel on the data transfer bus and configured to load serial data over the serial data line using the communications protocol. Each slave device includes a programmable configuration register configured to be programmed, using the communications protocol, to select one of a plurality of selectable slave device configurations. One of the selectable slave device configurations causes the at least two slave devices to load the serial data in parallel, and another of the selectable slave device configurations causes the at least two slave devices to be loaded one at a time.
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simultaneous control of multiple i o banks in an i2c slave device
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc Irazabal, Stephen Blozis, Paul BoogaardsAbstract:Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate programmable loading of a logic value into parallel slave device registers. The communications system includes a slave device having two or more registers, each register having two or more bits, each register configured to load data therein received in accordance with the communications protocol over the data transfer bus in a first configuration, and to load a single logic value into the plurality of bits in a second configuration. A programmable configuration register is configured to be programmed, in accordance with the communications protocol over the data transfer bus, to select two or more of the registers for loading of the single logic value into the two or more of bits of the selected registers in the second configuration.
Alma Anderson - One of the best experts on this subject based on the ideXlab platform.
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programming parallel i2c slave devices from a single i2c data stream
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc Irazabal, Stephen Blozis, Paul BoogaardsAbstract:Consistent with one example embodiment, communications systems (100,300), using a serial data transfer bus having a serial data line (110) and a clock line (120) used to implement a communications protocol, incorporate programming of parallel slave devices (320,330,340,350) concurrently using an I2C serial bus. At least two slave devices are coupled in parallel on the data transfer bus and configured to load serial data over the serial data line using the communications protocol. Each slave device includes a programmable configuration register configured to be programmed, using the communications protocol, to select one of a plurality of selectable slave device configurations. One of the selectable slave device configurations causes the at least two slave devices to load the serial data in parallel, and another of the selectable slave device configurations causes the at least two slave devices to be loaded one at a time.
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dynamic i2c slave device address decoder
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc IrazabalAbstract:Consistent with one example embodiment, a communications system uses an I2C serial data transfer bus that has a serial data line (110) and a clock line (120) used to implement a communications protocol. The communications system includes a slave device having address pins (400), each coupled to the serial data line, clock line, power line, or ground. Communications circuitry communicates with a master device in accordance with the communications protocol over the data transfer bus. Decoding circuitry detects a first state of the address pins (410), detects a second state of the address pins (420) subsequent to the detection of the first state, wherein one or more logic values of the address pins differ between the first state and the second state, and decodes a slave device address (430) as a functional relationship between the first state and the second state of the address pins.
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simultaneous control of multiple i o banks in an i2c slave device
2006Co-Authors: Amrita Deshpande, Alma Anderson, Jeanmarc Irazabal, Stephen Blozis, Paul BoogaardsAbstract:Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate programmable loading of a logic value into parallel slave device registers. The communications system includes a slave device having two or more registers, each register having two or more bits, each register configured to load data therein received in accordance with the communications protocol over the data transfer bus in a first configuration, and to load a single logic value into the plurality of bits in a second configuration. A programmable configuration register is configured to be programmed, in accordance with the communications protocol over the data transfer bus, to select two or more of the registers for loading of the single logic value into the two or more of bits of the selected registers in the second configuration.
Guoping Liao - One of the best experts on this subject based on the ideXlab platform.
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method for solving communication deadlock of i2c inter integrated circuit bus
2012Co-Authors: Xiao Jun, Guoping LiaoAbstract:The invention discloses a method for solving the communication deadlock of an I2C (Inter-Integrated Circuit) bus. The I2C bus comprises a serial data line (SDA) and a serial clock line (SCL); the I2C bus is provided with a host and at least one slave; the method for solving the communication deadlock of the I2C bus comprises a host-based implementation method, wherein the implementation method comprises the following steps of: (A) monitoring a working state of the I2C bus, wherein the I2C bus is in a deadlock state if the host cannot send detection information to the slave of the I2C bus; (B) when the I2C bus is in the deadlock state, resetting a host module, and controlling the SCL to generate a clock pulse signal so as to unlock the slave of the I2C in the deadlock state; and (C) after unlocking the slave, reinitializing the host module to enable the normal work of the communication of the I2C bus again. According to the method for solving the communication deadlock of the I2C bus provided by the invention, no additional circuits are added, no additional cost is increased, the method for solving the communication deadlock of the I2C bus is applicable to any slave, the problem of deadlock can be rapidly and accurately solved, and no adverse effect can be brought for the normal operation of equipment.
