The Experts below are selected from a list of 6789 Experts worldwide ranked by ideXlab platform

Arijit Raychowdhury - One of the best experts on this subject based on the ideXlab platform.

  • practical approaches toward deep learning based cross device power Side Channel Attack
    IEEE Transactions on Very Large Scale Integration Systems, 2019
    Co-Authors: Anupam Golder, Debayan Das, Josef Danial, Santosh Ghosh, Shreyas Sen, Arijit Raychowdhury
    Abstract:

    Power Side-Channel analysis (SCA) has been of immense interest to most embedded designers to evaluate the physical security of the system. This work presents profiling-based cross-device power SCA Attacks using deep-learning techniques on 8-bit AVR microcontroller devices running AES-128. First, we show the practical issues that arise in these profiling-based cross-device Attacks due to significant device-to-device variations. Second, we show that utilizing principal component analysis (PCA)-based preprocessing and multidevice training, a multilayer perceptron (MLP)-based 256-class classifier can achieve an average accuracy of 99.43% in recovering the first keybyte from all the 30 devices in our data set, even in the presence of significant interdevice variations. Results show that the designed MLP with PCA-based preprocessing outperforms a convolutional neural network (CNN) with four-device training by ~20% in terms of the average test accuracy of cross-device Attack for the aligned traces captured using the ChipWhisperer hardware. Finally, to extend the practicality of these cross-device Attacks, another preprocessing step, namely, dynamic time warping (DTW) has been utilized to remove any misalignment among the traces, before performing PCA. DTW along with PCA followed by the 256-class MLP classifier provides ≥10.97% higher accuracy than the CNN-based approach for cross-device Attack even in the presence of up to 50 time-sample misalignments between the traces.

  • x deepsca cross device deep learning Side Channel Attack
    IACR Cryptology ePrint Archive, 2019
    Co-Authors: Debayan Das, Anupam Golder, Josef Danial, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen
    Abstract:

    This article, for the first time, demonstrates Cross-device Deep Learning Side-Channel Attack (X-DeepSCA), achieving an accuracy of > 99.9%, even in presence of significantly higher inter-device variations compared to the inter-key variations. Augmenting traces captured from multiple devices for training and with proper choice of hyper-parameters, the proposed 256-class Deep Neural Network (DNN) learns accurately from the power Side-Channel leakage of an AES-128 target encryption engine, and an N-trace (N ≤ 10) X-DeepSCA Attack breaks different target devices within seconds compared to a few minutes for a correlational power analysis (CPA) Attack, thereby increasing the threat surface for embedded devices significantly. Even for low SNR scenarios, the proposed X-DeepSCA Attack achieves ~ 10× lower minimum traces to disclosure (MTD) compared to a traditional CPA. CCS Concepts • Security and privacy $\rightarrow $ Embedded systems security; Side-Channel analysis and countermeasures.

  • asni attenuated signature noise injection for low overhead power Side Channel Attack immunity
    IEEE Transactions on Circuits and Systems, 2018
    Co-Authors: Shovan Maity, Santosh Ghosh, Saad Bin Nasir, Arijit Raychowdhury
    Abstract:

    Computationally-secure cryptographic algorithms implemented on a physical platform leak significant “ Side-Channel ” information through their power supplies. Correlational power Attack is an efficient power Side-Channel Attack (SCA) technique, which analyzes the statistical correlation between the estimated and the measured supply current traces to extract the secret key. The existing power SCA countermeasures are mainly based on reducing the SNR of the leaked information, power balancing, or gate-level masking, each of which introduces significant power, area or performance overheads, which calls for an efficient generic countermeasure. This paper presents ASNI: Attenuated Signature Noise Injection , which is an energy-efficient generic countermeasure, and shows SCA resistance on the AES-128 encryption as an application. ASNI uses a shunt low-drop-out (LDO) regulator to suppress the AES current signature by ${>}200 \times $ in the supply current traces. The shunt LDO has been fabricated and validated in 130 nm CMOS technology. System-level implementation of the ASNI, with the AES-128 core operating at 40 MHz, shows that the system remains secure even after 1 M encryptions, with $\sim 25 \times $ reduction in power overhead compared to that of noise addition alone.

  • high efficiency power Side Channel Attack immunity using noise injection in attenuated signature domain
    Hardware-Oriented Security and Trust, 2017
    Co-Authors: Debayan Das, Santosh Ghosh, Arijit Raychowdhury, Shovan Maity, Saad Bin Nasir, Shreyas Sen
    Abstract:

    With the advancement of technology in the last few decades, leading to the widespread availability of miniaturized sensors and internet-connected things (IoT), security of electronic devices has become a top priority. Side-Channel Attack (SCA) is one of the prominent methods to break the security of an encryption system by exploiting the information leaked from the physical devices. Correlational power Attack (CPA) is an efficient power Side-Channel Attack technique, which analyses the correlation between the estimated and measured supply current traces to extract the secret key. The existing countermeasures to the power Attacks are mainly based on reducing the SNR of the leaked data, or introducing large overhead using techniques like power balancing. This paper presents an attenuated signature AES (AS-AES), which resists SCA with minimal noise current overhead. AS-AES uses a shunt low-drop-out (LDO) regulator to suppress the AES current signature by 400x in the supply current traces. The shunt LDO has been fabricated and validated in 130 nm CMOS technology. System-level implementation of the AS-AES along with noise injection, shows that the system remains secure even after 50K encryptions, with 10x reduction in power overhead compared to that of noise addition alone.

Mohamed Saied Emam Mohamed - One of the best experts on this subject based on the ideXlab platform.

  • Improved algebraic Side-Channel Attack on AES
    Journal of Cryptographic Engineering, 2013
    Co-Authors: Mohamed Saied Emam Mohamed, Michael Zohner, Stanislav Bulygin, Annelie Heuser, Michael Walter, Johannes Buchmann
    Abstract:

    In this paper, we present improvements of the algebraic Side-Channel analysis of the Advanced Encryption Standard (AES) proposed in the works of M. Renauld and F.-X. Standaert. In particular, we optimize the algebraic representation of both the AES block cipher and obtained Side-Channel information, in the form of Hamming weights of intermediate states, in order to speed up the Attack and increase its success rate. We study the performance of our improved Attack in both known and unknown plaintext/ciphertext Attack scenarios. Our experiments indicate that in both cases the amount of required Side-Channel information is less than the one required in the Attacks introduced earlier. Furthermore, we introduce a method for handling erroneous Side-Channel information, which allows our improved algebraic Side-Channel Attack (IASCA) to partially escape the assumption of an error-free environment and thus become applicable in practice. We demonstrate the practical use of our IASCA by inserting predictions from a single-trace template Attack.

  • Improved algebraic Side-Channel Attack on AES
    Journal of Cryptographic Engineering, 2013
    Co-Authors: Mohamed Saied Emam Mohamed, Michael Zohner, Stanislav Bulygin, Annelie Heuser, Michael Walter, Johannes A. Buchmann
    Abstract:

    In this paper we present improvements of the algebraic Side-Channel analysis of the Advanced Encryption Standard ({AES)} proposed in [1]. In particular, we optimize the algebraic representation of {AES} and the algebraic representation of the obtained Side-Channel information in order to speed up the Attack and increase the success rate. We study the performance of our improvements in both known and unknown plaintext/ciphertext Attack scenarios. Our experiments indicate that in both cases the amount of required Side-Channel information is less than the one required in the Attacks introduced in [1]. Furthermore, we introduce a method for error handling, which allows our improved algebraic Side-Channel Attack to escape the assumption of an error-free environment and thus become applicable in practice. We demonstrate the practical use of our improved algebraic Side-Channel Attack by inserting predictions from a single-trace template Attack.

Santosh Ghosh - One of the best experts on this subject based on the ideXlab platform.

  • pg cas patterned ground co planar capacitive asymmetry sensing for mm range em Side Channel Attack probe detection
    International Symposium on Circuits and Systems, 2021
    Co-Authors: Donghyun Seo, Debayan Das, Santosh Ghosh, Mayukh Nath, Baibhab Chatterjee, Shreyas Sen
    Abstract:

    Electromagnetic (EM) Side-Channel analysis (SCA) Attack, which breaks cryptographic implementations, has become a major concern in the design of circuits and systems. This paper presents the design and analysis of the EM Side-Channel Attack detection system utilizing patterned-ground co-planar capacitive asymmetry sensing (PG-CAS) for approaching probe, targeting to improve sensitivity, detection range, and power consumption compared to LC oscillator utilizing inductive sensing. The PG-CAS consists of a grid of four metal plates of the same size at the top metal layer and a patterned ground plane at a lower metal. As an EM probe approaches, electric field lines between the plates and plate-ground get distorted, thereby breaking the symmetry of the inter-plate and the plate-ground capacitance system and this change in capacitance is sensed. The PG-CAS circuit consists of two LC oscillators, mixer, low pass filter (LPF), resistive feedback amplifier (RFA) and a digital logic. By down-converting sensing signal to low-frequency using mixer, LPF, RFA and digital logic, the detection range is significantly improved. At a distance of 1 mm between the sensing metal plates and the approaching EM probe, system-level simulation results using TSMC 65nm technology and Ansys Maxwell show a > 10% change in the output frequency from the baseline frequency, leading to a > 10× improvement in the detection range and a ~ 3× improvement in power consumption over existing inductive sensing methods.

  • practical approaches toward deep learning based cross device power Side Channel Attack
    IEEE Transactions on Very Large Scale Integration Systems, 2019
    Co-Authors: Anupam Golder, Debayan Das, Josef Danial, Santosh Ghosh, Shreyas Sen, Arijit Raychowdhury
    Abstract:

    Power Side-Channel analysis (SCA) has been of immense interest to most embedded designers to evaluate the physical security of the system. This work presents profiling-based cross-device power SCA Attacks using deep-learning techniques on 8-bit AVR microcontroller devices running AES-128. First, we show the practical issues that arise in these profiling-based cross-device Attacks due to significant device-to-device variations. Second, we show that utilizing principal component analysis (PCA)-based preprocessing and multidevice training, a multilayer perceptron (MLP)-based 256-class classifier can achieve an average accuracy of 99.43% in recovering the first keybyte from all the 30 devices in our data set, even in the presence of significant interdevice variations. Results show that the designed MLP with PCA-based preprocessing outperforms a convolutional neural network (CNN) with four-device training by ~20% in terms of the average test accuracy of cross-device Attack for the aligned traces captured using the ChipWhisperer hardware. Finally, to extend the practicality of these cross-device Attacks, another preprocessing step, namely, dynamic time warping (DTW) has been utilized to remove any misalignment among the traces, before performing PCA. DTW along with PCA followed by the 256-class MLP classifier provides ≥10.97% higher accuracy than the CNN-based approach for cross-device Attack even in the presence of up to 50 time-sample misalignments between the traces.

  • x deepsca cross device deep learning Side Channel Attack
    IACR Cryptology ePrint Archive, 2019
    Co-Authors: Debayan Das, Anupam Golder, Josef Danial, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen
    Abstract:

    This article, for the first time, demonstrates Cross-device Deep Learning Side-Channel Attack (X-DeepSCA), achieving an accuracy of > 99.9%, even in presence of significantly higher inter-device variations compared to the inter-key variations. Augmenting traces captured from multiple devices for training and with proper choice of hyper-parameters, the proposed 256-class Deep Neural Network (DNN) learns accurately from the power Side-Channel leakage of an AES-128 target encryption engine, and an N-trace (N ≤ 10) X-DeepSCA Attack breaks different target devices within seconds compared to a few minutes for a correlational power analysis (CPA) Attack, thereby increasing the threat surface for embedded devices significantly. Even for low SNR scenarios, the proposed X-DeepSCA Attack achieves ~ 10× lower minimum traces to disclosure (MTD) compared to a traditional CPA. CCS Concepts • Security and privacy $\rightarrow $ Embedded systems security; Side-Channel analysis and countermeasures.

  • asni attenuated signature noise injection for low overhead power Side Channel Attack immunity
    IEEE Transactions on Circuits and Systems, 2018
    Co-Authors: Shovan Maity, Santosh Ghosh, Saad Bin Nasir, Arijit Raychowdhury
    Abstract:

    Computationally-secure cryptographic algorithms implemented on a physical platform leak significant “ Side-Channel ” information through their power supplies. Correlational power Attack is an efficient power Side-Channel Attack (SCA) technique, which analyzes the statistical correlation between the estimated and the measured supply current traces to extract the secret key. The existing power SCA countermeasures are mainly based on reducing the SNR of the leaked information, power balancing, or gate-level masking, each of which introduces significant power, area or performance overheads, which calls for an efficient generic countermeasure. This paper presents ASNI: Attenuated Signature Noise Injection , which is an energy-efficient generic countermeasure, and shows SCA resistance on the AES-128 encryption as an application. ASNI uses a shunt low-drop-out (LDO) regulator to suppress the AES current signature by ${>}200 \times $ in the supply current traces. The shunt LDO has been fabricated and validated in 130 nm CMOS technology. System-level implementation of the ASNI, with the AES-128 core operating at 40 MHz, shows that the system remains secure even after 1 M encryptions, with $\sim 25 \times $ reduction in power overhead compared to that of noise addition alone.

  • high efficiency power Side Channel Attack immunity using noise injection in attenuated signature domain
    Hardware-Oriented Security and Trust, 2017
    Co-Authors: Debayan Das, Santosh Ghosh, Arijit Raychowdhury, Shovan Maity, Saad Bin Nasir, Shreyas Sen
    Abstract:

    With the advancement of technology in the last few decades, leading to the widespread availability of miniaturized sensors and internet-connected things (IoT), security of electronic devices has become a top priority. Side-Channel Attack (SCA) is one of the prominent methods to break the security of an encryption system by exploiting the information leaked from the physical devices. Correlational power Attack (CPA) is an efficient power Side-Channel Attack technique, which analyses the correlation between the estimated and measured supply current traces to extract the secret key. The existing countermeasures to the power Attacks are mainly based on reducing the SNR of the leaked data, or introducing large overhead using techniques like power balancing. This paper presents an attenuated signature AES (AS-AES), which resists SCA with minimal noise current overhead. AS-AES uses a shunt low-drop-out (LDO) regulator to suppress the AES current signature by 400x in the supply current traces. The shunt LDO has been fabricated and validated in 130 nm CMOS technology. System-level implementation of the AS-AES along with noise injection, shows that the system remains secure even after 50K encryptions, with 10x reduction in power overhead compared to that of noise addition alone.

Johannes A. Buchmann - One of the best experts on this subject based on the ideXlab platform.

  • Improved algebraic Side-Channel Attack on AES
    Journal of Cryptographic Engineering, 2013
    Co-Authors: Mohamed Saied Emam Mohamed, Michael Zohner, Stanislav Bulygin, Annelie Heuser, Michael Walter, Johannes A. Buchmann
    Abstract:

    In this paper we present improvements of the algebraic Side-Channel analysis of the Advanced Encryption Standard ({AES)} proposed in [1]. In particular, we optimize the algebraic representation of {AES} and the algebraic representation of the obtained Side-Channel information in order to speed up the Attack and increase the success rate. We study the performance of our improvements in both known and unknown plaintext/ciphertext Attack scenarios. Our experiments indicate that in both cases the amount of required Side-Channel information is less than the one required in the Attacks introduced in [1]. Furthermore, we introduce a method for error handling, which allows our improved algebraic Side-Channel Attack to escape the assumption of an error-free environment and thus become applicable in practice. We demonstrate the practical use of our improved algebraic Side-Channel Attack by inserting predictions from a single-trace template Attack.

Shreyas Sen - One of the best experts on this subject based on the ideXlab platform.

  • pg cas patterned ground co planar capacitive asymmetry sensing for mm range em Side Channel Attack probe detection
    International Symposium on Circuits and Systems, 2021
    Co-Authors: Donghyun Seo, Debayan Das, Santosh Ghosh, Mayukh Nath, Baibhab Chatterjee, Shreyas Sen
    Abstract:

    Electromagnetic (EM) Side-Channel analysis (SCA) Attack, which breaks cryptographic implementations, has become a major concern in the design of circuits and systems. This paper presents the design and analysis of the EM Side-Channel Attack detection system utilizing patterned-ground co-planar capacitive asymmetry sensing (PG-CAS) for approaching probe, targeting to improve sensitivity, detection range, and power consumption compared to LC oscillator utilizing inductive sensing. The PG-CAS consists of a grid of four metal plates of the same size at the top metal layer and a patterned ground plane at a lower metal. As an EM probe approaches, electric field lines between the plates and plate-ground get distorted, thereby breaking the symmetry of the inter-plate and the plate-ground capacitance system and this change in capacitance is sensed. The PG-CAS circuit consists of two LC oscillators, mixer, low pass filter (LPF), resistive feedback amplifier (RFA) and a digital logic. By down-converting sensing signal to low-frequency using mixer, LPF, RFA and digital logic, the detection range is significantly improved. At a distance of 1 mm between the sensing metal plates and the approaching EM probe, system-level simulation results using TSMC 65nm technology and Ansys Maxwell show a > 10% change in the output frequency from the baseline frequency, leading to a > 10× improvement in the detection range and a ~ 3× improvement in power consumption over existing inductive sensing methods.

  • practical approaches toward deep learning based cross device power Side Channel Attack
    IEEE Transactions on Very Large Scale Integration Systems, 2019
    Co-Authors: Anupam Golder, Debayan Das, Josef Danial, Santosh Ghosh, Shreyas Sen, Arijit Raychowdhury
    Abstract:

    Power Side-Channel analysis (SCA) has been of immense interest to most embedded designers to evaluate the physical security of the system. This work presents profiling-based cross-device power SCA Attacks using deep-learning techniques on 8-bit AVR microcontroller devices running AES-128. First, we show the practical issues that arise in these profiling-based cross-device Attacks due to significant device-to-device variations. Second, we show that utilizing principal component analysis (PCA)-based preprocessing and multidevice training, a multilayer perceptron (MLP)-based 256-class classifier can achieve an average accuracy of 99.43% in recovering the first keybyte from all the 30 devices in our data set, even in the presence of significant interdevice variations. Results show that the designed MLP with PCA-based preprocessing outperforms a convolutional neural network (CNN) with four-device training by ~20% in terms of the average test accuracy of cross-device Attack for the aligned traces captured using the ChipWhisperer hardware. Finally, to extend the practicality of these cross-device Attacks, another preprocessing step, namely, dynamic time warping (DTW) has been utilized to remove any misalignment among the traces, before performing PCA. DTW along with PCA followed by the 256-class MLP classifier provides ≥10.97% higher accuracy than the CNN-based approach for cross-device Attack even in the presence of up to 50 time-sample misalignments between the traces.

  • x deepsca cross device deep learning Side Channel Attack
    IACR Cryptology ePrint Archive, 2019
    Co-Authors: Debayan Das, Anupam Golder, Josef Danial, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen
    Abstract:

    This article, for the first time, demonstrates Cross-device Deep Learning Side-Channel Attack (X-DeepSCA), achieving an accuracy of > 99.9%, even in presence of significantly higher inter-device variations compared to the inter-key variations. Augmenting traces captured from multiple devices for training and with proper choice of hyper-parameters, the proposed 256-class Deep Neural Network (DNN) learns accurately from the power Side-Channel leakage of an AES-128 target encryption engine, and an N-trace (N ≤ 10) X-DeepSCA Attack breaks different target devices within seconds compared to a few minutes for a correlational power analysis (CPA) Attack, thereby increasing the threat surface for embedded devices significantly. Even for low SNR scenarios, the proposed X-DeepSCA Attack achieves ~ 10× lower minimum traces to disclosure (MTD) compared to a traditional CPA. CCS Concepts • Security and privacy $\rightarrow $ Embedded systems security; Side-Channel analysis and countermeasures.

  • high efficiency power Side Channel Attack immunity using noise injection in attenuated signature domain
    Hardware-Oriented Security and Trust, 2017
    Co-Authors: Debayan Das, Santosh Ghosh, Arijit Raychowdhury, Shovan Maity, Saad Bin Nasir, Shreyas Sen
    Abstract:

    With the advancement of technology in the last few decades, leading to the widespread availability of miniaturized sensors and internet-connected things (IoT), security of electronic devices has become a top priority. Side-Channel Attack (SCA) is one of the prominent methods to break the security of an encryption system by exploiting the information leaked from the physical devices. Correlational power Attack (CPA) is an efficient power Side-Channel Attack technique, which analyses the correlation between the estimated and measured supply current traces to extract the secret key. The existing countermeasures to the power Attacks are mainly based on reducing the SNR of the leaked data, or introducing large overhead using techniques like power balancing. This paper presents an attenuated signature AES (AS-AES), which resists SCA with minimal noise current overhead. AS-AES uses a shunt low-drop-out (LDO) regulator to suppress the AES current signature by 400x in the supply current traces. The shunt LDO has been fabricated and validated in 130 nm CMOS technology. System-level implementation of the AS-AES along with noise injection, shows that the system remains secure even after 50K encryptions, with 10x reduction in power overhead compared to that of noise addition alone.