The Experts below are selected from a list of 26418 Experts worldwide ranked by ideXlab platform
Baoyong Chi - One of the best experts on this subject based on the ideXlab platform.
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millimeter wave fmcw Signal Generators for radar applications
IEEE International Conference on Solid-State and Integrated Circuit Technology, 2018Co-Authors: Jianfu Lin, Haikun Jia, Baoyong ChiAbstract:Millimeter-wave radars could achieve high detection resolution and have drawn a lot of attention in recent years. Frequency-modulated continuous-wave (FMCW) radar is the most popular one in civil applications due to its low peak power and high integration, where the FMCW Signal Generator is one crucial block and has significant influence on the radar system performance. In this paper, three kinds of FMCW Signal Generator are presented, including a charge-pump based analog phase-locked loop (PLL), a Bang-Bang phase detector (BBPD) based mixed-mode PLL and a time-to-digital-converter (TDC) based mixed-mode PLL. The advantages and disadvantages of various Signal Generators are discussed, based on our recent research work. Techniques to support reconfigurable slopes or sawtooth-type chirp waveform and achieve better performance are also reviewed.
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a 77 ghz mixed mode fmcw Signal Generator based on bang bang phase detector
IEEE Journal of Solid-state Circuits, 2018Co-Authors: Jianfu Lin, Zheng Song, Woogeun Rhee, Zhihua Wang, Baoyong ChiAbstract:A 77-GHz frequency-modulated continuous-wave (FMCW) Signal Generator is presented for automobile millimeter-wave (mm-wave) radar applications. The reconfigurable chirp is generated by a mixed-mode synthesizer operating at 38.5 GHz, in which the frequency doubling scheme is used to improve the chirp bandwidth and simplify the design. The bang-bang phase detector (BBPD) is employed for phase detection in the synthesizer, avoiding complicated linear time-to-digital converter (TDC) as well as reducing design complexity and power consumption. A 1-bit third-order single-loop $\Delta \Sigma$ modulator (SLDSM3), combining with the hybrid finite-impulse-response (FIR) filtering technique, significantly suppresses the BBPD induced quantization noise. A type-III slope estimator with a switchable polarity is embedded in the digital loop filter (DLF) to improve the linearity around the chirp turning-around points (TAPs). Two infinite-impulse-response (IIR) filtering stages smoothen the generated chirp waveform by reducing the instant variation of the DLF’s output. Implemented in 65-nm CMOS, the proposed FMCW Signal Generator consumes 43.1-mW power and occupies 2-mm2 die area, including testing pads. The measured phase noise from the 38.5-GHz carrier is −87.7 dBc/Hz at 1-MHz offset. The measured root-mean-square (rms) frequency errors of the generated triangle chirps over the 1-ms period are 189 and 336 kHz, with 0.914- and 1.827-GHz chirp bandwidth, respectively.
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a 77 ghz mixed mode fmcw Signal Generator based on bang bang phase detector
Asian Solid-State Circuits Conference, 2017Co-Authors: Jianfu Lin, Zheng Song, Woogeun Rhee, Baoyong ChiAbstract:A 77-GHz mixed-mode frequency-modulated continuous-wave (FMCW) Signal Generator is proposed based on the bang-bang phase detector (BBPD). Instead of employing a linear digital-to-time converter (DTC), a 1-bit 3rd-order singleloop ΔΣ modulator (SLDSM3) and a hybrid finite-impulse response (FIR) filter are utilized to suppress the quantization noise induced by the BBPD. Two-stage infinite-impulse response (IIR) filters are inserted into the digital loop filter (DLF) to reduce the instant variation at output, smoothing the chirp waveform during its generation. To improve the linearity around the turning-around points (TAPs) of the chirp, a type-III slope estimator with switchable polarity is employed. The prototype is implemented in 65-nm CMOS technology, with the total power consumption of 43.1 mW. Measurement results show a 77-GHz carrier with −81.7-dBc/Hz phase noise at 1-MHz offset, as well as a generated triangle chirp that features 1-ms repetition period, 1.827-GHz bandwidth and 336-kHz root-mean-square (RMS) frequency error.
Jianfu Lin - One of the best experts on this subject based on the ideXlab platform.
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millimeter wave fmcw Signal Generators for radar applications
IEEE International Conference on Solid-State and Integrated Circuit Technology, 2018Co-Authors: Jianfu Lin, Haikun Jia, Baoyong ChiAbstract:Millimeter-wave radars could achieve high detection resolution and have drawn a lot of attention in recent years. Frequency-modulated continuous-wave (FMCW) radar is the most popular one in civil applications due to its low peak power and high integration, where the FMCW Signal Generator is one crucial block and has significant influence on the radar system performance. In this paper, three kinds of FMCW Signal Generator are presented, including a charge-pump based analog phase-locked loop (PLL), a Bang-Bang phase detector (BBPD) based mixed-mode PLL and a time-to-digital-converter (TDC) based mixed-mode PLL. The advantages and disadvantages of various Signal Generators are discussed, based on our recent research work. Techniques to support reconfigurable slopes or sawtooth-type chirp waveform and achieve better performance are also reviewed.
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a 77 ghz mixed mode fmcw Signal Generator based on bang bang phase detector
IEEE Journal of Solid-state Circuits, 2018Co-Authors: Jianfu Lin, Zheng Song, Woogeun Rhee, Zhihua Wang, Baoyong ChiAbstract:A 77-GHz frequency-modulated continuous-wave (FMCW) Signal Generator is presented for automobile millimeter-wave (mm-wave) radar applications. The reconfigurable chirp is generated by a mixed-mode synthesizer operating at 38.5 GHz, in which the frequency doubling scheme is used to improve the chirp bandwidth and simplify the design. The bang-bang phase detector (BBPD) is employed for phase detection in the synthesizer, avoiding complicated linear time-to-digital converter (TDC) as well as reducing design complexity and power consumption. A 1-bit third-order single-loop $\Delta \Sigma$ modulator (SLDSM3), combining with the hybrid finite-impulse-response (FIR) filtering technique, significantly suppresses the BBPD induced quantization noise. A type-III slope estimator with a switchable polarity is embedded in the digital loop filter (DLF) to improve the linearity around the chirp turning-around points (TAPs). Two infinite-impulse-response (IIR) filtering stages smoothen the generated chirp waveform by reducing the instant variation of the DLF’s output. Implemented in 65-nm CMOS, the proposed FMCW Signal Generator consumes 43.1-mW power and occupies 2-mm2 die area, including testing pads. The measured phase noise from the 38.5-GHz carrier is −87.7 dBc/Hz at 1-MHz offset. The measured root-mean-square (rms) frequency errors of the generated triangle chirps over the 1-ms period are 189 and 336 kHz, with 0.914- and 1.827-GHz chirp bandwidth, respectively.
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a 77 ghz mixed mode fmcw Signal Generator based on bang bang phase detector
Asian Solid-State Circuits Conference, 2017Co-Authors: Jianfu Lin, Zheng Song, Woogeun Rhee, Baoyong ChiAbstract:A 77-GHz mixed-mode frequency-modulated continuous-wave (FMCW) Signal Generator is proposed based on the bang-bang phase detector (BBPD). Instead of employing a linear digital-to-time converter (DTC), a 1-bit 3rd-order singleloop ΔΣ modulator (SLDSM3) and a hybrid finite-impulse response (FIR) filter are utilized to suppress the quantization noise induced by the BBPD. Two-stage infinite-impulse response (IIR) filters are inserted into the digital loop filter (DLF) to reduce the instant variation at output, smoothing the chirp waveform during its generation. To improve the linearity around the turning-around points (TAPs) of the chirp, a type-III slope estimator with switchable polarity is employed. The prototype is implemented in 65-nm CMOS technology, with the total power consumption of 43.1 mW. Measurement results show a 77-GHz carrier with −81.7-dBc/Hz phase noise at 1-MHz offset, as well as a generated triangle chirp that features 1-ms repetition period, 1.827-GHz bandwidth and 336-kHz root-mean-square (RMS) frequency error.
Shilong Pan - One of the best experts on this subject based on the ideXlab platform.
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a frequency tunable binary phase coded microwave Signal Generator with a tunable frequency multiplication factor
IEEE Photonics Journal, 2017Co-Authors: Yang Chen, Shilong PanAbstract:A novel frequency-tunable binary phase-coded microwave Signal Generator with a tunable frequency multiplication factor is proposed. The key component of the proposed system is a dual-polarization quadrature phase-shift-keying (DP-QPSK) modulator, which is driven by the microwave reference Signal and the coding Signal. By properly controlling the bias points of the DP-QPSK modulator and the amplitudes of the microwave reference Signal and the coding Signal, a fundamental, frequency-doubled, frequency-tripled or frequency-quadrupled binary phase-coded microwave Signal can be generated when two orthogonally polarized optical Signals at the output of the DP-QPSK modulator are combined and then detected in a photodetector. The proposed system is experimentally evaluated. A binary phase-coded microwave Signal is generated at the fundamental, doubled, tripled, or quadrupled frequency. The frequency tunability and the pulse compression performance of the generated phase-coded microwave Signals are also experimentally studied.
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phase coded microwave Signal generation based on a single electro optical modulator and its application in accurate distance measurement
Optics Express, 2015Co-Authors: Fangzheng Zhang, Bindong Gao, Shilong PanAbstract:A novel scheme for photonic generation of a phase-coded microwave Signal is proposed and its application in one-dimension distance measurement is demonstrated. The proposed Signal Generator has a simple and compact structure based on a single dual-polarization modulator. Besides, the generated phase-coded Signal is stable and free from the DC and low-frequency backgrounds. An experiment is carried out. A 2 Gb/s phase-coded Signal at 20 GHz is successfully generated, and the recovered phase information agrees well with the input 13-bit Barker code. To further investigate the performance of the proposed Signal Generator, its application in one-dimension distance measurement is demonstrated. The measurement accuracy is less than 1.7 centimeters within a measurement range of ~2 meters. The experimental results can verify the feasibility of the proposed phase-coded microwave Signal Generator and also provide strong evidence to support its practical applications.
Zheng Song - One of the best experts on this subject based on the ideXlab platform.
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a 77 ghz mixed mode fmcw Signal Generator based on bang bang phase detector
IEEE Journal of Solid-state Circuits, 2018Co-Authors: Jianfu Lin, Zheng Song, Woogeun Rhee, Zhihua Wang, Baoyong ChiAbstract:A 77-GHz frequency-modulated continuous-wave (FMCW) Signal Generator is presented for automobile millimeter-wave (mm-wave) radar applications. The reconfigurable chirp is generated by a mixed-mode synthesizer operating at 38.5 GHz, in which the frequency doubling scheme is used to improve the chirp bandwidth and simplify the design. The bang-bang phase detector (BBPD) is employed for phase detection in the synthesizer, avoiding complicated linear time-to-digital converter (TDC) as well as reducing design complexity and power consumption. A 1-bit third-order single-loop $\Delta \Sigma$ modulator (SLDSM3), combining with the hybrid finite-impulse-response (FIR) filtering technique, significantly suppresses the BBPD induced quantization noise. A type-III slope estimator with a switchable polarity is embedded in the digital loop filter (DLF) to improve the linearity around the chirp turning-around points (TAPs). Two infinite-impulse-response (IIR) filtering stages smoothen the generated chirp waveform by reducing the instant variation of the DLF’s output. Implemented in 65-nm CMOS, the proposed FMCW Signal Generator consumes 43.1-mW power and occupies 2-mm2 die area, including testing pads. The measured phase noise from the 38.5-GHz carrier is −87.7 dBc/Hz at 1-MHz offset. The measured root-mean-square (rms) frequency errors of the generated triangle chirps over the 1-ms period are 189 and 336 kHz, with 0.914- and 1.827-GHz chirp bandwidth, respectively.
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a 77 ghz mixed mode fmcw Signal Generator based on bang bang phase detector
Asian Solid-State Circuits Conference, 2017Co-Authors: Jianfu Lin, Zheng Song, Woogeun Rhee, Baoyong ChiAbstract:A 77-GHz mixed-mode frequency-modulated continuous-wave (FMCW) Signal Generator is proposed based on the bang-bang phase detector (BBPD). Instead of employing a linear digital-to-time converter (DTC), a 1-bit 3rd-order singleloop ΔΣ modulator (SLDSM3) and a hybrid finite-impulse response (FIR) filter are utilized to suppress the quantization noise induced by the BBPD. Two-stage infinite-impulse response (IIR) filters are inserted into the digital loop filter (DLF) to reduce the instant variation at output, smoothing the chirp waveform during its generation. To improve the linearity around the turning-around points (TAPs) of the chirp, a type-III slope estimator with switchable polarity is employed. The prototype is implemented in 65-nm CMOS technology, with the total power consumption of 43.1 mW. Measurement results show a 77-GHz carrier with −81.7-dBc/Hz phase noise at 1-MHz offset, as well as a generated triangle chirp that features 1-ms repetition period, 1.827-GHz bandwidth and 336-kHz root-mean-square (RMS) frequency error.
Woogeun Rhee - One of the best experts on this subject based on the ideXlab platform.
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a 77 ghz mixed mode fmcw Signal Generator based on bang bang phase detector
IEEE Journal of Solid-state Circuits, 2018Co-Authors: Jianfu Lin, Zheng Song, Woogeun Rhee, Zhihua Wang, Baoyong ChiAbstract:A 77-GHz frequency-modulated continuous-wave (FMCW) Signal Generator is presented for automobile millimeter-wave (mm-wave) radar applications. The reconfigurable chirp is generated by a mixed-mode synthesizer operating at 38.5 GHz, in which the frequency doubling scheme is used to improve the chirp bandwidth and simplify the design. The bang-bang phase detector (BBPD) is employed for phase detection in the synthesizer, avoiding complicated linear time-to-digital converter (TDC) as well as reducing design complexity and power consumption. A 1-bit third-order single-loop $\Delta \Sigma$ modulator (SLDSM3), combining with the hybrid finite-impulse-response (FIR) filtering technique, significantly suppresses the BBPD induced quantization noise. A type-III slope estimator with a switchable polarity is embedded in the digital loop filter (DLF) to improve the linearity around the chirp turning-around points (TAPs). Two infinite-impulse-response (IIR) filtering stages smoothen the generated chirp waveform by reducing the instant variation of the DLF’s output. Implemented in 65-nm CMOS, the proposed FMCW Signal Generator consumes 43.1-mW power and occupies 2-mm2 die area, including testing pads. The measured phase noise from the 38.5-GHz carrier is −87.7 dBc/Hz at 1-MHz offset. The measured root-mean-square (rms) frequency errors of the generated triangle chirps over the 1-ms period are 189 and 336 kHz, with 0.914- and 1.827-GHz chirp bandwidth, respectively.
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a 77 ghz mixed mode fmcw Signal Generator based on bang bang phase detector
Asian Solid-State Circuits Conference, 2017Co-Authors: Jianfu Lin, Zheng Song, Woogeun Rhee, Baoyong ChiAbstract:A 77-GHz mixed-mode frequency-modulated continuous-wave (FMCW) Signal Generator is proposed based on the bang-bang phase detector (BBPD). Instead of employing a linear digital-to-time converter (DTC), a 1-bit 3rd-order singleloop ΔΣ modulator (SLDSM3) and a hybrid finite-impulse response (FIR) filter are utilized to suppress the quantization noise induced by the BBPD. Two-stage infinite-impulse response (IIR) filters are inserted into the digital loop filter (DLF) to reduce the instant variation at output, smoothing the chirp waveform during its generation. To improve the linearity around the turning-around points (TAPs) of the chirp, a type-III slope estimator with switchable polarity is employed. The prototype is implemented in 65-nm CMOS technology, with the total power consumption of 43.1 mW. Measurement results show a 77-GHz carrier with −81.7-dBc/Hz phase noise at 1-MHz offset, as well as a generated triangle chirp that features 1-ms repetition period, 1.827-GHz bandwidth and 336-kHz root-mean-square (RMS) frequency error.
