Single Processor

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The Experts below are selected from a list of 48420 Experts worldwide ranked by ideXlab platform

Westerdiep Jan - One of the best experts on this subject based on the ideXlab platform.

  • A parallel algorithm for solving linear parabolic evolution equations
    2021
    Co-Authors: Van Venetië Raymond, Westerdiep Jan
    Abstract:

    We present an algorithm for the solution of a simultaneous space-time discretization of linear parabolic evolution equations with a symmetric differential operator in space. Building on earlier work, we recast this discretization into a Schur-complement equation whose solution is a quasi-optimal approximation to the weak solution of the equation at hand. Choosing a tensor-product discretization, we arrive at a remarkably simple linear system. Using wavelets in time and standard finite elements in space, we solve the resulting system in linear complexity on a Single Processor, and in polylogarithmic complexity when parallelized in both space and time. We complement these theoretical findings with large-scale parallel computations showing the effectiveness of the method

  • A scalable algorithm for solving linear parabolic evolution equations
    2020
    Co-Authors: Van Venetië Raymond, Westerdiep Jan
    Abstract:

    We present an algorithm for the solution of a simultaneous space-time discretization of linear parabolic evolution equations with a symmetric differential operator in space. Building on earlier work, we recast this discretization into a Schur-complement equation whose solution is a quasi-optimal approximation to the weak solution of the equation at hand. Choosing a tensor-product discretization, we arrive at a remarkably simple linear system. Using wavelets in time and standard finite elements in space, we solve the resulting system in optimal linear complexity on a Single Processor, and in optimal logarithmic complexity when parallelized in both space and time. We complement these theoretical findings with large-scale parallel computations showing the effectiveness of the method

Sunggu Lee - One of the best experts on this subject based on the ideXlab platform.

  • Processor allocation and task scheduling of matrix chain products on parallel systems
    IEEE Transactions on Parallel and Distributed Systems, 2003
    Co-Authors: Heejo Lee, Jong Kim, Sungje Hong, Sunggu Lee
    Abstract:

    The problem of finding an optimal product sequence for sequential multiplication of a chain of matrices (the matrix chain ordering problem, MCOP) is well-known. We consider the problem of finding an optimal product schedule for evaluating a chain of matrix products on a parallel computer (the matrix chain scheduling problem, MCSP). The difference between MCSP and MCOP is that MCOP pertains to a product sequence for Single Processor systems and MCSP pertains to a sequence of concurrent matrix products for parallel systems. The approach of parallelizing each matrix product after finding an optimal product sequence for Single Processor systems does not always guarantee minimum evaluation time on parallel systems since each parallelized matrix product may use Processors inefficiently. We introduce a new Processor scheduling algorithm for MCSP which reduces the evaluation time of a chain of matrix products on a parallel computer, even at the expense of a slight increase in the total number of operations. Given a chain of n matrices and a matrix product utilizing at most P/k Processors in a P-Processor system, the proposed algorithm approaches k(n-1)/(n+klog(k)-k) times the performance of parallel evaluation using the optimal sequence found for MCOP. Experiments performed on a Fujitsu AP1000 multicomputer also show that the proposed algorithm significantly decreases the time required to evaluate a chain of matrix products in parallel systems.

Ram Narasimhan - One of the best experts on this subject based on the ideXlab platform.

  • a comparison of four methods for minimizing total tardiness on a Single Processor with sequence dependent setup times
    Omega-international Journal of Management Science, 2000
    Co-Authors: Keah Choon Tan, Ram Narasimhan, Paul A Rubin, Gary L Ragatz
    Abstract:

    Abstract Much of the research on operations scheduling problems has either ignored setup times or assumed that setup times on each machine are independent of the job sequence. This paper considers the problem of scheduling a Single machine for minimizing total tardiness in a sequence dependent setup environment. The comparative performance of branch-and-bound, genetic search, simulated annealing and random-start pairwise interchange was evaluated in this problem setting. The experimental results suggest that simulated annealing and random-start pairwise interchange are viable solution techniques that can yield good solutions to a large combinatorial problem when considering the tardiness objective with sequence dependent setup times. However, branch-and-bound may be the preferred solution technique in solving smaller problems, and it is the only solution technique tested that will confirm an optimum solution has been reached. The methods considered in this research offer promise to deal with a class of scheduling problems, which have been considered difficult by both researchers and practitioners.

  • minimizing tardiness on a Single Processor with sequence dependent setup times a simulated annealing approach
    Omega-international Journal of Management Science, 1997
    Co-Authors: Keah Choon Tan, Ram Narasimhan
    Abstract:

    Abstract In today's fast-paced Just-In-Time and mass customization manufacturing in a sequence-dependent setup environment, the challenge of making production schedules to meet due-date requirements is becoming a more complex problem. Unfortunately, much of the research on operations scheduling problems has either ignored setup times or assumed that setup times on each machine are independent of the job sequence. This paper considers the problem of minimizing tardiness, a common measure of due-date performance, in a sequence-dependent setup environment. Simulated annealing was used to solve the sequencing problem, and its performance was compared with random search. Our experimental results show that the algorithm can find a good solution fairly quickly, and thus can rework schedules frequently to react to variations in the schedule. The algorithm is invaluable for ‘on-line’ production scheduling and ‘last-minute’ changes to production schedule. The results of this research also suggest ways in which more complex and realistic job shop environments, such as multiple machines with a higher number of jobs in the sequence, and other scheduling objectives can be modeled. This research also investigates computational aspects of simulated annealing in solving complex scheduling problems.

Keah Choon Tan - One of the best experts on this subject based on the ideXlab platform.

  • a comparison of four methods for minimizing total tardiness on a Single Processor with sequence dependent setup times
    Omega-international Journal of Management Science, 2000
    Co-Authors: Keah Choon Tan, Ram Narasimhan, Paul A Rubin, Gary L Ragatz
    Abstract:

    Abstract Much of the research on operations scheduling problems has either ignored setup times or assumed that setup times on each machine are independent of the job sequence. This paper considers the problem of scheduling a Single machine for minimizing total tardiness in a sequence dependent setup environment. The comparative performance of branch-and-bound, genetic search, simulated annealing and random-start pairwise interchange was evaluated in this problem setting. The experimental results suggest that simulated annealing and random-start pairwise interchange are viable solution techniques that can yield good solutions to a large combinatorial problem when considering the tardiness objective with sequence dependent setup times. However, branch-and-bound may be the preferred solution technique in solving smaller problems, and it is the only solution technique tested that will confirm an optimum solution has been reached. The methods considered in this research offer promise to deal with a class of scheduling problems, which have been considered difficult by both researchers and practitioners.

  • minimizing tardiness on a Single Processor with sequence dependent setup times a simulated annealing approach
    Omega-international Journal of Management Science, 1997
    Co-Authors: Keah Choon Tan, Ram Narasimhan
    Abstract:

    Abstract In today's fast-paced Just-In-Time and mass customization manufacturing in a sequence-dependent setup environment, the challenge of making production schedules to meet due-date requirements is becoming a more complex problem. Unfortunately, much of the research on operations scheduling problems has either ignored setup times or assumed that setup times on each machine are independent of the job sequence. This paper considers the problem of minimizing tardiness, a common measure of due-date performance, in a sequence-dependent setup environment. Simulated annealing was used to solve the sequencing problem, and its performance was compared with random search. Our experimental results show that the algorithm can find a good solution fairly quickly, and thus can rework schedules frequently to react to variations in the schedule. The algorithm is invaluable for ‘on-line’ production scheduling and ‘last-minute’ changes to production schedule. The results of this research also suggest ways in which more complex and realistic job shop environments, such as multiple machines with a higher number of jobs in the sequence, and other scheduling objectives can be modeled. This research also investigates computational aspects of simulated annealing in solving complex scheduling problems.

Jingling Xue - One of the best experts on this subject based on the ideXlab platform.

  • scratchpad memory aware task scheduling with minimum number of preemptions on a Single Processor
    Asia and South Pacific Design Automation Conference, 2013
    Co-Authors: Qing Wan, Jingling Xue
    Abstract:

    We propose a unified approach to the problem of scheduling a set of tasks with individual release times, deadlines and precedence constraints, and allocating the data of each task to the SPM (Scratchpad Memory) on a Single Processor system. Our approach consists of a task scheduling algorithm and an SPM allocation algorithm. The former constructs a feasible schedule incrementally, aiming to minimize the number of preemptions in the feasible schedule. The latter allocates a portion of the SPM to each task in an efficient way by employing a novel data structure, namely, the preemption graph. We have evaluated our approach and a previous approach by using six task sets. The results show that our approach achieves up to 20.31% on WCRT (Worst-Case Response Time) reduction over the previous approach.