Sparse Solver

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Huazhong Yang - One of the best experts on this subject based on the ideXlab platform.

  • sparsity oriented Sparse Solver design for circuit simulation
    Design Automation and Test in Europe, 2016
    Co-Authors: Xiaoming Chen, Yu Wang, Lixue Xia, Huazhong Yang
    Abstract:

    The Sparse Solver is a critical component in circuit simulators. The widely used Solver KLU is based on a pure column-level algorithm. In this paper, we point out that KLU is not always the best algorithm for circuit matrices by experiments. We also demonstrate that the optimal algorithm strongly depends on the sparsity of the matrix. Two Sparse LU factorization algorithms are proposed for extremely Sparse matrices and dense matrices. A simple but effective strategy is proposed to select the optimal algorithm according to the sparsity. By combining the two new algorithms and the selection method together, the proposed Solver achieves much higher performance than both KLU and PARDISO.

  • DATE - Sparsity-oriented Sparse Solver design for circuit simulation
    Proceedings of the 2016 Design Automation & Test in Europe Conference & Exhibition (DATE), 2016
    Co-Authors: Xiaoming Chen, Yu Wang, Lixue Xia, Huazhong Yang
    Abstract:

    The Sparse Solver is a critical component in circuit simulators. The widely used Solver KLU is based on a pure column-level algorithm. In this paper, we point out that KLU is not always the best algorithm for circuit matrices by experiments. We also demonstrate that the optimal algorithm strongly depends on the sparsity of the matrix. Two Sparse LU factorization algorithms are proposed for extremely Sparse matrices and dense matrices. A simple but effective strategy is proposed to select the optimal algorithm according to the sparsity. By combining the two new algorithms and the selection method together, the proposed Solver achieves much higher performance than both KLU and PARDISO.

  • a fast parallel Sparse Solver for spice based circuit simulators
    Design Automation and Test in Europe, 2015
    Co-Authors: Xiaoming Chen, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse Solver is a serious bottleneck in SPICE-based circuit simulators. Although several existing researches have proposed some circuit simulation-oriented parallel Solvers, there is still some room to improve the speed and scalability of these Solvers. This paper proposes a fast parallel Sparse Solver based on a pivoting-reduction technique which takes full advantage of features of circuit simulation. Experimental results show that on average, the proposed Solver is up to 50% faster than the state-of-the-art Solver NICSLU, and up to 3.3X faster than KLU. Real DC simulation reveals that our Solver is faster than NICSLU, PARDISO, and commercial Solvers.

  • DATE - A fast parallel Sparse Solver for SPICE-based circuit simulators
    2015
    Co-Authors: Xiaoming Chen, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse Solver is a serious bottleneck in SPICE-based circuit simulators. Although several existing researches have proposed some circuit simulation-oriented parallel Solvers, there is still some room to improve the speed and scalability of these Solvers. This paper proposes a fast parallel Sparse Solver based on a pivoting-reduction technique which takes full advantage of features of circuit simulation. Experimental results show that on average, the proposed Solver is up to 50% faster than the state-of-the-art Solver NICSLU, and up to 3.3X faster than KLU. Real DC simulation reveals that our Solver is faster than NICSLU, PARDISO, and commercial Solvers.

  • GPU-Accelerated Sparse LU Factorization for Circuit Simulation with Performance Modeling
    IEEE Transactions on Parallel and Distributed Systems, 2015
    Co-Authors: Xiaoming Chen, Ling Ren, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse matrix Solver by LU factorization is a serious bottleneck in Simulation Program with Integrated Circuit Emphasis (SPICE)-based circuit simulators. The state-of-the-art Graphics Processing Units (GPU) have numerous cores sharing the same memory, provide attractive memory bandwidth and compute capability, and support massive thread-level parallelism, so GPUs can potentially accelerate the Sparse Solver in circuit simulators. In this paper, an efficient GPU-based Sparse Solver for circuit problems is proposed. We develop a hybrid parallel LU factorization approach combining task-level and data-level parallelism on GPUs. Work partitioning, number of active thread groups, and memory access patterns are optimized based on the GPU architecture. Experiments show that the proposed LU factorization approach on NVIDIA GTX580 attains an average speedup of 7.02 $\times$ (geometric mean) compared with sequential PARDISO, and 1.55 $\times$ compared with 16-threaded PARDISO. We also investigate bottlenecks of the proposed approach by a parametric performance model. The performance of the Sparse LU factorization on GPUs is constrained by the global memory bandwidth, so the performance can be further improved by future GPUs with larger memory bandwidth.

Ali Olfat - One of the best experts on this subject based on the ideXlab platform.

  • Single Stage DOA-Frequency Representation of the Array Data with Source Reconstruction Capability
    arXiv: Signal Processing, 2019
    Co-Authors: Shervin Amirsoleimani, Ali Olfat
    Abstract:

    In this paper, a new signal processing framework is proposed, in which the array time samples are represented in DOA-frequency domain through a single stage problem. It is shown that concatenated array data is well represented in a $\mathbf{G}$ dictionary atoms space, where $\mathbf{G}$ columns correspond to pixels in the DOA-frequency image. We present two approaches for the $\mathbf{G}$ formation and compare the benefits and disadvantages of them. A mutual coherence guaranteed $\mathbf{G}$ manipulation technique is also proposed. Furthermore, unlike most of the existing methods, the proposed problem is reversible into the time domain, therefore, source recovery from the resulted DOA-frequency image is possible. The proposed representation in DOA-frequency domain can be simply transformed into a group Sparse problem, in the case of non-multitone sources in a given bandwidth. Therefore, it can also be utilized as an effective wideband DOA estimator. In the simulation part, two scenarios of multitone sources with unknown frequency and DOA locations and non-multitone wideband sources with assumed frequency region are examined. In multitone scenario, Sparse Solvers yield more accurate DOA-frequency representation compared to some noncoherent approaches. At the latter scenario, the proposed method with group Sparse Solver outperforms some existing wideband DOA estimators in low SNR regime. In addition, sources' recovery simultaneous with DOA estimation shows significant improvement compared to the conventional delay and sum beamformer and without prerequisites required in sophisticated wideband beamformers.

  • Single stage DOA-frequency representation of the array data with source reconstruction capability
    Signal Processing, 2019
    Co-Authors: Shervin Amirsoleimani, Ali Olfat
    Abstract:

    Abstract In this paper, a new signal processing framework is proposed, in which the array time samples are represented in DOA-frequency domain through a single stage problem. It is shown that concatenated array data is well represented in a G dictionary atoms space, where columns of G correspond to pixels in the DOA-frequency image. We present two approaches for the G formation and compare the benefits and disadvantages of them. A mutual coherence guaranteed G construction technique is also proposed. Furthermore, unlike most of the existing methods, the proposed problem is reversible into the time domain, therefore, source recovery from the resulted DOA-frequency image is possible. The proposed representation in DOA-frequency domain can be simply transformed into a group Sparse problem, in the case of non-multitone sources in a given bandwidth. Therefore, it can also be utilized as an effective wideband DOA estimator. In the simulation part, two scenarios of multitone sources with unknown frequency and DOA locations and non-multitone wideband sources with assumed frequency region are examined. In multitone scenario, Sparse Solvers yield more accurate DOA-frequency representation compared to some noncoherent approaches. For non-multitone wideband source scenario, the proposed method with group Sparse Solver outperforms some existing wideband DOA estimators in low SNR regime. In addition, simultaneous sources’ recovery and DOA estimation shows significant improvement compared to the conventional delay and sum beamformer and without prerequisites required in sophisticated wideband beamformers.

Xiaoming Chen - One of the best experts on this subject based on the ideXlab platform.

  • sparsity oriented Sparse Solver design for circuit simulation
    Design Automation and Test in Europe, 2016
    Co-Authors: Xiaoming Chen, Yu Wang, Lixue Xia, Huazhong Yang
    Abstract:

    The Sparse Solver is a critical component in circuit simulators. The widely used Solver KLU is based on a pure column-level algorithm. In this paper, we point out that KLU is not always the best algorithm for circuit matrices by experiments. We also demonstrate that the optimal algorithm strongly depends on the sparsity of the matrix. Two Sparse LU factorization algorithms are proposed for extremely Sparse matrices and dense matrices. A simple but effective strategy is proposed to select the optimal algorithm according to the sparsity. By combining the two new algorithms and the selection method together, the proposed Solver achieves much higher performance than both KLU and PARDISO.

  • DATE - Sparsity-oriented Sparse Solver design for circuit simulation
    Proceedings of the 2016 Design Automation & Test in Europe Conference & Exhibition (DATE), 2016
    Co-Authors: Xiaoming Chen, Yu Wang, Lixue Xia, Huazhong Yang
    Abstract:

    The Sparse Solver is a critical component in circuit simulators. The widely used Solver KLU is based on a pure column-level algorithm. In this paper, we point out that KLU is not always the best algorithm for circuit matrices by experiments. We also demonstrate that the optimal algorithm strongly depends on the sparsity of the matrix. Two Sparse LU factorization algorithms are proposed for extremely Sparse matrices and dense matrices. A simple but effective strategy is proposed to select the optimal algorithm according to the sparsity. By combining the two new algorithms and the selection method together, the proposed Solver achieves much higher performance than both KLU and PARDISO.

  • a fast parallel Sparse Solver for spice based circuit simulators
    Design Automation and Test in Europe, 2015
    Co-Authors: Xiaoming Chen, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse Solver is a serious bottleneck in SPICE-based circuit simulators. Although several existing researches have proposed some circuit simulation-oriented parallel Solvers, there is still some room to improve the speed and scalability of these Solvers. This paper proposes a fast parallel Sparse Solver based on a pivoting-reduction technique which takes full advantage of features of circuit simulation. Experimental results show that on average, the proposed Solver is up to 50% faster than the state-of-the-art Solver NICSLU, and up to 3.3X faster than KLU. Real DC simulation reveals that our Solver is faster than NICSLU, PARDISO, and commercial Solvers.

  • DATE - A fast parallel Sparse Solver for SPICE-based circuit simulators
    2015
    Co-Authors: Xiaoming Chen, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse Solver is a serious bottleneck in SPICE-based circuit simulators. Although several existing researches have proposed some circuit simulation-oriented parallel Solvers, there is still some room to improve the speed and scalability of these Solvers. This paper proposes a fast parallel Sparse Solver based on a pivoting-reduction technique which takes full advantage of features of circuit simulation. Experimental results show that on average, the proposed Solver is up to 50% faster than the state-of-the-art Solver NICSLU, and up to 3.3X faster than KLU. Real DC simulation reveals that our Solver is faster than NICSLU, PARDISO, and commercial Solvers.

  • GPU-Accelerated Sparse LU Factorization for Circuit Simulation with Performance Modeling
    IEEE Transactions on Parallel and Distributed Systems, 2015
    Co-Authors: Xiaoming Chen, Ling Ren, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse matrix Solver by LU factorization is a serious bottleneck in Simulation Program with Integrated Circuit Emphasis (SPICE)-based circuit simulators. The state-of-the-art Graphics Processing Units (GPU) have numerous cores sharing the same memory, provide attractive memory bandwidth and compute capability, and support massive thread-level parallelism, so GPUs can potentially accelerate the Sparse Solver in circuit simulators. In this paper, an efficient GPU-based Sparse Solver for circuit problems is proposed. We develop a hybrid parallel LU factorization approach combining task-level and data-level parallelism on GPUs. Work partitioning, number of active thread groups, and memory access patterns are optimized based on the GPU architecture. Experiments show that the proposed LU factorization approach on NVIDIA GTX580 attains an average speedup of 7.02 $\times$ (geometric mean) compared with sequential PARDISO, and 1.55 $\times$ compared with 16-threaded PARDISO. We also investigate bottlenecks of the proposed approach by a parametric performance model. The performance of the Sparse LU factorization on GPUs is constrained by the global memory bandwidth, so the performance can be further improved by future GPUs with larger memory bandwidth.

Shervin Amirsoleimani - One of the best experts on this subject based on the ideXlab platform.

  • Single Stage DOA-Frequency Representation of the Array Data with Source Reconstruction Capability
    arXiv: Signal Processing, 2019
    Co-Authors: Shervin Amirsoleimani, Ali Olfat
    Abstract:

    In this paper, a new signal processing framework is proposed, in which the array time samples are represented in DOA-frequency domain through a single stage problem. It is shown that concatenated array data is well represented in a $\mathbf{G}$ dictionary atoms space, where $\mathbf{G}$ columns correspond to pixels in the DOA-frequency image. We present two approaches for the $\mathbf{G}$ formation and compare the benefits and disadvantages of them. A mutual coherence guaranteed $\mathbf{G}$ manipulation technique is also proposed. Furthermore, unlike most of the existing methods, the proposed problem is reversible into the time domain, therefore, source recovery from the resulted DOA-frequency image is possible. The proposed representation in DOA-frequency domain can be simply transformed into a group Sparse problem, in the case of non-multitone sources in a given bandwidth. Therefore, it can also be utilized as an effective wideband DOA estimator. In the simulation part, two scenarios of multitone sources with unknown frequency and DOA locations and non-multitone wideband sources with assumed frequency region are examined. In multitone scenario, Sparse Solvers yield more accurate DOA-frequency representation compared to some noncoherent approaches. At the latter scenario, the proposed method with group Sparse Solver outperforms some existing wideband DOA estimators in low SNR regime. In addition, sources' recovery simultaneous with DOA estimation shows significant improvement compared to the conventional delay and sum beamformer and without prerequisites required in sophisticated wideband beamformers.

  • Single stage DOA-frequency representation of the array data with source reconstruction capability
    Signal Processing, 2019
    Co-Authors: Shervin Amirsoleimani, Ali Olfat
    Abstract:

    Abstract In this paper, a new signal processing framework is proposed, in which the array time samples are represented in DOA-frequency domain through a single stage problem. It is shown that concatenated array data is well represented in a G dictionary atoms space, where columns of G correspond to pixels in the DOA-frequency image. We present two approaches for the G formation and compare the benefits and disadvantages of them. A mutual coherence guaranteed G construction technique is also proposed. Furthermore, unlike most of the existing methods, the proposed problem is reversible into the time domain, therefore, source recovery from the resulted DOA-frequency image is possible. The proposed representation in DOA-frequency domain can be simply transformed into a group Sparse problem, in the case of non-multitone sources in a given bandwidth. Therefore, it can also be utilized as an effective wideband DOA estimator. In the simulation part, two scenarios of multitone sources with unknown frequency and DOA locations and non-multitone wideband sources with assumed frequency region are examined. In multitone scenario, Sparse Solvers yield more accurate DOA-frequency representation compared to some noncoherent approaches. For non-multitone wideband source scenario, the proposed method with group Sparse Solver outperforms some existing wideband DOA estimators in low SNR regime. In addition, simultaneous sources’ recovery and DOA estimation shows significant improvement compared to the conventional delay and sum beamformer and without prerequisites required in sophisticated wideband beamformers.

Yu Wang - One of the best experts on this subject based on the ideXlab platform.

  • sparsity oriented Sparse Solver design for circuit simulation
    Design Automation and Test in Europe, 2016
    Co-Authors: Xiaoming Chen, Yu Wang, Lixue Xia, Huazhong Yang
    Abstract:

    The Sparse Solver is a critical component in circuit simulators. The widely used Solver KLU is based on a pure column-level algorithm. In this paper, we point out that KLU is not always the best algorithm for circuit matrices by experiments. We also demonstrate that the optimal algorithm strongly depends on the sparsity of the matrix. Two Sparse LU factorization algorithms are proposed for extremely Sparse matrices and dense matrices. A simple but effective strategy is proposed to select the optimal algorithm according to the sparsity. By combining the two new algorithms and the selection method together, the proposed Solver achieves much higher performance than both KLU and PARDISO.

  • DATE - Sparsity-oriented Sparse Solver design for circuit simulation
    Proceedings of the 2016 Design Automation & Test in Europe Conference & Exhibition (DATE), 2016
    Co-Authors: Xiaoming Chen, Yu Wang, Lixue Xia, Huazhong Yang
    Abstract:

    The Sparse Solver is a critical component in circuit simulators. The widely used Solver KLU is based on a pure column-level algorithm. In this paper, we point out that KLU is not always the best algorithm for circuit matrices by experiments. We also demonstrate that the optimal algorithm strongly depends on the sparsity of the matrix. Two Sparse LU factorization algorithms are proposed for extremely Sparse matrices and dense matrices. A simple but effective strategy is proposed to select the optimal algorithm according to the sparsity. By combining the two new algorithms and the selection method together, the proposed Solver achieves much higher performance than both KLU and PARDISO.

  • a fast parallel Sparse Solver for spice based circuit simulators
    Design Automation and Test in Europe, 2015
    Co-Authors: Xiaoming Chen, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse Solver is a serious bottleneck in SPICE-based circuit simulators. Although several existing researches have proposed some circuit simulation-oriented parallel Solvers, there is still some room to improve the speed and scalability of these Solvers. This paper proposes a fast parallel Sparse Solver based on a pivoting-reduction technique which takes full advantage of features of circuit simulation. Experimental results show that on average, the proposed Solver is up to 50% faster than the state-of-the-art Solver NICSLU, and up to 3.3X faster than KLU. Real DC simulation reveals that our Solver is faster than NICSLU, PARDISO, and commercial Solvers.

  • DATE - A fast parallel Sparse Solver for SPICE-based circuit simulators
    2015
    Co-Authors: Xiaoming Chen, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse Solver is a serious bottleneck in SPICE-based circuit simulators. Although several existing researches have proposed some circuit simulation-oriented parallel Solvers, there is still some room to improve the speed and scalability of these Solvers. This paper proposes a fast parallel Sparse Solver based on a pivoting-reduction technique which takes full advantage of features of circuit simulation. Experimental results show that on average, the proposed Solver is up to 50% faster than the state-of-the-art Solver NICSLU, and up to 3.3X faster than KLU. Real DC simulation reveals that our Solver is faster than NICSLU, PARDISO, and commercial Solvers.

  • GPU-Accelerated Sparse LU Factorization for Circuit Simulation with Performance Modeling
    IEEE Transactions on Parallel and Distributed Systems, 2015
    Co-Authors: Xiaoming Chen, Ling Ren, Yu Wang, Huazhong Yang
    Abstract:

    The Sparse matrix Solver by LU factorization is a serious bottleneck in Simulation Program with Integrated Circuit Emphasis (SPICE)-based circuit simulators. The state-of-the-art Graphics Processing Units (GPU) have numerous cores sharing the same memory, provide attractive memory bandwidth and compute capability, and support massive thread-level parallelism, so GPUs can potentially accelerate the Sparse Solver in circuit simulators. In this paper, an efficient GPU-based Sparse Solver for circuit problems is proposed. We develop a hybrid parallel LU factorization approach combining task-level and data-level parallelism on GPUs. Work partitioning, number of active thread groups, and memory access patterns are optimized based on the GPU architecture. Experiments show that the proposed LU factorization approach on NVIDIA GTX580 attains an average speedup of 7.02 $\times$ (geometric mean) compared with sequential PARDISO, and 1.55 $\times$ compared with 16-threaded PARDISO. We also investigate bottlenecks of the proposed approach by a parametric performance model. The performance of the Sparse LU factorization on GPUs is constrained by the global memory bandwidth, so the performance can be further improved by future GPUs with larger memory bandwidth.