Synchronizers

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Carvalho J.p. - One of the best experts on this subject based on the ideXlab platform.

  • Prefilter bandwidth effects in carrier wave phase Synchronizers
    IEEE, 1
    Co-Authors: Reis A.d., Carvalho J.p., Rocha J.f., Gameiro A.s.
    Abstract:

    This work studies the effects of the prefilter bandwidth on the carrier wave phase Synchronizers. We consider three different prefilter bandwidths namely B1= ∞(infinite), B2=2.tx and B3=1.tx, where tx is the transmission rate. We consider also four carrier wave phase Synchronizers, namely, the analog (ana), the hybrid (hib), the combinational (cmb), and the sequential (seq). The objective is to study the prefilter bandwidth with the four carrier Synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) as function of the input SNR (Signal to Noise Ratio)

  • Data symbol phase Synchronizers of mixed loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work study the symbol phase synchronizer of mixed loop. This synchronizer is composed by a previous tuning filter followed of a carrier Phase Lock Loop (CPLL). The tuning filter is an open loop but the CPLL is a closed loop. The tuning filter is equal for all the Synchronizers, but the CPLL has four types namely the analog, the hybrid, the combinational and the sequential.The objective is to study the four Synchronizers and evaluate the output jitter UIRMS (Unit Interval Root Mean Square) versus the input SNR (Signal Noise Ratio)

  • Synchronizers based on carrier phase lock loop and on symbol phase lock loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    The symbol synchronizer recoveries the clock and after, with it, samples and retimes the data. We present two synchronizer groups, the first based on filter with carrier phase lock loop (CPLL) and the second based on symbol phase lock loop (SPLL). Each group has four prototypes namely the analog, the hybrid, the combinational and the sequential. The objective is to study the various Synchronizers output jitter UIRMS (unit interval root mean squared) as function of the input SNR (Signal to Noise Ratio)

  • Symbol Synchronizers based on filter with Phase Lock Loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work study the symbol synchronizer based on a filter followed of a carrier PLL (Phase Lock Loop). The filter is a bandpass filter, centered in an equal frequency to the data transmission rate. We will present four symbol Synchronizers, the filter is equal for all them, but the PLL can be one of four types, namely the analog, the hybrid, the combinational and the sequential. The main objective is to study the four symbol Synchronizers and to obtain their jitter noise curves

  • Sequential Symbol Synchronizers based on Pulse Comparison
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work presents the synchronizer based on pulse comparation, between variable and fixed pulses. This synchronizer has two variants, one operating by both transitions at the bit rate and other operating by positive transitions at half rate. Each variant has two versions namely the manual and the automatic. The objective is to study the four Synchronizers and evaluate their output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal Noise Ratio)

Gameiro A.s. - One of the best experts on this subject based on the ideXlab platform.

  • Prefilter bandwidth effects in carrier wave phase Synchronizers
    IEEE, 1
    Co-Authors: Reis A.d., Carvalho J.p., Rocha J.f., Gameiro A.s.
    Abstract:

    This work studies the effects of the prefilter bandwidth on the carrier wave phase Synchronizers. We consider three different prefilter bandwidths namely B1= ∞(infinite), B2=2.tx and B3=1.tx, where tx is the transmission rate. We consider also four carrier wave phase Synchronizers, namely, the analog (ana), the hybrid (hib), the combinational (cmb), and the sequential (seq). The objective is to study the prefilter bandwidth with the four carrier Synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) as function of the input SNR (Signal to Noise Ratio)

  • Data symbol phase Synchronizers of closed loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work study the symbol phase synchronizer of closed loop. This synchronizer have all its components inside of the loop, for this reason is called closed loop.We will study this synchronizer considering four topologies namely the analog, the hybrid, the combinational and the sequential.The objective is to study the four Synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal to Noise Ratio)

  • Symbol phase Synchronizers tested with different input sequences
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J. P.
    Abstract:

    This work study four symbol phase Synchronizers namely the analog, hybrid, combinational and sequential.These four Synchronizers will be tested with three different input sequences (deterministic and pseudo random). The sequences are the deterministic P1=21 (one and zero dasia1-0psila), the deterministic P2=22 (two ones and two zeros dasia11-00psila) and the pseudo random P7=27-1. The objective is to study the four Synchronizers and to evaluate their jitter UI-RMS (Unit Interval Root Mean Squared) versus input SNR (Signal- Noise Ratio), when the input sequence changes between P1, P2 and P7

  • Synchronizers based on carrier phase lock loop and on symbol phase lock loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    The symbol synchronizer recoveries the clock and after, with it, samples and retimes the data. We present two synchronizer groups, the first based on filter with carrier phase lock loop (CPLL) and the second based on symbol phase lock loop (SPLL). Each group has four prototypes namely the analog, the hybrid, the combinational and the sequential. The objective is to study the various Synchronizers output jitter UIRMS (unit interval root mean squared) as function of the input SNR (Signal to Noise Ratio)

  • Symbol Synchronizers based on filter with Phase Lock Loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work study the symbol synchronizer based on a filter followed of a carrier PLL (Phase Lock Loop). The filter is a bandpass filter, centered in an equal frequency to the data transmission rate. We will present four symbol Synchronizers, the filter is equal for all them, but the PLL can be one of four types, namely the analog, the hybrid, the combinational and the sequential. The main objective is to study the four symbol Synchronizers and to obtain their jitter noise curves

Reis A.d. - One of the best experts on this subject based on the ideXlab platform.

  • Prefilter bandwidth effects in carrier wave phase Synchronizers
    IEEE, 1
    Co-Authors: Reis A.d., Carvalho J.p., Rocha J.f., Gameiro A.s.
    Abstract:

    This work studies the effects of the prefilter bandwidth on the carrier wave phase Synchronizers. We consider three different prefilter bandwidths namely B1= ∞(infinite), B2=2.tx and B3=1.tx, where tx is the transmission rate. We consider also four carrier wave phase Synchronizers, namely, the analog (ana), the hybrid (hib), the combinational (cmb), and the sequential (seq). The objective is to study the prefilter bandwidth with the four carrier Synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) as function of the input SNR (Signal to Noise Ratio)

  • Data symbol phase Synchronizers of closed loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work study the symbol phase synchronizer of closed loop. This synchronizer have all its components inside of the loop, for this reason is called closed loop.We will study this synchronizer considering four topologies namely the analog, the hybrid, the combinational and the sequential.The objective is to study the four Synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal to Noise Ratio)

  • Symbol phase Synchronizers tested with different input sequences
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J. P.
    Abstract:

    This work study four symbol phase Synchronizers namely the analog, hybrid, combinational and sequential.These four Synchronizers will be tested with three different input sequences (deterministic and pseudo random). The sequences are the deterministic P1=21 (one and zero dasia1-0psila), the deterministic P2=22 (two ones and two zeros dasia11-00psila) and the pseudo random P7=27-1. The objective is to study the four Synchronizers and to evaluate their jitter UI-RMS (Unit Interval Root Mean Squared) versus input SNR (Signal- Noise Ratio), when the input sequence changes between P1, P2 and P7

  • Synchronizers based on carrier phase lock loop and on symbol phase lock loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    The symbol synchronizer recoveries the clock and after, with it, samples and retimes the data. We present two synchronizer groups, the first based on filter with carrier phase lock loop (CPLL) and the second based on symbol phase lock loop (SPLL). Each group has four prototypes namely the analog, the hybrid, the combinational and the sequential. The objective is to study the various Synchronizers output jitter UIRMS (unit interval root mean squared) as function of the input SNR (Signal to Noise Ratio)

  • Symbol Synchronizers based on filter with Phase Lock Loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work study the symbol synchronizer based on a filter followed of a carrier PLL (Phase Lock Loop). The filter is a bandpass filter, centered in an equal frequency to the data transmission rate. We will present four symbol Synchronizers, the filter is equal for all them, but the PLL can be one of four types, namely the analog, the hybrid, the combinational and the sequential. The main objective is to study the four symbol Synchronizers and to obtain their jitter noise curves

Rocha J.f. - One of the best experts on this subject based on the ideXlab platform.

  • Prefilter bandwidth effects in carrier wave phase Synchronizers
    IEEE, 1
    Co-Authors: Reis A.d., Carvalho J.p., Rocha J.f., Gameiro A.s.
    Abstract:

    This work studies the effects of the prefilter bandwidth on the carrier wave phase Synchronizers. We consider three different prefilter bandwidths namely B1= ∞(infinite), B2=2.tx and B3=1.tx, where tx is the transmission rate. We consider also four carrier wave phase Synchronizers, namely, the analog (ana), the hybrid (hib), the combinational (cmb), and the sequential (seq). The objective is to study the prefilter bandwidth with the four carrier Synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) as function of the input SNR (Signal to Noise Ratio)

  • Data symbol phase Synchronizers of closed loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work study the symbol phase synchronizer of closed loop. This synchronizer have all its components inside of the loop, for this reason is called closed loop.We will study this synchronizer considering four topologies namely the analog, the hybrid, the combinational and the sequential.The objective is to study the four Synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal to Noise Ratio)

  • Symbol phase Synchronizers tested with different input sequences
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J. P.
    Abstract:

    This work study four symbol phase Synchronizers namely the analog, hybrid, combinational and sequential.These four Synchronizers will be tested with three different input sequences (deterministic and pseudo random). The sequences are the deterministic P1=21 (one and zero dasia1-0psila), the deterministic P2=22 (two ones and two zeros dasia11-00psila) and the pseudo random P7=27-1. The objective is to study the four Synchronizers and to evaluate their jitter UI-RMS (Unit Interval Root Mean Squared) versus input SNR (Signal- Noise Ratio), when the input sequence changes between P1, P2 and P7

  • Synchronizers based on carrier phase lock loop and on symbol phase lock loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    The symbol synchronizer recoveries the clock and after, with it, samples and retimes the data. We present two synchronizer groups, the first based on filter with carrier phase lock loop (CPLL) and the second based on symbol phase lock loop (SPLL). Each group has four prototypes namely the analog, the hybrid, the combinational and the sequential. The objective is to study the various Synchronizers output jitter UIRMS (unit interval root mean squared) as function of the input SNR (Signal to Noise Ratio)

  • Symbol Synchronizers based on filter with Phase Lock Loop
    'Institute of Electrical and Electronics Engineers (IEEE)', 1
    Co-Authors: Reis A.d., Rocha J.f., Gameiro A.s., Carvalho J.p.
    Abstract:

    This work study the symbol synchronizer based on a filter followed of a carrier PLL (Phase Lock Loop). The filter is a bandpass filter, centered in an equal frequency to the data transmission rate. We will present four symbol Synchronizers, the filter is equal for all them, but the PLL can be one of four types, namely the analog, the hybrid, the combinational and the sequential. The main objective is to study the four symbol Synchronizers and to obtain their jitter noise curves

Marc Moeneclaey - One of the best experts on this subject based on the ideXlab platform.

  • performance analysis of ml based feedback carrier phase Synchronizers for coded signals
    IEEE Transactions on Signal Processing, 2007
    Co-Authors: Nele Noels, Heidi Steendam, Marc Moeneclaey
    Abstract:

    This paper considers carrier phase recovery in transmission systems with an iteratively decodable error-control code [turbo codes, low-density parity check (LDPC) codes], whose large coding gains enable reliable communication at very low signal-to-noise ratio (SNR). We compare three types of feedback phase Synchronizers, which are all based upon the maximum-likelihood (ML) estimation principle: a data-aided (DA) synchronizer, a non-code-aided (NCA) synchronizer, and an iterative code-aided (CA) synchronizer. We introduce a blockwise forward-backward recursive phase estimator, and we show that the mean-square phase error (MSPE) of the NCA synchronizer equals that of the DA synchronizer when the carrier phase is constant and the loop filter gain is the same for both Synchronizers. When the signal is affected by phase noise, the NCA synchronizer (as compared with the DA synchronizer) yields a larger MSPE due to phase fluctuations. We also show that, at the normal operating SNR of the considered code, the performance of the CA synchronizer is very close to that of a DA synchronizer that knows all transmitted symbols in advance

  • effectiveness study of code aided and non code aided ml based feedback phase Synchronizers
    International Conference on Communications, 2006
    Co-Authors: Nele Noels, Heidi Steendam, Marc Moeneclaey
    Abstract:

    This paper investigates the effectiveness of a (non-)code-aided ML-based FB phase synchronizer at the low operating signal-to-noise ratio of capacity-approaching codes. We show that the performance of the code-aided synchronizer is very close to that of a data-aided synchronizer that knows all data symbols in advance. This illustrates the optimality of the code-aided synchronizer. For the non-code-aided and the data-aided synchronizer, the linearized mean square phase error (MSPE) is evaluated analytically in the case of a first order loop. We demonstrate that, the MSPE of the non-code-aided synchronizer equals that of the data-aided synchronizer when the carrier phase is essentially constant and the loop filter gain is the same for both Synchronizers, but that the non-code-aided synchronizer (as compared to the data-aided synchronizer) yields a larger MSPE due to phase fluctuations. This proves that code-aided FB phase estimation outperforms non-code-aided FB phase estimation when that the phase to be estimated is time-varying.

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