Synthetic Traffic

14,000,000 Leading Edge Experts on the ideXlab platform

Scan Science and Technology

Contact Leading Edge Experts & Companies

Scan Science and Technology

Contact Leading Edge Experts & Companies

The Experts below are selected from a list of 9321 Experts worldwide ranked by ideXlab platform

Natalie Enright Jerger - One of the best experts on this subject based on the ideXlab platform.

  • efficient Synthetic Traffic models for large complex socs
    High-Performance Computer Architecture, 2016
    Co-Authors: Jieming Yin, Natalie Enright Jerger, Onur Kayiran, Matthew Poremba, Gabriel H Loh
    Abstract:

    The interconnect or network on chip (NoC) is an increasingly important component in processors. As systems scale up in size and functionality, the ability to efficiently model larger and more complex NoCs becomes increasingly important to the design and evaluation of such systems. Recent work proposed the "SynFull" methodology that performs statistical analysis of a workload's NoC Traffic to create compact Traffic generators based on Markov models. While the models generate Synthetic Traffic, the Traffic is statistically similar to the original trace and can be used for fast NoC simulation. However, the original SynFull work only evaluated multi-core CPU scenarios with a very simple cache coherence protocol (MESI). We find the original SynFull methodology to be insufficient when modeling the NoC of a more complex system on a chip (SoC). We identify and analyze the shortcomings of SynFull in the context of a SoC consisting of a heterogeneous architecture (CPU and GPU), a more complex cache hierarchy including support for full coherence between CPU, GPU, and shared caches, and heterogeneous workloads. We introduce new techniques to address these shortcomings. Furthermore, the original SynFull methodology can only model a NoC with N nodes when the original application analysis is performed on an identically-sized N-node system, but one typically wants to model larger future systems. Therefore, we introduce new techniques to enable SynFull-like analysis to be extrapolated to model such larger systems. Finally, we present a novel Synthetic memory reference model to replace SynFull's fixed latency model; this allows more realistic evaluation of the memory subsystem and its interaction with the NoC. The result is a robust NoC simulation methodology that works for large, heterogeneous SoC architectures.

  • HPCA - Efficient Synthetic Traffic models for large, complex SoCs
    2016 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2016
    Co-Authors: Jieming Yin, Natalie Enright Jerger, Onur Kayiran, Matthew Poremba, Gabriel H Loh
    Abstract:

    The interconnect or network on chip (NoC) is an increasingly important component in processors. As systems scale up in size and functionality, the ability to efficiently model larger and more complex NoCs becomes increasingly important to the design and evaluation of such systems. Recent work proposed the "SynFull" methodology that performs statistical analysis of a workload's NoC Traffic to create compact Traffic generators based on Markov models. While the models generate Synthetic Traffic, the Traffic is statistically similar to the original trace and can be used for fast NoC simulation. However, the original SynFull work only evaluated multi-core CPU scenarios with a very simple cache coherence protocol (MESI). We find the original SynFull methodology to be insufficient when modeling the NoC of a more complex system on a chip (SoC). We identify and analyze the shortcomings of SynFull in the context of a SoC consisting of a heterogeneous architecture (CPU and GPU), a more complex cache hierarchy including support for full coherence between CPU, GPU, and shared caches, and heterogeneous workloads. We introduce new techniques to address these shortcomings. Furthermore, the original SynFull methodology can only model a NoC with N nodes when the original application analysis is performed on an identically-sized N-node system, but one typically wants to model larger future systems. Therefore, we introduce new techniques to enable SynFull-like analysis to be extrapolated to model such larger systems. Finally, we present a novel Synthetic memory reference model to replace SynFull's fixed latency model; this allows more realistic evaluation of the memory subsystem and its interaction with the NoC. The result is a robust NoC simulation methodology that works for large, heterogeneous SoC architectures.

  • ISCA - SynFull: Synthetic Traffic models capturing cache coherent behaviour
    ACM SIGARCH Computer Architecture News, 2014
    Co-Authors: Mario Badr, Natalie Enright Jerger
    Abstract:

    Modern and future many-core systems represent complex architectures. The communication fabrics of these large systems heavily influence their performance and power consumption. Current simulation methodologies for evaluating networks-on-chip (NoCs) are not keeping pace with the increased complexity of our systems; architects often want to explore many different design knobs quickly. Methodologies that capture workload trends with faster simulation times are highly beneficial at early stages of architectural exploration. We propose SynFull, a Synthetic Traffic generation methodology that captures both application and cache coherence behaviour to rapidly evaluate NoCs. SynFull allows designers to quickly indulge in detailed performance simulations without the cost of long-running full-system simulation. By capturing a full range of application and coherence behaviour, architects can avoid the over or underdesign of the network as may occur when using traditional Synthetic Traffic patterns such as uniform random. SynFull has errors as low as 0.3% and provides 50x speedup on average over full-system simulation

  • synfull Synthetic Traffic models capturing cache coherent behaviour
    International Symposium on Computer Architecture, 2014
    Co-Authors: Mario Badr, Natalie Enright Jerger
    Abstract:

    Modern and future many-core systems represent complex architectures. The communication fabrics of these large systems heavily influence their performance and power consumption. Current simulation methodologies for evaluating networks-on-chip (NoCs) are not keeping pace with the increased complexity of our systems; architects often want to explore many different design knobs quickly. Methodologies that capture workload trends with faster simulation times are highly beneficial at early stages of architectural exploration. We propose SynFull, a Synthetic Traffic generation methodology that captures both application and cache coherence behaviour to rapidly evaluate NoCs. SynFull allows designers to quickly indulge in detailed performance simulations without the cost of long-running full-system simulation. By capturing a full range of application and coherence behaviour, architects can avoid the over or underdesign of the network as may occur when using traditional Synthetic Traffic patterns such as uniform random. SynFull has errors as low as 0.3% and provides 50x speedup on average over full-system simulation

Mohammad Hossein Yaghmaee - One of the best experts on this subject based on the ideXlab platform.

  • CCNC - Optimizing Network Routing to Minimize Congestion, Using the Conqueror Traffic Based Synthetically Generated Traffic Matrices
    2008 5th IEEE Consumer Communications and Networking Conference, 2008
    Co-Authors: Saman Taghavi Zargar, Mohammad Hossein Yaghmaee
    Abstract:

    Many Traffic engineering and network design tasks require a network-wide description as an input for their performance evaluation. Therefore, a Traffic matrix represents the demands for these tasks and is applicable to them. Traffic matrix can be measured directly or estimated from an indirect data. Generating Synthetic Traffic matrix method, is a better way to achieve Traffic matrix indirectly. We have previously proposed the conqueror Traffic based Synthetic Traffic matrix and we have indicated that our conqueror Traffic based matrix performed better in all cases where conqueror Traffic existed. In this paper by measuring the maximum link-utilization, we consider how well the conqueror Traffic based Synthetic matrix optimizes the specific Traffic engineering task; that is optimizing network routing to minimize congestion. First, we optimize the routing with the conqueror Traffic based Synthetic matrix to minimize congestion. Then, we test the performance of the resulting routing on the real Traffic matrix. Simulation results indicate that OSPF optimization which we use in this paper to optimize the weights based on the conqueror Traffic based Synthetic matrix, optimize the routing better and result in a better performance on real Traffic matrix.

J. Virtamo - One of the best experts on this subject based on the ideXlab platform.

  • Quick Traffic matrix estimation based on link count covariances
    2006
    Co-Authors: I. Juva, Sandrine Vaton, J. Virtamo
    Abstract:

    In this paper we consider the problem of Traffic matrix estimation. As the problem is underconstrained, some additional information has to be brought in to obtain a solution. If we have a sequence of link count measurements available, a natural candidate is to use the link count sample covariance matrix under the assumption of a functional relationship between the mean and the variance of the Traffic. We propose two com-putationally light-weight methods for Traffic matrix estimation based on the covariance matrix, the projection method and constrained minimization method. The accuracy of these methods is compared with that of other methods using second order moment estimates by simulation under Synthetic Traffic scenarios.

  • ICC - Quick Traffic Matrix Estimation Based on Link Count Covariances
    2006 IEEE International Conference on Communications, 2006
    Co-Authors: I. Juva, Sandrine Vaton, J. Virtamo
    Abstract:

    In this paper we consider the problem of Traffic matrix estimation. As the problem is underconstrained, some additional information has to be brought in to obtain a solution. If we have a sequence of link count measurements available, a natural candidate is to use the link count sample covariance matrix under the assumption of a functional relationship between the mean and the variance of the Traffic. We propose two computationally light-weight methods for Traffic matrix estimation based on the covariance matrix, the projection method and constrained minimization method. The accuracy of these methods is compared with that of other methods using second order moment estimates by simulation under Synthetic Traffic scenarios.

  • Quick Traffic matrix estimation based on link counts covariances
    2005
    Co-Authors: I. Juva, Sandrine Vaton, J. Virtamo
    Abstract:

    In this paper we consider the problem of Traffic matrix estimation. As the problem is under-constrained, some additional information has to be brought in to obtain a solution. If we have a sequence of link count measurements avail-able, a natural candidate is to use the link count sample covariance matrix. We propose two computationally light-weight methods for traf-fic matrix estimation based on the covariance matrix, the projection method and constrained minimization method. The accuracy of these methods is compared with that of other meth-ods using second order moment estimates by simulation under Synthetic Traffic scenarios.

Gabriel H Loh - One of the best experts on this subject based on the ideXlab platform.

  • efficient Synthetic Traffic models for large complex socs
    High-Performance Computer Architecture, 2016
    Co-Authors: Jieming Yin, Natalie Enright Jerger, Onur Kayiran, Matthew Poremba, Gabriel H Loh
    Abstract:

    The interconnect or network on chip (NoC) is an increasingly important component in processors. As systems scale up in size and functionality, the ability to efficiently model larger and more complex NoCs becomes increasingly important to the design and evaluation of such systems. Recent work proposed the "SynFull" methodology that performs statistical analysis of a workload's NoC Traffic to create compact Traffic generators based on Markov models. While the models generate Synthetic Traffic, the Traffic is statistically similar to the original trace and can be used for fast NoC simulation. However, the original SynFull work only evaluated multi-core CPU scenarios with a very simple cache coherence protocol (MESI). We find the original SynFull methodology to be insufficient when modeling the NoC of a more complex system on a chip (SoC). We identify and analyze the shortcomings of SynFull in the context of a SoC consisting of a heterogeneous architecture (CPU and GPU), a more complex cache hierarchy including support for full coherence between CPU, GPU, and shared caches, and heterogeneous workloads. We introduce new techniques to address these shortcomings. Furthermore, the original SynFull methodology can only model a NoC with N nodes when the original application analysis is performed on an identically-sized N-node system, but one typically wants to model larger future systems. Therefore, we introduce new techniques to enable SynFull-like analysis to be extrapolated to model such larger systems. Finally, we present a novel Synthetic memory reference model to replace SynFull's fixed latency model; this allows more realistic evaluation of the memory subsystem and its interaction with the NoC. The result is a robust NoC simulation methodology that works for large, heterogeneous SoC architectures.

  • HPCA - Efficient Synthetic Traffic models for large, complex SoCs
    2016 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2016
    Co-Authors: Jieming Yin, Natalie Enright Jerger, Onur Kayiran, Matthew Poremba, Gabriel H Loh
    Abstract:

    The interconnect or network on chip (NoC) is an increasingly important component in processors. As systems scale up in size and functionality, the ability to efficiently model larger and more complex NoCs becomes increasingly important to the design and evaluation of such systems. Recent work proposed the "SynFull" methodology that performs statistical analysis of a workload's NoC Traffic to create compact Traffic generators based on Markov models. While the models generate Synthetic Traffic, the Traffic is statistically similar to the original trace and can be used for fast NoC simulation. However, the original SynFull work only evaluated multi-core CPU scenarios with a very simple cache coherence protocol (MESI). We find the original SynFull methodology to be insufficient when modeling the NoC of a more complex system on a chip (SoC). We identify and analyze the shortcomings of SynFull in the context of a SoC consisting of a heterogeneous architecture (CPU and GPU), a more complex cache hierarchy including support for full coherence between CPU, GPU, and shared caches, and heterogeneous workloads. We introduce new techniques to address these shortcomings. Furthermore, the original SynFull methodology can only model a NoC with N nodes when the original application analysis is performed on an identically-sized N-node system, but one typically wants to model larger future systems. Therefore, we introduce new techniques to enable SynFull-like analysis to be extrapolated to model such larger systems. Finally, we present a novel Synthetic memory reference model to replace SynFull's fixed latency model; this allows more realistic evaluation of the memory subsystem and its interaction with the NoC. The result is a robust NoC simulation methodology that works for large, heterogeneous SoC architectures.

Saman Taghavi Zargar - One of the best experts on this subject based on the ideXlab platform.

  • CCNC - Optimizing Network Routing to Minimize Congestion, Using the Conqueror Traffic Based Synthetically Generated Traffic Matrices
    2008 5th IEEE Consumer Communications and Networking Conference, 2008
    Co-Authors: Saman Taghavi Zargar, Mohammad Hossein Yaghmaee
    Abstract:

    Many Traffic engineering and network design tasks require a network-wide description as an input for their performance evaluation. Therefore, a Traffic matrix represents the demands for these tasks and is applicable to them. Traffic matrix can be measured directly or estimated from an indirect data. Generating Synthetic Traffic matrix method, is a better way to achieve Traffic matrix indirectly. We have previously proposed the conqueror Traffic based Synthetic Traffic matrix and we have indicated that our conqueror Traffic based matrix performed better in all cases where conqueror Traffic existed. In this paper by measuring the maximum link-utilization, we consider how well the conqueror Traffic based Synthetic matrix optimizes the specific Traffic engineering task; that is optimizing network routing to minimize congestion. First, we optimize the routing with the conqueror Traffic based Synthetic matrix to minimize congestion. Then, we test the performance of the resulting routing on the real Traffic matrix. Simulation results indicate that OSPF optimization which we use in this paper to optimize the weights based on the conqueror Traffic based Synthetic matrix, optimize the routing better and result in a better performance on real Traffic matrix.