The Experts below are selected from a list of 77505 Experts worldwide ranked by ideXlab platform
ABDIAZIZ FARAH - One of the best experts on this subject based on the ideXlab platform.
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A new classification approach for neural networks hardware: from standards chips to embedded systems on chip
Artificial Intelligence Review, 2014Co-Authors: Nouma Izeboudjen, Cherif Larbes, ABDIAZIZ FARAHAbstract:The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not a clear consensus on classification criteria and performances. Second, with the evolution of the microelectronic technology and the design tools and techniques, new artificial neural networks (ANNs) implementations have been proposed, but they are not taken into consideration in the existing classification approaches of ANN hardware. In this paper, we propose a new approach for classification of neural networks hardware. The paper is organized in three parts: in the first part we review most of existing approaches proposed in the literature during the period 1990–2010 and show the advantages and disadvantages of each one. In the second part, we propose a new classification approach that takes into account most of consensual elements in one hand and in the other hand it takes into consideration the evolution of the design technology of integrated circuits and the design techniques. In the third part, we review examples of neural hardware achievements from industrial, academic and research institutions. According to our classification approach, these achievements range from standard chips to VLSI ASICs, FPGA and embedded systems on chip. Finally, we enumerate design issues that are still posed. This could help to give new directions for future research work.
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A new classification approach for neural networks hardware: From standards chips to embedded systems on chip
Artificial Intelligence Review, 2014Co-Authors: Nouma Izeboudjen, Cherif Larbes, ABDIAZIZ FARAHAbstract:The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not a clear consensus on classification criteria and performances. Second, with the evolution of the microelectronic technology and the design tools and techniques, new artificial neural networks (ANNs) implementations have been proposed, but they are not taken into consideration in the existing classification approaches of ANN hardware. In this paper, we propose a new approach for classification of neural networks hardware. The paper is organized in three parts: in the first part we review most of existing approaches proposed in the literature during the period 1990-2010 and show the advantages and disadvantages of each one. In the second part, we propose a new classification approach that takes into account most of consensual elements in one hand and in the other hand it takes into consideration the evolution of the design technology of integrated circuits and the design techniques. In the third part, we review examples of neural hardware achievements from industrial, academic and research institutions. According to our classification approach, these achievements range from standard chips to VLSI ASICs, FPGA and embedded systems on chip. Finally, we enumerate design issues that are still posed. This could help to give new directions for future research work. © 2012 Springer Science+Business Media B.V.
Nouma Izeboudjen - One of the best experts on this subject based on the ideXlab platform.
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A new classification approach for neural networks hardware: from standards chips to embedded systems on chip
Artificial Intelligence Review, 2014Co-Authors: Nouma Izeboudjen, Cherif Larbes, ABDIAZIZ FARAHAbstract:The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not a clear consensus on classification criteria and performances. Second, with the evolution of the microelectronic technology and the design tools and techniques, new artificial neural networks (ANNs) implementations have been proposed, but they are not taken into consideration in the existing classification approaches of ANN hardware. In this paper, we propose a new approach for classification of neural networks hardware. The paper is organized in three parts: in the first part we review most of existing approaches proposed in the literature during the period 1990–2010 and show the advantages and disadvantages of each one. In the second part, we propose a new classification approach that takes into account most of consensual elements in one hand and in the other hand it takes into consideration the evolution of the design technology of integrated circuits and the design techniques. In the third part, we review examples of neural hardware achievements from industrial, academic and research institutions. According to our classification approach, these achievements range from standard chips to VLSI ASICs, FPGA and embedded systems on chip. Finally, we enumerate design issues that are still posed. This could help to give new directions for future research work.
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A new classification approach for neural networks hardware: From standards chips to embedded systems on chip
Artificial Intelligence Review, 2014Co-Authors: Nouma Izeboudjen, Cherif Larbes, ABDIAZIZ FARAHAbstract:The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not a clear consensus on classification criteria and performances. Second, with the evolution of the microelectronic technology and the design tools and techniques, new artificial neural networks (ANNs) implementations have been proposed, but they are not taken into consideration in the existing classification approaches of ANN hardware. In this paper, we propose a new approach for classification of neural networks hardware. The paper is organized in three parts: in the first part we review most of existing approaches proposed in the literature during the period 1990-2010 and show the advantages and disadvantages of each one. In the second part, we propose a new classification approach that takes into account most of consensual elements in one hand and in the other hand it takes into consideration the evolution of the design technology of integrated circuits and the design techniques. In the third part, we review examples of neural hardware achievements from industrial, academic and research institutions. According to our classification approach, these achievements range from standard chips to VLSI ASICs, FPGA and embedded systems on chip. Finally, we enumerate design issues that are still posed. This could help to give new directions for future research work. © 2012 Springer Science+Business Media B.V.
Pascal Vivet - One of the best experts on this subject based on the ideXlab platform.
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A new contactless smart card IC using an on-chip antenna and an asynchronous microcontroller
IEEE Journal of Solid-State Circuits, 2001Co-Authors: André Abrial, Patrice Senn, Julien Bouvier, Marc Renaudin, Pascal VivetAbstract:A new generation of Contactless Smartcard Chip is described. The Contactless Smartcard Chip integrates an on-chip coil connected to a power reception system and an emitter/receiver module compatible with the ISO 14443 standard, together with an asynchronous Quasi Delay Insensitive (QDI) 8-bit micro-controller. Beyond the contactless smartcard application field, this new chip demonstrates that System-on-Chip integrating power reception and management, radio-frequency communication and signal processing are feasible. The chip associates analog/digital parts as well as synchronous/asynchronous logics and has been fabricated in a CMOS 6 metal layers .25µm technology from STMicroelectronics.
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A contactless smart-card chip based on an asynchronous 8-bit microcontroller
2000Co-Authors: André Abrial, Julien Bouvier, Marc Renaudin, Pascal VivetAbstract:A new generation of Contactless Smart-Card Chip is described. The Contractless Smart-Cart Chip integrates an on-chip coil connected to a power reception system and an emitter/receiver module compatible with the ISO 14443 standard, together with an asynchronous QDI 8 bit microcontroller. Beyond the contactless smart-card application field, this new chip demonstrates that System on Chip integrating power reception and management, radio-frequency communication and signal processing are feasible. The chip, fabricated in a CMOS 6 metal layers .25µm technology from STMicroelectronics, associates analog/digital parts as well as asynchronous logic.
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A new contactless smartcard IC using an on-chip antenna and an asynchronous micro-controller
2000Co-Authors: André Abrial, Patrice Senn, Julien Bouvier, Marc Renaudin, Pascal VivetAbstract:A new generation of Contactless Smartcard Chip is described. The Contactless Smartcard Chip integrates an on-chip coil connected to a power reception system and an emitter/receiver module compatible with the ISO 14443 standard, together with an asynchronous Quasi Delay Insensitive (QDI) 8-bit micro-controller. Beyond the contactless smartcard application field, this new chip demonstrates that System-on-Chip integrating power reception and management, radio-frequency communication and signal processing are feasible. The chip associates analog/digital parts as well as synchronous/asynchronous logics and has been fabricated in a CMOS 6 metal layers .25µm technology from STMicroelectronics.
Cherif Larbes - One of the best experts on this subject based on the ideXlab platform.
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A new classification approach for neural networks hardware: from standards chips to embedded systems on chip
Artificial Intelligence Review, 2014Co-Authors: Nouma Izeboudjen, Cherif Larbes, ABDIAZIZ FARAHAbstract:The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not a clear consensus on classification criteria and performances. Second, with the evolution of the microelectronic technology and the design tools and techniques, new artificial neural networks (ANNs) implementations have been proposed, but they are not taken into consideration in the existing classification approaches of ANN hardware. In this paper, we propose a new approach for classification of neural networks hardware. The paper is organized in three parts: in the first part we review most of existing approaches proposed in the literature during the period 1990–2010 and show the advantages and disadvantages of each one. In the second part, we propose a new classification approach that takes into account most of consensual elements in one hand and in the other hand it takes into consideration the evolution of the design technology of integrated circuits and the design techniques. In the third part, we review examples of neural hardware achievements from industrial, academic and research institutions. According to our classification approach, these achievements range from standard chips to VLSI ASICs, FPGA and embedded systems on chip. Finally, we enumerate design issues that are still posed. This could help to give new directions for future research work.
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A new classification approach for neural networks hardware: From standards chips to embedded systems on chip
Artificial Intelligence Review, 2014Co-Authors: Nouma Izeboudjen, Cherif Larbes, ABDIAZIZ FARAHAbstract:The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not a clear consensus on classification criteria and performances. Second, with the evolution of the microelectronic technology and the design tools and techniques, new artificial neural networks (ANNs) implementations have been proposed, but they are not taken into consideration in the existing classification approaches of ANN hardware. In this paper, we propose a new approach for classification of neural networks hardware. The paper is organized in three parts: in the first part we review most of existing approaches proposed in the literature during the period 1990-2010 and show the advantages and disadvantages of each one. In the second part, we propose a new classification approach that takes into account most of consensual elements in one hand and in the other hand it takes into consideration the evolution of the design technology of integrated circuits and the design techniques. In the third part, we review examples of neural hardware achievements from industrial, academic and research institutions. According to our classification approach, these achievements range from standard chips to VLSI ASICs, FPGA and embedded systems on chip. Finally, we enumerate design issues that are still posed. This could help to give new directions for future research work. © 2012 Springer Science+Business Media B.V.
André Abrial - One of the best experts on this subject based on the ideXlab platform.
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A new contactless smart card IC using an on-chip antenna and an asynchronous microcontroller
IEEE Journal of Solid-State Circuits, 2001Co-Authors: André Abrial, Patrice Senn, Julien Bouvier, Marc Renaudin, Pascal VivetAbstract:A new generation of Contactless Smartcard Chip is described. The Contactless Smartcard Chip integrates an on-chip coil connected to a power reception system and an emitter/receiver module compatible with the ISO 14443 standard, together with an asynchronous Quasi Delay Insensitive (QDI) 8-bit micro-controller. Beyond the contactless smartcard application field, this new chip demonstrates that System-on-Chip integrating power reception and management, radio-frequency communication and signal processing are feasible. The chip associates analog/digital parts as well as synchronous/asynchronous logics and has been fabricated in a CMOS 6 metal layers .25µm technology from STMicroelectronics.
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A contactless smart-card chip based on an asynchronous 8-bit microcontroller
2000Co-Authors: André Abrial, Julien Bouvier, Marc Renaudin, Pascal VivetAbstract:A new generation of Contactless Smart-Card Chip is described. The Contractless Smart-Cart Chip integrates an on-chip coil connected to a power reception system and an emitter/receiver module compatible with the ISO 14443 standard, together with an asynchronous QDI 8 bit microcontroller. Beyond the contactless smart-card application field, this new chip demonstrates that System on Chip integrating power reception and management, radio-frequency communication and signal processing are feasible. The chip, fabricated in a CMOS 6 metal layers .25µm technology from STMicroelectronics, associates analog/digital parts as well as asynchronous logic.
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A new contactless smartcard IC using an on-chip antenna and an asynchronous micro-controller
2000Co-Authors: André Abrial, Patrice Senn, Julien Bouvier, Marc Renaudin, Pascal VivetAbstract:A new generation of Contactless Smartcard Chip is described. The Contactless Smartcard Chip integrates an on-chip coil connected to a power reception system and an emitter/receiver module compatible with the ISO 14443 standard, together with an asynchronous Quasi Delay Insensitive (QDI) 8-bit micro-controller. Beyond the contactless smartcard application field, this new chip demonstrates that System-on-Chip integrating power reception and management, radio-frequency communication and signal processing are feasible. The chip associates analog/digital parts as well as synchronous/asynchronous logics and has been fabricated in a CMOS 6 metal layers .25µm technology from STMicroelectronics.
