The Experts below are selected from a list of 1710 Experts worldwide ranked by ideXlab platform
Lalita Jategaonkar Jagadeesan - One of the best experts on this subject based on the ideXlab platform.
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model checking without a model an analysis of the heart beat monitor of a Telephone Switch using verisoft
International Symposium on Software Testing and Analysis, 1998Co-Authors: Patrice Godefroid, Robert S Hanmer, Lalita Jategaonkar JagadeesanAbstract:VeriSoft is a tool for systematically exploring the state spaces of systems composed of several concurrent processes executing arbitrary code written in full-fledged programming languages such as C or C++. The state space of a concurrent system is a directed graph that represents the combined behavior of all concurrent components in the system. By exploring its state space, VeriSoft can automatically detect coordination problems between the processes of a concurrent system.We report in this paper our analysis with VeriSoft of the "Heart-Beat Monitor" (HBM), a Telephone Switching application developed at Lucent Technologies. The HBM of a Telephone Switch determines the status of different elements connected to the Switch by measuring propagation delays of messages transmitted via these elements. This information plays an important role in the routing of data in the Switch, and can significantly impact Switch performance.We discuss the steps of our analysis of the HBM using VeriSoft. Because no modeling of the HBM code is necessary with this tool, the total elapsed time before being able to run the first tests was on the order of a few hours, instead of several days or weeks that would have been needed for the (error-prone) modeling phase required with traditional model checkers or theorem provers.We then present the results of our analysis. Since VeriSoft automatically generates, executes and evaluates thousands of tests per minute and has complete control over nondeterminism, our analysis revealed HBM behavior that is virtually impossible to detect or test in a traditional lab-testing environment. Specifically, we discovered flaws in the existing documentation on this application and unexpected behaviors in the software itself. These results are being used as the basis for the redesign of the HBM software in the next commercial release of the Switching software.
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ISSTA - Model checking without a model: an analysis of the heart-beat monitor of a Telephone Switch using VeriSoft
Proceedings of ACM SIGSOFT international symposium on Software testing and analysis - ISSTA '98, 1998Co-Authors: Patrice Godefroid, Robert S Hanmer, Lalita Jategaonkar JagadeesanAbstract:VeriSoft is a tool for systematically exploring the state spaces of systems composed of several concurrent processes executing arbitrary code written in full-fledged programming languages such as C or C++. The state space of a concurrent system is a directed graph that represents the combined behavior of all concurrent components in the system. By exploring its state space, VeriSoft can automatically detect coordination problems between the processes of a concurrent system.We report in this paper our analysis with VeriSoft of the "Heart-Beat Monitor" (HBM), a Telephone Switching application developed at Lucent Technologies. The HBM of a Telephone Switch determines the status of different elements connected to the Switch by measuring propagation delays of messages transmitted via these elements. This information plays an important role in the routing of data in the Switch, and can significantly impact Switch performance.We discuss the steps of our analysis of the HBM using VeriSoft. Because no modeling of the HBM code is necessary with this tool, the total elapsed time before being able to run the first tests was on the order of a few hours, instead of several days or weeks that would have been needed for the (error-prone) modeling phase required with traditional model checkers or theorem provers.We then present the results of our analysis. Since VeriSoft automatically generates, executes and evaluates thousands of tests per minute and has complete control over nondeterminism, our analysis revealed HBM behavior that is virtually impossible to detect or test in a traditional lab-testing environment. Specifically, we discovered flaws in the existing documentation on this application and unexpected behaviors in the software itself. These results are being used as the basis for the redesign of the HBM software in the next commercial release of the Switching software.
Patrice Godefroid - One of the best experts on this subject based on the ideXlab platform.
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model checking without a model an analysis of the heart beat monitor of a Telephone Switch using verisoft
International Symposium on Software Testing and Analysis, 1998Co-Authors: Patrice Godefroid, Robert S Hanmer, Lalita Jategaonkar JagadeesanAbstract:VeriSoft is a tool for systematically exploring the state spaces of systems composed of several concurrent processes executing arbitrary code written in full-fledged programming languages such as C or C++. The state space of a concurrent system is a directed graph that represents the combined behavior of all concurrent components in the system. By exploring its state space, VeriSoft can automatically detect coordination problems between the processes of a concurrent system.We report in this paper our analysis with VeriSoft of the "Heart-Beat Monitor" (HBM), a Telephone Switching application developed at Lucent Technologies. The HBM of a Telephone Switch determines the status of different elements connected to the Switch by measuring propagation delays of messages transmitted via these elements. This information plays an important role in the routing of data in the Switch, and can significantly impact Switch performance.We discuss the steps of our analysis of the HBM using VeriSoft. Because no modeling of the HBM code is necessary with this tool, the total elapsed time before being able to run the first tests was on the order of a few hours, instead of several days or weeks that would have been needed for the (error-prone) modeling phase required with traditional model checkers or theorem provers.We then present the results of our analysis. Since VeriSoft automatically generates, executes and evaluates thousands of tests per minute and has complete control over nondeterminism, our analysis revealed HBM behavior that is virtually impossible to detect or test in a traditional lab-testing environment. Specifically, we discovered flaws in the existing documentation on this application and unexpected behaviors in the software itself. These results are being used as the basis for the redesign of the HBM software in the next commercial release of the Switching software.
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ISSTA - Model checking without a model: an analysis of the heart-beat monitor of a Telephone Switch using VeriSoft
Proceedings of ACM SIGSOFT international symposium on Software testing and analysis - ISSTA '98, 1998Co-Authors: Patrice Godefroid, Robert S Hanmer, Lalita Jategaonkar JagadeesanAbstract:VeriSoft is a tool for systematically exploring the state spaces of systems composed of several concurrent processes executing arbitrary code written in full-fledged programming languages such as C or C++. The state space of a concurrent system is a directed graph that represents the combined behavior of all concurrent components in the system. By exploring its state space, VeriSoft can automatically detect coordination problems between the processes of a concurrent system.We report in this paper our analysis with VeriSoft of the "Heart-Beat Monitor" (HBM), a Telephone Switching application developed at Lucent Technologies. The HBM of a Telephone Switch determines the status of different elements connected to the Switch by measuring propagation delays of messages transmitted via these elements. This information plays an important role in the routing of data in the Switch, and can significantly impact Switch performance.We discuss the steps of our analysis of the HBM using VeriSoft. Because no modeling of the HBM code is necessary with this tool, the total elapsed time before being able to run the first tests was on the order of a few hours, instead of several days or weeks that would have been needed for the (error-prone) modeling phase required with traditional model checkers or theorem provers.We then present the results of our analysis. Since VeriSoft automatically generates, executes and evaluates thousands of tests per minute and has complete control over nondeterminism, our analysis revealed HBM behavior that is virtually impossible to detect or test in a traditional lab-testing environment. Specifically, we discovered flaws in the existing documentation on this application and unexpected behaviors in the software itself. These results are being used as the basis for the redesign of the HBM software in the next commercial release of the Switching software.
Robert S Hanmer - One of the best experts on this subject based on the ideXlab platform.
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model checking without a model an analysis of the heart beat monitor of a Telephone Switch using verisoft
International Symposium on Software Testing and Analysis, 1998Co-Authors: Patrice Godefroid, Robert S Hanmer, Lalita Jategaonkar JagadeesanAbstract:VeriSoft is a tool for systematically exploring the state spaces of systems composed of several concurrent processes executing arbitrary code written in full-fledged programming languages such as C or C++. The state space of a concurrent system is a directed graph that represents the combined behavior of all concurrent components in the system. By exploring its state space, VeriSoft can automatically detect coordination problems between the processes of a concurrent system.We report in this paper our analysis with VeriSoft of the "Heart-Beat Monitor" (HBM), a Telephone Switching application developed at Lucent Technologies. The HBM of a Telephone Switch determines the status of different elements connected to the Switch by measuring propagation delays of messages transmitted via these elements. This information plays an important role in the routing of data in the Switch, and can significantly impact Switch performance.We discuss the steps of our analysis of the HBM using VeriSoft. Because no modeling of the HBM code is necessary with this tool, the total elapsed time before being able to run the first tests was on the order of a few hours, instead of several days or weeks that would have been needed for the (error-prone) modeling phase required with traditional model checkers or theorem provers.We then present the results of our analysis. Since VeriSoft automatically generates, executes and evaluates thousands of tests per minute and has complete control over nondeterminism, our analysis revealed HBM behavior that is virtually impossible to detect or test in a traditional lab-testing environment. Specifically, we discovered flaws in the existing documentation on this application and unexpected behaviors in the software itself. These results are being used as the basis for the redesign of the HBM software in the next commercial release of the Switching software.
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ISSTA - Model checking without a model: an analysis of the heart-beat monitor of a Telephone Switch using VeriSoft
Proceedings of ACM SIGSOFT international symposium on Software testing and analysis - ISSTA '98, 1998Co-Authors: Patrice Godefroid, Robert S Hanmer, Lalita Jategaonkar JagadeesanAbstract:VeriSoft is a tool for systematically exploring the state spaces of systems composed of several concurrent processes executing arbitrary code written in full-fledged programming languages such as C or C++. The state space of a concurrent system is a directed graph that represents the combined behavior of all concurrent components in the system. By exploring its state space, VeriSoft can automatically detect coordination problems between the processes of a concurrent system.We report in this paper our analysis with VeriSoft of the "Heart-Beat Monitor" (HBM), a Telephone Switching application developed at Lucent Technologies. The HBM of a Telephone Switch determines the status of different elements connected to the Switch by measuring propagation delays of messages transmitted via these elements. This information plays an important role in the routing of data in the Switch, and can significantly impact Switch performance.We discuss the steps of our analysis of the HBM using VeriSoft. Because no modeling of the HBM code is necessary with this tool, the total elapsed time before being able to run the first tests was on the order of a few hours, instead of several days or weeks that would have been needed for the (error-prone) modeling phase required with traditional model checkers or theorem provers.We then present the results of our analysis. Since VeriSoft automatically generates, executes and evaluates thousands of tests per minute and has complete control over nondeterminism, our analysis revealed HBM behavior that is virtually impossible to detect or test in a traditional lab-testing environment. Specifically, we discovered flaws in the existing documentation on this application and unexpected behaviors in the software itself. These results are being used as the basis for the redesign of the HBM software in the next commercial release of the Switching software.
Attahiru Sule Alfa - One of the best experts on this subject based on the ideXlab platform.
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A task‐oriented priority queue for Telephone Switch design: with modified FCFS and forking
Telecommunication Systems, 1998Co-Authors: Randall G. Martens, Attahiru Sule AlfaAbstract:When developing a Telephone Switch, it is useful to know how long it will take to process the various tasks associated with call processing. The model developed in this paper gives expected sojourn times for those tasks. It is a priority queueing model with a modified first‐come first‐served (FCFS) service discipline, which mimics the treatment of tasks in actual system software. The model is an M/G/1 queueing model with preemption (preemptive resume). It consists of multiple queues, one for each distinct priority, where each task has been preassigned a constant priority. Within each priority queue, the tasks are further grouped by type. An arriving task will join the back of the group of tasks of its type, regardless of where this group is positioned in the queue. Upon completion of a task, several tasks of different types can enter the priority queues. This is referred to as forking. Call processing involves many ordered sets of tasks (jobs or classes), some of which will contain forks. The model produces results that compare favorably with those obtained by simulation.
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A task-oriented priority queue for Telephone Switch design .II. with modified FCFS and forking
Telecommunication Systems, 1998Co-Authors: Randall G. Martens, Attahiru Sule AlfaAbstract:When developing a Telephone Switch, it is useful to know how long it will take to process the various tasks associated with call processing. The model developed in this paper gives expected sojourn times for those tasks. It is a priority queueing model with a modified first-come first-served (FCFS) service discipline, which mimics the treatment of tasks in actual system software. The model is an M/G/1 queueing model with preemption (preemptive resume). It consists of multiple queues, one for each distinct priority, where each task has been preassigned a constant priority. Within each priority queue, the tasks are further grouped by type. An arriving task will join the back of the group of tasks of its type, regardless of where this group is positioned in the queue. Upon completion of a task, multiple subsequent tasks can be given ready-for-service status, and enter the priority queues. This is referred to its forking. Call processing involves many ordered sets of tasks (jobs), some of which will contain forks. The model produces results that compare favorably with those obtained by simulation.
Han Fang-jing - One of the best experts on this subject based on the ideXlab platform.
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The Order-Based Analysis And Realization Of The Simulation Training System Of Stored Program Controlled Telephone Switch
Computer Simulation, 2003Co-Authors: Han Fang-jingAbstract:This paper states the basic construction and features of the main maintaining and management system of digital stored program controlled Telephone Switch, introduces the order-based maintaining and management system of SPCTS, analyses the order-based structure model of SPCTS . Base on it, with sample of CC08 (V610R003) terminal maintaining system , realizes a order-based simulation training system of SPCTS.
